515 lines
19 KiB
C
515 lines
19 KiB
C
/***********************license start***************
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* Copyright (c) 2003-2012 Cavium Inc. (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of Cavium Inc. nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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* This Software, including technical data, may be subject to U.S. export control
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* laws, including the U.S. Export Administration Act and its associated
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* regulations, and may be subject to export or import regulations in other
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* countries.
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
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* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
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* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
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* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
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* SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
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* MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
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* VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
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* CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
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* PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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***********************license end**************************************/
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/**
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* @file
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* Header file for simple executive application initialization. This defines
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* part of the ABI between the bootloader and the application.
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* <hr>$Revision: 70327 $<hr>
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*
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*/
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#ifndef __CVMX_APP_INIT_H__
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#define __CVMX_APP_INIT_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Current major and minor versions of the CVMX bootinfo block that is passed
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** from the bootloader to the application. This is versioned so that applications
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** can properly handle multiple bootloader versions. */
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#define CVMX_BOOTINFO_MAJ_VER 1
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#define CVMX_BOOTINFO_MIN_VER 3
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#if (CVMX_BOOTINFO_MAJ_VER == 1)
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#define CVMX_BOOTINFO_OCTEON_SERIAL_LEN 20
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/* This structure is populated by the bootloader. For binary
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** compatibility the only changes that should be made are
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** adding members to the end of the structure, and the minor
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** version should be incremented at that time.
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** If an incompatible change is made, the major version
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** must be incremented, and the minor version should be reset
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** to 0.
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*/
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struct cvmx_bootinfo {
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#ifdef __BIG_ENDIAN_BITFIELD
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uint32_t major_version;
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uint32_t minor_version;
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uint64_t stack_top;
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uint64_t heap_base;
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uint64_t heap_end;
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uint64_t desc_vaddr;
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uint32_t exception_base_addr;
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uint32_t stack_size;
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uint32_t flags;
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uint32_t core_mask;
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uint32_t dram_size; /**< DRAM size in megabytes */
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uint32_t phy_mem_desc_addr; /**< physical address of free memory descriptor block*/
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uint32_t debugger_flags_base_addr; /**< used to pass flags from app to debugger */
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uint32_t eclock_hz; /**< CPU clock speed, in hz */
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uint32_t dclock_hz; /**< DRAM clock speed, in hz */
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uint32_t reserved0;
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uint16_t board_type;
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uint8_t board_rev_major;
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uint8_t board_rev_minor;
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uint16_t reserved1;
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uint8_t reserved2;
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uint8_t reserved3;
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char board_serial_number[CVMX_BOOTINFO_OCTEON_SERIAL_LEN];
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uint8_t mac_addr_base[6];
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uint8_t mac_addr_count;
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#if (CVMX_BOOTINFO_MIN_VER >= 1)
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/* Several boards support compact flash on the Octeon boot bus. The CF
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** memory spaces may be mapped to different addresses on different boards.
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** These are the physical addresses, so care must be taken to use the correct
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** XKPHYS/KSEG0 addressing depending on the application's ABI.
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** These values will be 0 if CF is not present */
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uint64_t compact_flash_common_base_addr;
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uint64_t compact_flash_attribute_base_addr;
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/* Base address of the LED display (as on EBT3000 board)
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** This will be 0 if LED display not present. */
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uint64_t led_display_base_addr;
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#endif
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#if (CVMX_BOOTINFO_MIN_VER >= 2)
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uint32_t dfa_ref_clock_hz; /**< DFA reference clock in hz (if applicable)*/
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uint32_t config_flags; /**< flags indicating various configuration options. These flags supercede
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** the 'flags' variable and should be used instead if available */
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#if defined(OCTEON_VENDOR_GEFES)
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uint32_t dfm_size; /**< DFA Size */
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#endif
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#endif
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#if (CVMX_BOOTINFO_MIN_VER >= 3)
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uint64_t fdt_addr; /**< Address of the OF Flattened Device Tree structure describing the board. */
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#endif
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#else /* __BIG_ENDIAN */
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/*
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* Little-Endian: When the CPU mode is switched to
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* little-endian, the view of the structure has some of the
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* fields swapped.
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*/
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uint32_t minor_version;
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uint32_t major_version;
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uint64_t stack_top;
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uint64_t heap_base;
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uint64_t heap_end;
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uint64_t desc_vaddr;
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uint32_t stack_size;
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uint32_t exception_base_addr;
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uint32_t core_mask;
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uint32_t flags;
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uint32_t phy_mem_desc_addr;
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uint32_t dram_size;
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uint32_t eclock_hz;
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uint32_t debugger_flags_base_addr;
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uint32_t reserved0;
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uint32_t dclock_hz;
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uint8_t reserved3;
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uint8_t reserved2;
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uint16_t reserved1;
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uint8_t board_rev_minor;
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uint8_t board_rev_major;
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uint16_t board_type;
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union cvmx_bootinfo_scramble {
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/* Must byteswap these four words so that...*/
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uint64_t s[4];
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/* ... this strucure has the proper data arrangement. */
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struct {
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char board_serial_number[CVMX_BOOTINFO_OCTEON_SERIAL_LEN];
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uint8_t mac_addr_base[6];
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uint8_t mac_addr_count;
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uint8_t pad[5];
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} le;
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} scramble1;
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#if (CVMX_BOOTINFO_MIN_VER >= 1)
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uint64_t compact_flash_common_base_addr;
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uint64_t compact_flash_attribute_base_addr;
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uint64_t led_display_base_addr;
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#endif
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#if (CVMX_BOOTINFO_MIN_VER >= 2)
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uint32_t config_flags;
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uint32_t dfa_ref_clock_hz;
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#endif
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#if (CVMX_BOOTINFO_MIN_VER >= 3)
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uint64_t fdt_addr;
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#endif
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#endif
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};
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typedef struct cvmx_bootinfo cvmx_bootinfo_t;
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#define CVMX_BOOTINFO_CFG_FLAG_PCI_HOST (1ull << 0)
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#define CVMX_BOOTINFO_CFG_FLAG_PCI_TARGET (1ull << 1)
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#define CVMX_BOOTINFO_CFG_FLAG_DEBUG (1ull << 2)
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#define CVMX_BOOTINFO_CFG_FLAG_NO_MAGIC (1ull << 3)
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/* This flag is set if the TLB mappings are not contained in the
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** 0x10000000 - 0x20000000 boot bus region. */
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#define CVMX_BOOTINFO_CFG_FLAG_OVERSIZE_TLB_MAPPING (1ull << 4)
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#define CVMX_BOOTINFO_CFG_FLAG_BREAK (1ull << 5)
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#endif /* (CVMX_BOOTINFO_MAJ_VER == 1) */
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/* Type defines for board and chip types */
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enum cvmx_board_types_enum {
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CVMX_BOARD_TYPE_NULL = 0,
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CVMX_BOARD_TYPE_SIM = 1,
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CVMX_BOARD_TYPE_EBT3000 = 2,
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CVMX_BOARD_TYPE_KODAMA = 3,
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CVMX_BOARD_TYPE_NIAGARA = 4, /* Obsolete, no longer supported */
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CVMX_BOARD_TYPE_NAC38 = 5, /* Obsolete, no longer supported */
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CVMX_BOARD_TYPE_THUNDER = 6,
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CVMX_BOARD_TYPE_TRANTOR = 7, /* Obsolete, no longer supported */
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CVMX_BOARD_TYPE_EBH3000 = 8,
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CVMX_BOARD_TYPE_EBH3100 = 9,
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CVMX_BOARD_TYPE_HIKARI = 10,
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CVMX_BOARD_TYPE_CN3010_EVB_HS5 = 11,
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CVMX_BOARD_TYPE_CN3005_EVB_HS5 = 12,
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#if defined(OCTEON_VENDOR_GEFES)
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CVMX_BOARD_TYPE_TNPA3804 = 13,
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CVMX_BOARD_TYPE_AT5810 = 14,
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CVMX_BOARD_TYPE_WNPA3850 = 15,
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CVMX_BOARD_TYPE_W3860 = 16,
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#else
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CVMX_BOARD_TYPE_KBP = 13,
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CVMX_BOARD_TYPE_CN3020_EVB_HS5 = 14, /* Deprecated, CVMX_BOARD_TYPE_CN3010_EVB_HS5 supports the CN3020 */
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CVMX_BOARD_TYPE_EBT5800 = 15,
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CVMX_BOARD_TYPE_NICPRO2 = 16,
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#endif
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CVMX_BOARD_TYPE_EBH5600 = 17,
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CVMX_BOARD_TYPE_EBH5601 = 18,
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CVMX_BOARD_TYPE_EBH5200 = 19,
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CVMX_BOARD_TYPE_BBGW_REF = 20,
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CVMX_BOARD_TYPE_NIC_XLE_4G = 21,
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CVMX_BOARD_TYPE_EBT5600 = 22,
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CVMX_BOARD_TYPE_EBH5201 = 23,
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CVMX_BOARD_TYPE_EBT5200 = 24,
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CVMX_BOARD_TYPE_CB5600 = 25,
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CVMX_BOARD_TYPE_CB5601 = 26,
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CVMX_BOARD_TYPE_CB5200 = 27,
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CVMX_BOARD_TYPE_GENERIC = 28, /* Special 'generic' board type, supports many boards */
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CVMX_BOARD_TYPE_EBH5610 = 29,
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CVMX_BOARD_TYPE_LANAI2_A = 30,
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CVMX_BOARD_TYPE_LANAI2_U = 31,
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CVMX_BOARD_TYPE_EBB5600 = 32,
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CVMX_BOARD_TYPE_EBB6300 = 33,
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CVMX_BOARD_TYPE_NIC_XLE_10G = 34,
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CVMX_BOARD_TYPE_LANAI2_G = 35,
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CVMX_BOARD_TYPE_EBT5810 = 36,
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CVMX_BOARD_TYPE_NIC10E = 37,
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CVMX_BOARD_TYPE_EP6300C = 38,
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CVMX_BOARD_TYPE_EBB6800 = 39,
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CVMX_BOARD_TYPE_NIC4E = 40,
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CVMX_BOARD_TYPE_NIC2E = 41,
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CVMX_BOARD_TYPE_EBB6600 = 42,
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CVMX_BOARD_TYPE_REDWING = 43,
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CVMX_BOARD_TYPE_NIC68_4 = 44,
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CVMX_BOARD_TYPE_NIC10E_66 = 45,
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CVMX_BOARD_TYPE_EBB6100 = 46,
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CVMX_BOARD_TYPE_EVB7100 = 47,
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CVMX_BOARD_TYPE_MAX,
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/* NOTE: 256-257 are being used by a customer. */
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/* The range from CVMX_BOARD_TYPE_MAX to CVMX_BOARD_TYPE_CUST_DEFINED_MIN is reserved
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** for future SDK use. */
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/* Set aside a range for customer boards. These numbers are managed
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** by Cavium.
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*/
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CVMX_BOARD_TYPE_CUST_DEFINED_MIN = 10000,
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CVMX_BOARD_TYPE_CUST_WSX16 = 10001,
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CVMX_BOARD_TYPE_CUST_NS0216 = 10002,
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CVMX_BOARD_TYPE_CUST_NB5 = 10003,
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CVMX_BOARD_TYPE_CUST_WMR500 = 10004,
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CVMX_BOARD_TYPE_CUST_ITB101 = 10005,
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CVMX_BOARD_TYPE_CUST_NTE102 = 10006,
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CVMX_BOARD_TYPE_CUST_AGS103 = 10007,
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#if !defined(OCTEON_VENDOR_LANNER)
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CVMX_BOARD_TYPE_CUST_GST104 = 10008,
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#else
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CVMX_BOARD_TYPE_CUST_LANNER_MR955= 10008,
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#endif
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CVMX_BOARD_TYPE_CUST_GCT105 = 10009,
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CVMX_BOARD_TYPE_CUST_AGS106 = 10010,
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CVMX_BOARD_TYPE_CUST_SGM107 = 10011,
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CVMX_BOARD_TYPE_CUST_GCT108 = 10012,
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CVMX_BOARD_TYPE_CUST_AGS109 = 10013,
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CVMX_BOARD_TYPE_CUST_GCT110 = 10014,
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CVMX_BOARD_TYPE_CUST_L2_AIR_SENDER = 10015,
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CVMX_BOARD_TYPE_CUST_L2_AIR_RECEIVER= 10016,
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CVMX_BOARD_TYPE_CUST_L2_ACCTON2_TX = 10017,
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CVMX_BOARD_TYPE_CUST_L2_ACCTON2_RX = 10018,
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CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_TX= 10019,
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CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_RX= 10020,
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#if defined(OCTEON_VENDOR_LANNER)
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CVMX_BOARD_TYPE_CUST_LANNER_MR730 = 10021,
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#else
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CVMX_BOARD_TYPE_CUST_L2_ZINWELL = 10021,
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#endif
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CVMX_BOARD_TYPE_CUST_DEFINED_MAX = 20000,
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/* Set aside a range for customer private use. The SDK won't
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** use any numbers in this range. */
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CVMX_BOARD_TYPE_CUST_PRIVATE_MIN = 20001,
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#if defined(OCTEON_VENDOR_LANNER)
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CVMX_BOARD_TYPE_CUST_LANNER_MR320= 20002,
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CVMX_BOARD_TYPE_CUST_LANNER_MR321X=20007,
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#endif
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#if defined(OCTEON_VENDOR_UBIQUITI)
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CVMX_BOARD_TYPE_CUST_UBIQUITI_E100=20002,
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#endif
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#if defined(OCTEON_VENDOR_RADISYS)
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CVMX_BOARD_TYPE_CUST_RADISYS_RSYS4GBE=20002,
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#endif
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#if defined(OCTEON_VENDOR_GEFES)
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CVMX_BOARD_TYPE_CUST_TNPA5804 = 20005,
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CVMX_BOARD_TYPE_CUST_W5434 = 20006,
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CVMX_BOARD_TYPE_CUST_W5650 = 20007,
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CVMX_BOARD_TYPE_CUST_W5800 = 20008,
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CVMX_BOARD_TYPE_CUST_W5651X = 20009,
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CVMX_BOARD_TYPE_CUST_TNPA5651X = 20010,
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CVMX_BOARD_TYPE_CUST_TNPA56X4 = 20011,
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CVMX_BOARD_TYPE_CUST_W63XX = 20013,
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#endif
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CVMX_BOARD_TYPE_CUST_PRIVATE_MAX = 30000,
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/* Range for IO modules */
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CVMX_BOARD_TYPE_MODULE_MIN = 30001,
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CVMX_BOARD_TYPE_MODULE_PCIE_RC_4X = 30002,
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CVMX_BOARD_TYPE_MODULE_PCIE_EP_4X = 30003,
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CVMX_BOARD_TYPE_MODULE_SGMII_MARVEL = 30004,
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CVMX_BOARD_TYPE_MODULE_SFPPLUS_BCM = 30005,
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CVMX_BOARD_TYPE_MODULE_SRIO = 30006,
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CVMX_BOARD_TYPE_MODULE_EBB5600_QLM0 = 30007,
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CVMX_BOARD_TYPE_MODULE_EBB5600_QLM1 = 30008,
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CVMX_BOARD_TYPE_MODULE_EBB5600_QLM2 = 30009,
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CVMX_BOARD_TYPE_MODULE_EBB5600_QLM3 = 30010,
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CVMX_BOARD_TYPE_MODULE_MAX = 31000
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/* The remaining range is reserved for future use. */
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};
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enum cvmx_chip_types_enum {
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CVMX_CHIP_TYPE_NULL = 0,
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CVMX_CHIP_SIM_TYPE_DEPRECATED = 1,
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CVMX_CHIP_TYPE_OCTEON_SAMPLE = 2,
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CVMX_CHIP_TYPE_MAX
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};
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/* Compatability alias for NAC38 name change, planned to be removed from SDK 1.7 */
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#define CVMX_BOARD_TYPE_NAO38 CVMX_BOARD_TYPE_NAC38
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/* Functions to return string based on type */
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#define ENUM_BRD_TYPE_CASE(x) case x: return(#x + 16); /* Skip CVMX_BOARD_TYPE_ */
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static inline const char *cvmx_board_type_to_string(enum cvmx_board_types_enum type)
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{
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switch (type)
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{
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NULL)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_SIM)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT3000)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_KODAMA)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIAGARA)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NAC38)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_THUNDER)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_TRANTOR)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH3000)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH3100)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_HIKARI)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CN3010_EVB_HS5)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CN3005_EVB_HS5)
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#if defined(OCTEON_VENDOR_GEFES)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_TNPA3804)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_AT5810)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_WNPA3850)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_W3860)
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#else
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_KBP)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CN3020_EVB_HS5)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5800)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NICPRO2)
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#endif
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5600)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5601)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5200)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_BBGW_REF)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC_XLE_4G)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5600)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5201)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5200)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CB5600)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CB5601)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CB5200)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_GENERIC)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5610)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_LANAI2_A)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_LANAI2_U)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB5600)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB6300)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC_XLE_10G)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_LANAI2_G)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5810)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC10E)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EP6300C)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB6800)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC4E)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC2E)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB6600)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_REDWING)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC68_4)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC10E_66)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB6100)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EVB7100)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MAX)
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/* Customer boards listed here */
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_DEFINED_MIN)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_WSX16)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_NS0216)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_NB5)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_WMR500)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_ITB101)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_NTE102)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_AGS103)
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#if !defined(OCTEON_VENDOR_LANNER)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GST104)
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#else
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_LANNER_MR955)
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#endif
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GCT105)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_AGS106)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_SGM107)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GCT108)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_AGS109)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GCT110)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_AIR_SENDER)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_AIR_RECEIVER)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_ACCTON2_TX)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_ACCTON2_RX)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_TX)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_RX)
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#if defined(OCTEON_VENDOR_LANNER)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_LANNER_MR730)
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#else
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_ZINWELL)
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#endif
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_DEFINED_MAX)
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/* Customer private range */
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MIN)
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#if defined(OCTEON_VENDOR_LANNER)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_LANNER_MR320)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_LANNER_MR321X)
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|
#endif
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#if defined(OCTEON_VENDOR_UBIQUITI)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_UBIQUITI_E100)
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#endif
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#if defined(OCTEON_VENDOR_RADISYS)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_RADISYS_RSYS4GBE)
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#endif
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#if defined(OCTEON_VENDOR_GEFES)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_TNPA5804)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_W5434)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_W5650)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_W5800)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_W5651X)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_TNPA5651X)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_TNPA56X4)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_W63XX)
|
|
#endif
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MAX)
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|
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/* Module range */
|
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_MIN)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_PCIE_RC_4X)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_PCIE_EP_4X)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_SGMII_MARVEL)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_SFPPLUS_BCM)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_SRIO)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_EBB5600_QLM0)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_EBB5600_QLM1)
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ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_EBB5600_QLM2)
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|
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_EBB5600_QLM3)
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|
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MODULE_MAX)
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|
}
|
|
return "Unsupported Board";
|
|
}
|
|
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|
#define ENUM_CHIP_TYPE_CASE(x) case x: return(#x + 15); /* Skip CVMX_CHIP_TYPE */
|
|
static inline const char *cvmx_chip_type_to_string(enum cvmx_chip_types_enum type)
|
|
{
|
|
switch (type)
|
|
{
|
|
ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_NULL)
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|
ENUM_CHIP_TYPE_CASE(CVMX_CHIP_SIM_TYPE_DEPRECATED)
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|
ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_OCTEON_SAMPLE)
|
|
ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_MAX)
|
|
}
|
|
return "Unsupported Chip";
|
|
}
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|
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extern int cvmx_debug_uart;
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|
|
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#ifdef __cplusplus
|
|
}
|
|
#endif
|
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|
#endif /* __CVMX_APP_INIT_H__ */
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