291 lines
7.2 KiB
C
291 lines
7.2 KiB
C
/***********************license start***************
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* Copyright (c) 2003-2010 Cavium Inc. (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of Cavium Inc. nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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* This Software, including technical data, may be subject to U.S. export control
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* laws, including the U.S. Export Administration Act and its associated
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* regulations, and may be subject to export or import regulations in other
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* countries.
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
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* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
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* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
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* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
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* SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
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* MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
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* VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
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* CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
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* PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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***********************license end**************************************/
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/**
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* @file
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*
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* Interface to power-throttle control, measurement, and debugging
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* facilities.
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*
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* <hr>$Revision: 70030 $<hr>
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*
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*/
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#include "cvmx.h"
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#include "cvmx-asm.h"
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#include "cvmx-coremask.h"
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#include "cvmx-power-throttle.h"
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#define CVMX_PTH_GET_MASK(len, pos) \
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((((uint64_t)1 << (len)) - 1) << (pos))
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#define CVMX_PTH_AVAILABLE \
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(cvmx_power_throttle_get_register(0) != (uint64_t)-1)
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/**
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* a field of the POWTHROTTLE register
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*/
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static struct cvmx_power_throttle_rfield_t {
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char name[16]; /* the field's name */
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int32_t pos; /* position of the field's LSb */
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int32_t len; /* the field's length */
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int present; /* 1 for present */
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} cvmx_power_throttle_rfield[] = {
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{"MAXPOW", 56, 8, 0},
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{"POWER" , 48, 8, 0},
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{"THROTT", 40, 8, 0},
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{"Reserved", 28, 12, 0},
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{"DISTAG", 27, 1, 0},
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{"PERIOD", 24, 3, 0},
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{"POWLIM", 16, 8, 0},
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{"MAXTHR", 8, 8, 0},
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{"MINTHR", 0, 8, 0},
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{"HRMPOWADJ",32, 8, 0},
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{"OVRRD", 28, 1, 0}
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};
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static uint64_t cvmx_power_throttle_csr_addr(int ppid);
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static int cvmx_power_throttle_initialized;
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/**
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* @INTERNAL
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* Initialize cvmx_power_throttle_rfield[] based on model.
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*/
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static void cvmx_power_throttle_init(void)
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{
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/*
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* Turn on the fields for a model
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*/
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if (OCTEON_IS_MODEL(OCTEON_CN6XXX))
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{
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int i;
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struct cvmx_power_throttle_rfield_t *p;
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for (i = 0; i < CVMX_PTH_INDEX_MAX; i++)
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cvmx_power_throttle_rfield[i].present = 1;
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if (OCTEON_IS_MODEL(OCTEON_CN63XX))
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{
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/*
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* These fields do not come with o63
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*/
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p = &cvmx_power_throttle_rfield[CVMX_PTH_INDEX_HRMPOWADJ];
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p->present = 0;
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p = &cvmx_power_throttle_rfield[CVMX_PTH_INDEX_OVRRD];
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p->present = 0;
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}
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else
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{
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/*
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* The reserved field shrinks in models newer than o63
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*/
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p = &cvmx_power_throttle_rfield[CVMX_PTH_INDEX_RESERVED];
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p->pos = 29;
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p->len = 3;
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}
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}
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}
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uint64_t cvmx_power_throttle_get_field(uint64_t r,
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cvmx_power_throttle_field_index_t i)
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{
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uint64_t m;
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struct cvmx_power_throttle_rfield_t *p;
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assert(i < CVMX_PTH_INDEX_MAX);
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p = &cvmx_power_throttle_rfield[i];
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if (!p->present)
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return (uint64_t) -1;
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m = CVMX_PTH_GET_MASK(p->len, p->pos);
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return((r & m) >> p->pos);
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}
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/**
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* @INTERNAL
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* Set the i'th field of power-throttle register r to v.
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*/
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static int cvmx_power_throttle_set_field(int i, uint64_t r, uint64_t v)
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{
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if (OCTEON_IS_MODEL(OCTEON_CN6XXX))
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{
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uint64_t m;
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struct cvmx_power_throttle_rfield_t *p;
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assert(i < CVMX_PTH_INDEX_MAX);
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p = &cvmx_power_throttle_rfield[i];
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m = CVMX_PTH_GET_MASK(p->len, p->pos);
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return((~m & r) | ((v << p->pos) & m));
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}
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return 0;
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}
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/**
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* @INTERNAL
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* Set the POWLIM field as percentage% of the MAXPOW field in r.
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*/
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static uint64_t cvmx_power_throttle_set_powlim(int ppid,
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uint8_t percentage)
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{
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if (OCTEON_IS_MODEL(OCTEON_CN6XXX))
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{
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uint64_t t, csr_addr, r;
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assert(percentage < 101);
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csr_addr = cvmx_power_throttle_csr_addr(ppid);
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r = cvmx_read_csr(csr_addr);
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t = cvmx_power_throttle_get_field(r, CVMX_PTH_INDEX_MAXPOW);
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if (!OCTEON_IS_MODEL(OCTEON_CN63XX))
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{
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uint64_t s;
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s = cvmx_power_throttle_get_field(r, CVMX_PTH_INDEX_HRMPOWADJ);
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assert(t > s);
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t = t - s;
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}
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t = percentage * t / 100;
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r = cvmx_power_throttle_set_field(CVMX_PTH_INDEX_POWLIM, r, t);
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cvmx_write_csr(csr_addr, r);
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return r;
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}
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return 0;
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}
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/**
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* @INTERNAL
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* Given ppid, calculate its PowThrottle register's L2C_COP0_MAP CSR
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* address. (ppid == PTH_PPID_BCAST is for broadcasting)
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*/
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static uint64_t cvmx_power_throttle_csr_addr(int ppid)
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{
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if (OCTEON_IS_MODEL(OCTEON_CN6XXX))
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{
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uint64_t csr_addr, reg_num, reg_reg, reg_sel;
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assert(ppid < CVMX_MAX_CORES);
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/*
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* register 11 selection 6
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*/
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reg_reg = 11;
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reg_sel = 6;
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reg_num = (ppid << 8) + (reg_reg << 3) + reg_sel;
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csr_addr = CVMX_L2C_COP0_MAPX(0) + ((reg_num) << 3);
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return csr_addr;
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}
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return 0;
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}
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int cvmx_power_throttle_self(uint8_t percentage)
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{
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if (!CVMX_PTH_AVAILABLE)
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return -1;
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if (cvmx_power_throttle_set_powlim(cvmx_get_core_num(),
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percentage) == 0)
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return -1;
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return 0;
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}
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int cvmx_power_throttle(uint8_t percentage, uint64_t coremask)
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{
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int ppid;
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int ret;
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if (!CVMX_PTH_AVAILABLE)
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return -1;
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ret = 0;
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for (ppid = 0; ppid < CVMX_MAX_CORES; ppid++)
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{
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if ((((uint64_t) 1) << ppid) & coremask)
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{
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if (cvmx_power_throttle_set_powlim(ppid, percentage) == 0)
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ret = -2;
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}
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}
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return ret;
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}
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int cvmx_power_throttle_bmp(uint8_t percentage, struct cvmx_coremask *pcm)
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{
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int ppid;
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int ret;
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if (!CVMX_PTH_AVAILABLE)
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return -1;
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ret = 0;
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CVMX_COREMASK_FOR_EACH_CORE_BEGIN(pcm, ppid)
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{
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if (cvmx_power_throttle_set_powlim(ppid, percentage) == 0)
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ret = -2;
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} CVMX_COREMASK_FOR_EACH_CORE_END;
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return ret;
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}
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uint64_t cvmx_power_throttle_get_register(int ppid)
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{
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uint64_t csr_addr;
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if (!cvmx_power_throttle_initialized)
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{
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cvmx_power_throttle_init();
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cvmx_power_throttle_initialized = 1;
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}
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csr_addr = cvmx_power_throttle_csr_addr(ppid);
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if (csr_addr == 0)
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return -1;
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return cvmx_read_csr(csr_addr);
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}
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