409 lines
10 KiB
C
409 lines
10 KiB
C
/***********************license start***************
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* Copyright (c) 2003-2010 Cavium Inc. (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of Cavium Inc. nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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* This Software, including technical data, may be subject to U.S. export control
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* laws, including the U.S. Export Administration Act and its associated
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* regulations, and may be subject to export or import regulations in other
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* countries.
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
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* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
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* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
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* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
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* SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
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* MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
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* VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
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* CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
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* PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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***********************license end**************************************/
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/**
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* @file
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*
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* cvmx-tlb supplies per core TLB access functions for simple executive
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* applications.
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*
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* <hr>$Revision: 41586 $<hr>
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*/
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#include "cvmx.h"
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#include "cvmx-tlb.h"
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#include "cvmx-core.h"
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#include <math.h>
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extern __uint32_t __log2(__uint32_t);
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//#define DEBUG
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/**
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* @INTERNAL
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* issue the tlb read instruction
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*/
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static inline void __tlb_read(void){
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CVMX_EHB;
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CVMX_TLBR;
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CVMX_EHB;
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}
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/**
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* @INTERNAL
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* issue the tlb write instruction
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*/
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static inline void __tlb_write(void){
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CVMX_EHB;
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CVMX_TLBWI;
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CVMX_EHB;
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}
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/**
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* @INTERNAL
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* issue the tlb read instruction
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*/
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static inline int __tlb_probe(uint64_t hi){
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int index;
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CVMX_EHB;
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CVMX_MT_ENTRY_HIGH(hi);
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CVMX_TLBP;
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CVMX_EHB;
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CVMX_MF_TLB_INDEX(index);
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if (index < 0) index = -1;
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return index;
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}
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/**
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* @INTERNAL
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* read a single tlb entry
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*
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* return 0: tlb entry is read
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* -1: index is invalid
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*/
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static inline int __tlb_read_index(uint32_t tlbi){
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if (tlbi >= (uint32_t)cvmx_core_get_tlb_entries()) {
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return -1;
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}
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CVMX_MT_TLB_INDEX(tlbi);
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__tlb_read();
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return 0;
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}
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/**
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* @INTERNAL
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* write a single tlb entry
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*
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* return 0: tlb entry is read
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* -1: index is invalid
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*/
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static inline int __tlb_write_index(uint32_t tlbi,
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uint64_t hi, uint64_t lo0,
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uint64_t lo1, uint64_t pagemask)
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{
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if (tlbi >= (uint32_t)cvmx_core_get_tlb_entries()) {
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return -1;
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}
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#ifdef DEBUG
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cvmx_dprintf("cvmx-tlb-dbg: "
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"write TLB %d: hi %lx, lo0 %lx, lo1 %lx, pagemask %lx \n",
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tlbi, hi, lo0, lo1, pagemask);
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#endif
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CVMX_MT_TLB_INDEX(tlbi);
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CVMX_MT_ENTRY_HIGH(hi);
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CVMX_MT_ENTRY_LO_0(lo0);
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CVMX_MT_ENTRY_LO_1(lo1);
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CVMX_MT_PAGEMASK(pagemask);
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__tlb_write();
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return 0;
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}
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/**
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* @INTERNAL
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* Determine if a TLB entry is free to use
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*/
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static inline int __tlb_entry_is_free(uint32_t tlbi) {
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int ret = 0;
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uint64_t lo0 = 0, lo1 = 0;
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if (tlbi < (uint32_t)cvmx_core_get_tlb_entries()) {
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__tlb_read_index(tlbi);
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/* Unused entries have neither even nor odd page mapped */
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CVMX_MF_ENTRY_LO_0(lo0);
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CVMX_MF_ENTRY_LO_1(lo1);
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if ( !(lo0 & TLB_VALID) && !(lo1 & TLB_VALID)) {
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ret = 1;
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}
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}
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return ret;
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}
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/**
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* @INTERNAL
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* dump a single tlb entry
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*/
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static inline void __tlb_dump_index(uint32_t tlbi)
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{
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if (tlbi < (uint32_t)cvmx_core_get_tlb_entries()) {
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if (__tlb_entry_is_free(tlbi)) {
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#ifdef DEBUG
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cvmx_dprintf("Index: %3d Free \n", tlbi);
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#endif
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} else {
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uint64_t lo0, lo1, pgmask;
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uint32_t hi;
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#ifdef DEBUG
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uint32_t c0, c1;
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int width = 13;
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#endif
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__tlb_read_index(tlbi);
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CVMX_MF_ENTRY_HIGH(hi);
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CVMX_MF_ENTRY_LO_0(lo0);
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CVMX_MF_ENTRY_LO_1(lo1);
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CVMX_MF_PAGEMASK(pgmask);
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#ifdef DEBUG
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c0 = ( lo0 >> 3 ) & 7;
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c1 = ( lo1 >> 3 ) & 7;
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cvmx_dprintf("va=%0*lx asid=%02x\n",
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width, (hi & ~0x1fffUL), hi & 0xff);
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cvmx_dprintf("\t[pa=%0*lx c=%d d=%d v=%d g=%d] ",
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width,
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(lo0 << 6) & PAGE_MASK, c0,
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(lo0 & 4) ? 1 : 0,
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(lo0 & 2) ? 1 : 0,
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(lo0 & 1) ? 1 : 0);
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cvmx_dprintf("[pa=%0*lx c=%d d=%d v=%d g=%d]\n",
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width,
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(lo1 << 6) & PAGE_MASK, c1,
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(lo1 & 4) ? 1 : 0,
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(lo1 & 2) ? 1 : 0,
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(lo1 & 1) ? 1 : 0);
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#endif
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}
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}
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}
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/**
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* @INTERNAL
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* dump a single tlb entry
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*/
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static inline uint32_t __tlb_wired_index() {
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uint32_t tlbi;
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CVMX_MF_TLB_WIRED(tlbi);
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return tlbi;
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}
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/**
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* Find a free entry that can be used for share memory mapping.
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*
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* @return -1: no free entry found
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* @return : a free entry
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*/
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int cvmx_tlb_allocate_runtime_entry(void)
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{
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uint32_t i, ret = -1;
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for (i = __tlb_wired_index(); i< (uint32_t)cvmx_core_get_tlb_entries(); i++) {
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/* Check to make sure the index is free to use */
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if (__tlb_entry_is_free(i)) {
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/* Found and return */
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ret = i;
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break;
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}
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}
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return ret;
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}
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/**
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* Invalidate the TLB entry. Remove previous mapping if one was set up
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*/
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void cvmx_tlb_free_runtime_entry(uint32_t tlbi)
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{
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/* Invalidate an unwired TLB entry */
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if ((tlbi < (uint32_t)cvmx_core_get_tlb_entries()) && (tlbi >= __tlb_wired_index())) {
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__tlb_write_index(tlbi, 0xffffffff80000000ULL, 0, 0, 0);
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}
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}
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/**
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* Program a single TLB entry to enable the provided vaddr to paddr mapping.
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*
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* @param index Index of the TLB entry
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* @param vaddr The virtual address for this mapping
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* @param paddr The physical address for this mapping
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* @param size Size of the mapping
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* @param tlb_flags Entry mapping flags
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*/
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void cvmx_tlb_write_entry(int index, uint64_t vaddr, uint64_t paddr,
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uint64_t size, uint64_t tlb_flags) {
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uint64_t lo0, lo1, hi, pagemask;
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if ( __is_power_of_two(size) ) {
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if ( (__log2(size) & 1 ) == 0) {
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/* size is not power of 4, we only need to map
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one page, figure out even or odd page to map */
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if ((vaddr >> __log2(size) & 1)) {
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lo0 = 0;
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lo1 = ((paddr >> 12) << 6) | tlb_flags;
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hi = ((vaddr - size) >> 12) << 12;
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}else {
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lo0 = ((paddr >> 12) << 6) | tlb_flags;
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lo1 = 0;
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hi = ((vaddr) >> 12) << 12;
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}
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pagemask = (size - 1) & (~1<<11);
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}else {
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lo0 = ((paddr >> 12)<< 6) | tlb_flags;
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lo1 = (((paddr + size /2) >> 12) << 6) | tlb_flags;
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hi = ((vaddr) >> 12) << 12;
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pagemask = ((size/2) -1) & (~1<<11);
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}
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__tlb_write_index(index, hi, lo0, lo1, pagemask);
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}
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}
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/**
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* Program a single TLB entry to enable the provided vaddr to paddr mapping.
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* This version adds a wired entry that should not be changed at run time
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*
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* @param vaddr The virtual address for this mapping
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* @param paddr The physical address for this mapping
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* @param size Size of the mapping
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* @param tlb_flags Entry mapping flags
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* @return -1: TLB out of entries
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* 0: fixed entry added
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*/
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int cvmx_tlb_add_fixed_entry( uint64_t vaddr, uint64_t paddr, uint64_t size, uint64_t tlb_flags) {
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uint64_t index;
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int ret = 0;
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CVMX_MF_TLB_WIRED(index);
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/* Check to make sure if the index is free to use */
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if (index < (uint32_t)cvmx_core_get_tlb_entries() && __tlb_entry_is_free(index) ) {
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cvmx_tlb_write_entry(index, vaddr, paddr, size, tlb_flags);
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if (!__tlb_entry_is_free(index)) {
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/* Bump up the wired register*/
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CVMX_MT_TLB_WIRED(index + 1);
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ret = 1;
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}
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}
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return ret;
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}
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/**
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* Program a single TLB entry to enable the provided vaddr to paddr mapping.
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* This version writes a runtime entry. It will check the index to make sure
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* not to overwrite any fixed entries.
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*
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* @param index Index of the TLB entry
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* @param vaddr The virtual address for this mapping
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* @param paddr The physical address for this mapping
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* @param size Size of the mapping
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* @param tlb_flags Entry mapping flags
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*/
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void cvmx_tlb_write_runtime_entry(int index, uint64_t vaddr, uint64_t paddr,
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uint64_t size, uint64_t tlb_flags)
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{
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int wired_index;
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CVMX_MF_TLB_WIRED(wired_index);
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if (index >= wired_index) {
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cvmx_tlb_write_entry(index, vaddr, paddr, size, tlb_flags);
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}
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}
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/**
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* Find the TLB index of a given virtual address
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*
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* @param vaddr The virtual address to look up
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* @return -1 not TLB mapped
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* >=0 TLB TLB index
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*/
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int cvmx_tlb_lookup(uint64_t vaddr) {
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uint64_t hi= (vaddr >> 13 ) << 13; /* We always use ASID 0 */
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return __tlb_probe(hi);
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}
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/**
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* Debug routine to show all shared memory mapping
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*/
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void cvmx_tlb_dump_shared_mapping(void) {
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uint32_t tlbi;
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for ( tlbi = __tlb_wired_index(); tlbi<(uint32_t)cvmx_core_get_tlb_entries(); tlbi++ ) {
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__tlb_dump_index(tlbi);
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}
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}
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/**
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* Debug routine to show all TLB entries of this core
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*
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*/
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void cvmx_tlb_dump_all(void) {
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uint32_t tlbi;
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for (tlbi = 0; tlbi<= (uint32_t)cvmx_core_get_tlb_entries(); tlbi++ ) {
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__tlb_dump_index(tlbi);
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}
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}
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