199 lines
4.8 KiB
C
199 lines
4.8 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright 2017 NXP
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*
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*/
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#ifndef __RTE_DPAA_BUS_H__
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#define __RTE_DPAA_BUS_H__
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#include <rte_bus.h>
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#include <rte_mempool.h>
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#include <dpaax_iova_table.h>
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#include <fsl_usd.h>
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#include <fsl_qman.h>
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#include <fsl_bman.h>
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#include <of.h>
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#include <netcfg.h>
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#define DPAA_MEMPOOL_OPS_NAME "dpaa"
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#define DEV_TO_DPAA_DEVICE(ptr) \
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container_of(ptr, struct rte_dpaa_device, device)
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/* DPAA SoC identifier; If this is not available, it can be concluded
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* that board is non-DPAA. Single slot is currently supported.
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*/
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#define DPAA_SOC_ID_FILE "/sys/devices/soc0/soc_id"
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#define SVR_LS1043A_FAMILY 0x87920000
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#define SVR_LS1046A_FAMILY 0x87070000
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#define SVR_MASK 0xffff0000
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extern unsigned int dpaa_svr_family;
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extern RTE_DEFINE_PER_LCORE(bool, dpaa_io);
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struct rte_dpaa_device;
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struct rte_dpaa_driver;
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/* DPAA Device and Driver lists for DPAA bus */
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TAILQ_HEAD(rte_dpaa_device_list, rte_dpaa_device);
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TAILQ_HEAD(rte_dpaa_driver_list, rte_dpaa_driver);
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/* Configuration variables exported from DPAA bus */
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extern struct netcfg_info *dpaa_netcfg;
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enum rte_dpaa_type {
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FSL_DPAA_ETH = 1,
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FSL_DPAA_CRYPTO,
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};
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struct rte_dpaa_bus {
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struct rte_bus bus;
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struct rte_dpaa_device_list device_list;
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struct rte_dpaa_driver_list driver_list;
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int device_count;
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};
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struct dpaa_device_id {
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uint8_t fman_id; /**< Fman interface ID, for ETH type device */
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uint8_t mac_id; /**< Fman MAC interface ID, for ETH type device */
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uint16_t dev_id; /**< Device Identifier from DPDK */
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};
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struct rte_dpaa_device {
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TAILQ_ENTRY(rte_dpaa_device) next;
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struct rte_device device;
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union {
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struct rte_eth_dev *eth_dev;
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struct rte_cryptodev *crypto_dev;
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};
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struct rte_dpaa_driver *driver;
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struct dpaa_device_id id;
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enum rte_dpaa_type device_type; /**< Ethernet or crypto type device */
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char name[RTE_ETH_NAME_MAX_LEN];
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};
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typedef int (*rte_dpaa_probe_t)(struct rte_dpaa_driver *dpaa_drv,
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struct rte_dpaa_device *dpaa_dev);
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typedef int (*rte_dpaa_remove_t)(struct rte_dpaa_device *dpaa_dev);
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struct rte_dpaa_driver {
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TAILQ_ENTRY(rte_dpaa_driver) next;
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struct rte_driver driver;
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struct rte_dpaa_bus *dpaa_bus;
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enum rte_dpaa_type drv_type;
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rte_dpaa_probe_t probe;
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rte_dpaa_remove_t remove;
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};
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struct dpaa_portal {
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uint32_t bman_idx; /**< BMAN Portal ID*/
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uint32_t qman_idx; /**< QMAN Portal ID*/
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uint64_t tid;/**< Parent Thread id for this portal */
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};
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/* Various structures representing contiguous memory maps */
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struct dpaa_memseg {
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TAILQ_ENTRY(dpaa_memseg) next;
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char *vaddr;
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rte_iova_t iova;
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size_t len;
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};
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TAILQ_HEAD(dpaa_memseg_list, dpaa_memseg);
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extern struct dpaa_memseg_list rte_dpaa_memsegs;
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/* Either iterate over the list of internal memseg references or fallback to
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* EAL memseg based iova2virt.
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*/
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static inline void *rte_dpaa_mem_ptov(phys_addr_t paddr)
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{
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struct dpaa_memseg *ms;
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void *va;
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va = dpaax_iova_table_get_va(paddr);
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if (likely(va != NULL))
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return va;
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/* Check if the address is already part of the memseg list internally
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* maintained by the dpaa driver.
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*/
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TAILQ_FOREACH(ms, &rte_dpaa_memsegs, next) {
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if (paddr >= ms->iova && paddr <
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ms->iova + ms->len)
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return RTE_PTR_ADD(ms->vaddr, (uintptr_t)(paddr - ms->iova));
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}
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/* If not, Fallback to full memseg list searching */
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return rte_mem_iova2virt(paddr);
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}
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/**
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* Register a DPAA driver.
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*
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* @param driver
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* A pointer to a rte_dpaa_driver structure describing the driver
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* to be registered.
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*/
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void rte_dpaa_driver_register(struct rte_dpaa_driver *driver);
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/**
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* Unregister a DPAA driver.
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*
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* @param driver
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* A pointer to a rte_dpaa_driver structure describing the driver
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* to be unregistered.
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*/
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void rte_dpaa_driver_unregister(struct rte_dpaa_driver *driver);
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/**
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* Initialize a DPAA portal
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*
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* @param arg
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* Per thread ID
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*
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* @return
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* 0 in case of success, error otherwise
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*/
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int rte_dpaa_portal_init(void *arg);
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int rte_dpaa_portal_fq_init(void *arg, struct qman_fq *fq);
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int rte_dpaa_portal_fq_close(struct qman_fq *fq);
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/**
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* Cleanup a DPAA Portal
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*/
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void dpaa_portal_finish(void *arg);
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/** Helper for DPAA device registration from driver (eth, crypto) instance */
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#define RTE_PMD_REGISTER_DPAA(nm, dpaa_drv) \
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RTE_INIT(dpaainitfn_ ##nm) \
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{\
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(dpaa_drv).driver.name = RTE_STR(nm);\
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rte_dpaa_driver_register(&dpaa_drv); \
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} \
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RTE_PMD_EXPORT_NAME(nm, __COUNTER__)
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/* Create storage for dqrr entries per lcore */
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#define DPAA_PORTAL_DEQUEUE_DEPTH 16
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struct dpaa_portal_dqrr {
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void *mbuf[DPAA_PORTAL_DEQUEUE_DEPTH];
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uint64_t dqrr_held;
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uint8_t dqrr_size;
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};
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RTE_DECLARE_PER_LCORE(struct dpaa_portal_dqrr, held_bufs);
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#define DPAA_PER_LCORE_DQRR_SIZE RTE_PER_LCORE(held_bufs).dqrr_size
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#define DPAA_PER_LCORE_DQRR_HELD RTE_PER_LCORE(held_bufs).dqrr_held
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#define DPAA_PER_LCORE_DQRR_MBUF(i) RTE_PER_LCORE(held_bufs).mbuf[i]
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#ifdef __cplusplus
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}
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#endif
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#endif /* __RTE_DPAA_BUS_H__ */
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