276 lines
7.0 KiB
C
276 lines
7.0 KiB
C
/*-
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* Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
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* Copyright (c) 2010-2011, Juli Mallett <jmallett@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Watchdog driver for Cavium Octeon
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/watchdog.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/sysctl.h>
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#include <sys/rman.h>
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#include <sys/smp.h>
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#include <contrib/octeon-sdk/cvmx.h>
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#include <mips/cavium/octeon_irq.h>
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#define DEFAULT_TIMER_VAL 65535
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struct octeon_wdog_softc {
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device_t sc_dev;
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struct octeon_wdog_core_softc {
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int csc_core;
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struct resource *csc_intr;
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void *csc_intr_cookie;
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} sc_cores[MAXCPU];
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int sc_armed;
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int sc_debug;
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};
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extern void octeon_wdog_nmi_handler(void);
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void octeon_wdog_nmi(void);
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static void octeon_watchdog_arm_core(int);
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static void octeon_watchdog_disarm_core(int);
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static int octeon_wdog_attach(device_t);
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static void octeon_wdog_identify(driver_t *, device_t);
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static int octeon_wdog_intr(void *);
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static int octeon_wdog_probe(device_t);
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static void octeon_wdog_setup(struct octeon_wdog_softc *, int);
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static void octeon_wdog_sysctl(device_t);
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static void octeon_wdog_watchdog_fn(void *, u_int, int *);
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void
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octeon_wdog_nmi(void)
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{
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int core;
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core = cvmx_get_core_num();
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printf("cpu%u: NMI detected\n", core);
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printf("cpu%u: Exception PC: %p\n", core, (void *)mips_rd_excpc());
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printf("cpu%u: status %#x cause %#x\n", core, mips_rd_status(), mips_rd_cause());
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/*
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* This is the end
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* Beautiful friend
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*
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* Just wait for Soft Reset to come and take us
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*/
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for (;;)
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continue;
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}
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static void
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octeon_watchdog_arm_core(int core)
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{
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cvmx_ciu_wdogx_t ciu_wdog;
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/* Poke it! */
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cvmx_write_csr(CVMX_CIU_PP_POKEX(core), 1);
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/*
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* XXX
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* Perhaps if KDB is enabled, we should use mode=2 and drop into the
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* debugger on NMI?
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*
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* XXX
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* Timer should be calculated based on CPU frquency
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*/
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ciu_wdog.u64 = 0;
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ciu_wdog.s.len = DEFAULT_TIMER_VAL;
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ciu_wdog.s.mode = 3;
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cvmx_write_csr(CVMX_CIU_WDOGX(core), ciu_wdog.u64);
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}
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static void
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octeon_watchdog_disarm_core(int core)
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{
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cvmx_write_csr(CVMX_CIU_WDOGX(core), 0);
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}
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static void
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octeon_wdog_watchdog_fn(void *private, u_int cmd, int *error)
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{
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struct octeon_wdog_softc *sc = private;
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int core;
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cmd &= WD_INTERVAL;
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if (sc->sc_debug)
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device_printf(sc->sc_dev, "%s: cmd: %x\n", __func__, cmd);
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if (cmd > 0) {
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CPU_FOREACH(core)
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octeon_watchdog_arm_core(core);
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sc->sc_armed = 1;
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*error = 0;
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} else {
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if (sc->sc_armed) {
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CPU_FOREACH(core)
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octeon_watchdog_disarm_core(core);
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sc->sc_armed = 0;
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}
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}
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}
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static void
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octeon_wdog_sysctl(device_t dev)
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{
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struct octeon_wdog_softc *sc = device_get_softc(dev);
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struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
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struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
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SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
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"debug", CTLFLAG_RW, &sc->sc_debug, 0,
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"enable watchdog debugging");
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SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
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"armed", CTLFLAG_RD, &sc->sc_armed, 0,
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"whether the watchdog is armed");
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}
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static void
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octeon_wdog_setup(struct octeon_wdog_softc *sc, int core)
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{
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struct octeon_wdog_core_softc *csc;
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int rid, error;
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csc = &sc->sc_cores[core];
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csc->csc_core = core;
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/* Interrupt part */
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rid = 0;
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csc->csc_intr = bus_alloc_resource(sc->sc_dev, SYS_RES_IRQ, &rid,
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OCTEON_IRQ_WDOG0 + core, OCTEON_IRQ_WDOG0 + core, 1, RF_ACTIVE);
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if (csc->csc_intr == NULL)
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panic("%s: bus_alloc_resource for core %u failed",
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__func__, core);
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error = bus_setup_intr(sc->sc_dev, csc->csc_intr, INTR_TYPE_MISC,
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octeon_wdog_intr, NULL, csc, &csc->csc_intr_cookie);
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if (error != 0)
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panic("%s: bus_setup_intr for core %u: %d", __func__, core,
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error);
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bus_bind_intr(sc->sc_dev, csc->csc_intr, core);
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bus_describe_intr(sc->sc_dev, csc->csc_intr, csc->csc_intr_cookie,
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"cpu%u", core);
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if (sc->sc_armed) {
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/* Armed by default. */
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octeon_watchdog_arm_core(core);
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} else {
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/* Disarmed by default. */
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octeon_watchdog_disarm_core(core);
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}
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}
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static int
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octeon_wdog_intr(void *arg)
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{
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struct octeon_wdog_core_softc *csc = arg;
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KASSERT(csc->csc_core == cvmx_get_core_num(),
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("got watchdog interrupt for core %u on core %u.",
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csc->csc_core, cvmx_get_core_num()));
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(void)csc;
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/* Poke it! */
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cvmx_write_csr(CVMX_CIU_PP_POKEX(cvmx_get_core_num()), 1);
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return (FILTER_HANDLED);
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}
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static int
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octeon_wdog_probe(device_t dev)
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{
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device_set_desc(dev, "Cavium Octeon watchdog timer");
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return (0);
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}
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static int
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octeon_wdog_attach(device_t dev)
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{
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struct octeon_wdog_softc *sc = device_get_softc(dev);
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uint64_t *nmi_handler = (uint64_t*)octeon_wdog_nmi_handler;
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int core, i;
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/* Initialise */
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sc->sc_armed = 0; /* XXX Ought to be a tunable / config option. */
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sc->sc_debug = 0;
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sc->sc_dev = dev;
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EVENTHANDLER_REGISTER(watchdog_list, octeon_wdog_watchdog_fn, sc, 0);
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octeon_wdog_sysctl(dev);
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for (i = 0; i < 16; i++) {
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cvmx_write_csr(CVMX_MIO_BOOT_LOC_ADR, i * 8);
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cvmx_write_csr(CVMX_MIO_BOOT_LOC_DAT, nmi_handler[i]);
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}
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cvmx_write_csr(CVMX_MIO_BOOT_LOC_CFGX(0), 0x81fc0000);
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CPU_FOREACH(core)
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octeon_wdog_setup(sc, core);
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return (0);
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}
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static void
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octeon_wdog_identify(driver_t *drv, device_t parent)
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{
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BUS_ADD_CHILD(parent, 0, "owdog", 0);
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}
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static device_method_t octeon_wdog_methods[] = {
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DEVMETHOD(device_identify, octeon_wdog_identify),
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DEVMETHOD(device_probe, octeon_wdog_probe),
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DEVMETHOD(device_attach, octeon_wdog_attach),
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{0, 0},
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};
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static driver_t octeon_wdog_driver = {
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"owdog",
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octeon_wdog_methods,
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sizeof(struct octeon_wdog_softc),
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};
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static devclass_t octeon_wdog_devclass;
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DRIVER_MODULE(owdog, ciu, octeon_wdog_driver, octeon_wdog_devclass, 0, 0);
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