353 lines
8.2 KiB
C
353 lines
8.2 KiB
C
/*-
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* Copyright (c) 2015 Stanislav Galabov
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* Copyright (c) 2015 Alexander Kabaev
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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* without modification, immediately at the beginning of the file.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include "opt_platform.h"
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/ktr.h>
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#include <sys/module.h>
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#include <sys/malloc.h>
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#include <sys/rman.h>
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#include <sys/pcpu.h>
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#include <sys/proc.h>
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#include <sys/cpuset.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/smp.h>
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#include <sys/sched.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <machine/smp.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include "pic_if.h"
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#define MTK_NIRQS 32
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#define MTK_IRQ0STAT 0x009c
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#define MTK_IRQ1STAT 0x00a0
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#define MTK_INTTYPE 0x0000
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#define MTK_INTRAW 0x00a4
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#define MTK_INTENA 0x0080
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#define MTK_INTDIS 0x0078
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static int mtk_pic_intr(void *);
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struct mtk_pic_irqsrc {
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struct intr_irqsrc isrc;
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u_int irq;
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};
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struct mtk_pic_softc {
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device_t pic_dev;
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void * pic_intrhand;
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struct resource * pic_res[2];
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struct mtk_pic_irqsrc pic_irqs[MTK_NIRQS];
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struct mtx mutex;
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uint32_t nirqs;
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};
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#define PIC_INTR_ISRC(sc, irq) (&(sc)->pic_irqs[(irq)].isrc)
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static struct resource_spec mtk_pic_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE }, /* Registers */
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{ SYS_RES_IRQ, 0, RF_ACTIVE }, /* Parent interrupt 1 */
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// { SYS_RES_IRQ, 1, RF_ACTIVE }, /* Parent interrupt 2 */
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{ -1, 0 }
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};
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static struct ofw_compat_data compat_data[] = {
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{ "ralink,mt7628an-intc", 1 },
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{ NULL, 0 }
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};
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#define READ4(_sc, _reg) bus_read_4((_sc)->pic_res[0], _reg)
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#define WRITE4(_sc, _reg, _val) bus_write_4((_sc)->pic_res[0], _reg, _val)
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static int
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mtk_pic_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return (ENXIO);
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device_set_desc(dev, "MTK Interrupt Controller (v2)");
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return (BUS_PROBE_DEFAULT);
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}
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static inline void
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pic_irq_unmask(struct mtk_pic_softc *sc, u_int irq)
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{
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WRITE4(sc, MTK_INTENA, (1u << (irq)));
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}
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static inline void
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pic_irq_mask(struct mtk_pic_softc *sc, u_int irq)
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{
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WRITE4(sc, MTK_INTDIS, (1u << (irq)));
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}
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static inline intptr_t
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pic_xref(device_t dev)
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{
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return (OF_xref_from_node(ofw_bus_get_node(dev)));
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}
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static int
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mtk_pic_register_isrcs(struct mtk_pic_softc *sc)
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{
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int error;
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uint32_t irq;
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struct intr_irqsrc *isrc;
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const char *name;
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name = device_get_nameunit(sc->pic_dev);
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for (irq = 0; irq < sc->nirqs; irq++) {
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sc->pic_irqs[irq].irq = irq;
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isrc = PIC_INTR_ISRC(sc, irq);
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error = intr_isrc_register(isrc, sc->pic_dev, 0, "%s", name);
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if (error != 0) {
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/* XXX call intr_isrc_deregister */
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device_printf(sc->pic_dev, "%s failed", __func__);
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return (error);
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}
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}
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return (0);
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}
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static int
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mtk_pic_attach(device_t dev)
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{
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struct mtk_pic_softc *sc;
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intptr_t xref = pic_xref(dev);
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sc = device_get_softc(dev);
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if (bus_alloc_resources(dev, mtk_pic_spec, sc->pic_res)) {
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device_printf(dev, "could not allocate resources\n");
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return (ENXIO);
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}
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sc->pic_dev = dev;
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/* Initialize mutex */
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mtx_init(&sc->mutex, "PIC lock", "", MTX_SPIN);
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/* Set the number of interrupts */
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sc->nirqs = nitems(sc->pic_irqs);
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/* Mask all interrupts */
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WRITE4(sc, MTK_INTDIS, 0xFFFFFFFF);
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/* But enable interrupt generation/masking */
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WRITE4(sc, MTK_INTENA, 0x00000000);
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/* Set all interrupts to type 0 */
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WRITE4(sc, MTK_INTTYPE, 0xFFFFFFFF);
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/* Register the interrupts */
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if (mtk_pic_register_isrcs(sc) != 0) {
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device_printf(dev, "could not register PIC ISRCs\n");
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goto cleanup;
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}
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/*
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* Now, when everything is initialized, it's right time to
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* register interrupt controller to interrupt framefork.
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*/
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if (intr_pic_register(dev, xref) == NULL) {
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device_printf(dev, "could not register PIC\n");
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goto cleanup;
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}
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if (bus_setup_intr(dev, sc->pic_res[1], INTR_TYPE_CLK,
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mtk_pic_intr, NULL, sc, &sc->pic_intrhand)) {
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device_printf(dev, "could not setup irq handler\n");
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intr_pic_deregister(dev, xref);
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goto cleanup;
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}
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return (0);
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cleanup:
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bus_release_resources(dev, mtk_pic_spec, sc->pic_res);
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return(ENXIO);
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}
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static int
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mtk_pic_intr(void *arg)
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{
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struct mtk_pic_softc *sc = arg;
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struct thread *td;
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uint32_t i, intr;
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td = curthread;
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/* Workaround: do not inflate intr nesting level */
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td->td_intr_nesting_level--;
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#ifdef _notyet_
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intr = READ4(sc, MTK_IRQ1STAT);
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while ((i = fls(intr)) != 0) {
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i--;
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intr &= ~(1u << i);
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if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i),
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curthread->td_intr_frame) != 0) {
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device_printf(sc->pic_dev,
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"Stray interrupt %u detected\n", i);
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pic_irq_mask(sc, i);
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continue;
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}
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}
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KASSERT(i == 0, ("all interrupts handled"));
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#endif
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intr = READ4(sc, MTK_IRQ0STAT);
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while ((i = fls(intr)) != 0) {
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i--;
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intr &= ~(1u << i);
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if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i),
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curthread->td_intr_frame) != 0) {
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device_printf(sc->pic_dev,
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"Stray interrupt %u detected\n", i);
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pic_irq_mask(sc, i);
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continue;
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}
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}
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KASSERT(i == 0, ("all interrupts handled"));
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td->td_intr_nesting_level++;
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return (FILTER_HANDLED);
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}
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static int
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mtk_pic_map_intr(device_t dev, struct intr_map_data *data,
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struct intr_irqsrc **isrcp)
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{
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#ifdef FDT
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struct intr_map_data_fdt *daf;
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struct mtk_pic_softc *sc;
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if (data->type != INTR_MAP_DATA_FDT)
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return (ENOTSUP);
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sc = device_get_softc(dev);
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daf = (struct intr_map_data_fdt *)data;
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if (daf->ncells != 1 || daf->cells[0] >= sc->nirqs)
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return (EINVAL);
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*isrcp = PIC_INTR_ISRC(sc, daf->cells[0]);
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return (0);
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#else
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return (ENOTSUP);
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#endif
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}
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static void
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mtk_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
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{
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u_int irq;
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irq = ((struct mtk_pic_irqsrc *)isrc)->irq;
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pic_irq_unmask(device_get_softc(dev), irq);
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}
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static void
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mtk_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
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{
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u_int irq;
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irq = ((struct mtk_pic_irqsrc *)isrc)->irq;
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pic_irq_mask(device_get_softc(dev), irq);
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}
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static void
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mtk_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
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{
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mtk_pic_disable_intr(dev, isrc);
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}
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static void
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mtk_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
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{
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mtk_pic_enable_intr(dev, isrc);
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}
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static void
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mtk_pic_post_filter(device_t dev, struct intr_irqsrc *isrc)
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{
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}
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static device_method_t mtk_pic_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, mtk_pic_probe),
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DEVMETHOD(device_attach, mtk_pic_attach),
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/* Interrupt controller interface */
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DEVMETHOD(pic_disable_intr, mtk_pic_disable_intr),
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DEVMETHOD(pic_enable_intr, mtk_pic_enable_intr),
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DEVMETHOD(pic_map_intr, mtk_pic_map_intr),
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DEVMETHOD(pic_post_filter, mtk_pic_post_filter),
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DEVMETHOD(pic_post_ithread, mtk_pic_post_ithread),
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DEVMETHOD(pic_pre_ithread, mtk_pic_pre_ithread),
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{ 0, 0 }
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};
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static driver_t mtk_pic_driver = {
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"intc",
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mtk_pic_methods,
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sizeof(struct mtk_pic_softc),
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};
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static devclass_t mtk_pic_devclass;
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EARLY_DRIVER_MODULE(intc_v2, simplebus, mtk_pic_driver, mtk_pic_devclass, 0, 0,
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BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
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