944 lines
31 KiB
C
944 lines
31 KiB
C
/***********************license start***************
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* Copyright (c) 2003-2010 Cavium Inc. (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of Cavium Inc. nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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* This Software, including technical data, may be subject to U.S. export control
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* laws, including the U.S. Export Administration Act and its associated
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* regulations, and may be subject to export or import regulations in other
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* countries.
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
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* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
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* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
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* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
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* SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
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* MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
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* VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
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* CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
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* PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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***********************license end**************************************/
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/**
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* @file
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*
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* Interface to the Trace buffer hardware.
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*
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* <hr>$Revision: 30644 $<hr>
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*/
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#ifdef CVMX_BUILD_FOR_LINUX_KERNEL
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#include <linux/module.h>
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#include <asm/octeon/cvmx.h>
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#include <asm/octeon/cvmx-tra.h>
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#include <asm/octeon/cvmx-l2c.h>
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#else
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#include "cvmx.h"
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#include "cvmx-tra.h"
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#include "cvmx-l2c.h"
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#endif
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static const char *TYPE_ARRAY[] = {
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"DWB - Don't write back",
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"PL2 - Prefetch into L2",
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"PSL1 - Dcache fill, skip L2",
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"LDD - Dcache fill",
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"LDI - Icache/IO fill",
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"LDT - Icache/IO fill, skip L2",
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"STF - Store full",
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"STC - Store conditional",
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"STP - Store partial",
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"STT - Store full, skip L2",
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"IOBLD8 - IOB 8bit load",
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"IOBLD16 - IOB 16bit load",
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"IOBLD32 - IOB 32bit load",
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"IOBLD64 - IOB 64bit load",
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"IOBST - IOB store",
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"IOBDMA - Async IOB",
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"SAA - Store atomic add",
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"RSVD17",
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"RSVD18",
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"RSVD19",
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"RSVD20",
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"RSVD21",
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"RSVD22",
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"RSVD23",
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"RSVD24",
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"RSVD25",
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"RSVD26",
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"RSVD27",
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"RSVD28",
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"RSVD29",
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"RSVD30",
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"RSVD31"
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};
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static const char *TYPE_ARRAY2[] = {
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"NOP - None",
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"LDT - Icache/IO fill, skip L2",
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"LDI - Icache/IO fill",
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"PL2 - Prefetch into L2",
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"RPL2 - Mark for replacement in L2",
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"DWB - Don't write back",
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"RSVD6",
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"RSVD7",
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"LDD - Dcache fill",
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"PSL1 - Prefetch L1, skip L2",
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"RSVD10",
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"RSVD11",
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"RSVD12",
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"RSVD13",
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"RSVD14",
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"IOBDMA - Async IOB",
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"STF - Store full",
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"STT - Store full, skip L2",
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"STP - Store partial",
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"STC - Store conditional",
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"STFIL1 - Store full, invalidate L1",
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"STTIL1 - Store full, skip L2, invalidate L1",
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"FAS32 - Atomic 32bit swap",
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"FAS64 - Atomic 64bit swap",
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"WBIL2i - Writeback, invalidate, by index/way",
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"LTGL2i - Read tag@index/way",
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"STGL2i - Write tag@index/way",
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"RSVD27",
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"INVL2 - Invalidate, by address",
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"WBIL2 - Writeback, invalidate, by address",
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"WBL2 - Writeback, by address",
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"LCKL2 - Allocate, lock, by address",
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"IOBLD8 - IOB 8bit load",
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"IOBLD16 - IOB 16bit load",
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"IOBLD32 - IOB 32bit load",
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"IOBLD64 - IOB 64bit load",
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"IOBST8 - IOB 8bit store",
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"IOBST16 - IOB 16bit store",
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"IOBST32 - IOB 32bit store",
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"IOBST64 - IOB 64bit store",
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"SET8 - 8bit Atomic swap with 1's",
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"SET16 - 16bit Atomic swap with 1's",
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"SET32 - 32bit Atomic swap with 1's",
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"SET64 - 64bit Atomic swap with 1's",
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"CLR8 - 8bit Atomic swap with 0's",
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"CLR16 - 16bit Atomic swap with 0's",
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"CLR32 - 32bit Atomic swap with 0's",
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"CLR64 - 64bit Atomic swap with 0's",
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"INCR8 - 8bit Atomic fetch & add by 1",
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"INCR16 - 16bit Atomic fetch & add by 1",
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"INCR32 - 32bit Atomic fetch & add by 1",
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"INCR64 - 64bit Atomic fetch & add by 1",
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"DECR8 - 8bit Atomic fetch & add by -1",
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"DECR16 - 16bit Atomic fetch & add by -1",
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"DECR32 - 32bit Atomic fetch & add by -1",
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"DECR64 - 64bit Atomic fetch & add by -1",
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"RSVD56",
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"RSVD57",
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"FAA32 - 32bit Atomic fetch and add",
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"FAA64 - 64bit Atomic fetch and add",
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"RSVD60",
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"RSVD61",
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"SAA32 - 32bit Atomic add",
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"SAA64 - 64bit Atomic add"
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};
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static const char *SOURCE_ARRAY[] = {
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"PP0",
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"PP1",
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"PP2",
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"PP3",
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"PP4",
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"PP5",
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"PP6",
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"PP7",
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"PP8",
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"PP9",
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"PP10",
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"PP11",
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"PP12",
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"PP13",
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"PP14",
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"PP15",
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"PIP/IPD",
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"PKO-R",
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"FPA/TIM/DFA/PCI/ZIP/POW/PKO-W",
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"DWB",
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"RSVD20",
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"RSVD21",
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"RSVD22",
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"RSVD23",
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"RSVD24",
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"RSVD25",
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"RSVD26",
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"RSVD27",
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"RSVD28",
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"RSVD29",
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"RSVD30",
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"RSVD31",
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"PP16",
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"PP17",
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"PP18",
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"PP19",
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"PP20",
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"PP21",
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"PP22",
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"PP23",
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"PP24",
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"PP25",
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"PP26",
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"PP27",
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"PP28",
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"PP29",
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"PP30",
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"PP31"
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};
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static const char *DEST_ARRAY[] = {
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"CIU/GPIO",
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"RSVD1",
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"RSVD2",
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"PCI/PCIe/SLI",
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"KEY",
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"FPA",
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"DFA",
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"ZIP",
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"RNG",
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"IPD",
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"PKO",
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"RSVD11",
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"POW",
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"USB0",
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"RAD",
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"RSVD15",
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"RSVD16",
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"RSVD17",
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"RSVD18",
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"RSVD19",
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"RSVD20",
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"RSVD21",
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"RSVD22",
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"RSVD23",
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"RSVD24",
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"RSVD25",
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"RSVD26",
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"DPI",
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"RSVD28",
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"RSVD29",
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"FAU",
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"RSVD31"
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};
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int _cvmx_tra_unit = 0;
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#define CVMX_TRA_SOURCE_MASK (OCTEON_IS_MODEL(OCTEON_CN63XX) ? 0xf00ff : 0xfffff)
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#define CVMX_TRA_DESTINATION_MASK 0xfffffffful
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/**
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* @INTERNAL
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* Setup the trace buffer filter command mask. The bit position of filter commands
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* are different for each Octeon model.
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*
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* @param filter Which event to log
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* @return Bitmask of filter command based on the event.
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*/
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static uint64_t __cvmx_tra_set_filter_cmd_mask(cvmx_tra_filt_t filter)
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{
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cvmx_tra_filt_cmd_t filter_command;
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if (OCTEON_IS_MODEL(OCTEON_CN3XXX) || OCTEON_IS_MODEL(OCTEON_CN5XXX))
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{
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/* Bit positions of filter commands are different, map it accordingly */
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uint64_t cmd = 0;
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if ((filter & CVMX_TRA_FILT_ALL) == -1ull)
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{
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if (OCTEON_IS_MODEL(OCTEON_CN5XXX))
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cmd = 0x1ffff;
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else
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cmd = 0xffff;
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}
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if (filter & CVMX_TRA_FILT_DWB)
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cmd |= 1ull<<0;
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if (filter & CVMX_TRA_FILT_PL2)
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cmd |= 1ull<<1;
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if (filter & CVMX_TRA_FILT_PSL1)
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cmd |= 1ull<<2;
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if (filter & CVMX_TRA_FILT_LDD)
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cmd |= 1ull<<3;
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if (filter & CVMX_TRA_FILT_LDI)
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cmd |= 1ull<<4;
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if (filter & CVMX_TRA_FILT_LDT)
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cmd |= 1ull<<5;
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if (filter & CVMX_TRA_FILT_STF)
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cmd |= 1ull<<6;
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if (filter & CVMX_TRA_FILT_STC)
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cmd |= 1ull<<7;
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if (filter & CVMX_TRA_FILT_STP)
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cmd |= 1ull<<8;
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if (filter & CVMX_TRA_FILT_STT)
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cmd |= 1ull<<9;
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if (filter & CVMX_TRA_FILT_IOBLD8)
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cmd |= 1ull<<10;
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if (filter & CVMX_TRA_FILT_IOBLD16)
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cmd |= 1ull<<11;
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if (filter & CVMX_TRA_FILT_IOBLD32)
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cmd |= 1ull<<12;
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if (filter & CVMX_TRA_FILT_IOBLD64)
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cmd |= 1ull<<13;
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if (filter & CVMX_TRA_FILT_IOBST)
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cmd |= 1ull<<14;
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if (filter & CVMX_TRA_FILT_IOBDMA)
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cmd |= 1ull<<15;
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if (OCTEON_IS_MODEL(OCTEON_CN5XXX) && (filter & CVMX_TRA_FILT_SAA))
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cmd |= 1ull<<16;
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filter_command.u64 = cmd;
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}
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else
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{
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if ((filter & CVMX_TRA_FILT_ALL) == -1ull)
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filter_command.u64 = CVMX_TRA_FILT_ALL;
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else
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filter_command.u64 = filter;
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filter_command.cn63xx.reserved_60_61 = 0;
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filter_command.cn63xx.reserved_56_57 = 0;
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filter_command.cn63xx.reserved_27_27 = 0;
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filter_command.cn63xx.reserved_10_14 = 0;
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filter_command.cn63xx.reserved_6_7 = 0;
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}
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return filter_command.u64;
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}
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/**
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* Setup the TRA buffer for use
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*
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* @param control TRA control setup
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* @param filter Which events to log
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* @param source_filter
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* Source match
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* @param dest_filter
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* Destination match
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* @param address Address compare
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* @param address_mask
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* Address mask
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*/
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void cvmx_tra_setup(cvmx_tra_ctl_t control, cvmx_tra_filt_t filter,
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cvmx_tra_sid_t source_filter, cvmx_tra_did_t dest_filter,
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uint64_t address, uint64_t address_mask)
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{
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cvmx_tra_filt_cmd_t filt_cmd;
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cvmx_tra_filt_sid_t filt_sid;
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cvmx_tra_filt_did_t filt_did;
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int tad;
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filt_cmd.u64 = __cvmx_tra_set_filter_cmd_mask(filter);
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filt_sid.u64 = source_filter & CVMX_TRA_SOURCE_MASK;
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filt_did.u64 = dest_filter & CVMX_TRA_DESTINATION_MASK;
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/* Address filtering does not work when IOBDMA filter command is enabled
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because of some caveats. Disable the IOBDMA filter command. */
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if ((OCTEON_IS_MODEL(OCTEON_CN6XXX) || OCTEON_IS_MODEL(OCTEON_CNF7XXX))
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&& ((filt_cmd.u64 & CVMX_TRA_FILT_IOBDMA) == CVMX_TRA_FILT_IOBDMA)
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&& address_mask != 0)
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{
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cvmx_dprintf("The address-based filtering does not work with IOBDMAs, disabling the filter command.\n");
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filt_cmd.u64 &= ~(CVMX_TRA_FILT_IOBDMA);
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}
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/* In OcteonII pass2, the mode bit is added to enable reading the trace
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buffer data from different registers for lower and upper 64-bit value.
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This bit is reserved in other Octeon models. */
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control.s.rdat_md = 1;
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for (tad = 0; tad < CVMX_L2C_TADS; tad++)
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{
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cvmx_write_csr(CVMX_TRAX_CTL(tad), control.u64);
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cvmx_write_csr(CVMX_TRAX_FILT_CMD(tad), filt_cmd.u64);
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cvmx_write_csr(CVMX_TRAX_FILT_SID(tad), filt_sid.u64);
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cvmx_write_csr(CVMX_TRAX_FILT_DID(tad), filt_did.u64);
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cvmx_write_csr(CVMX_TRAX_FILT_ADR_ADR(tad), address);
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cvmx_write_csr(CVMX_TRAX_FILT_ADR_MSK(tad), address_mask);
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}
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}
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#ifdef CVMX_BUILD_FOR_LINUX_KERNEL
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EXPORT_SYMBOL(cvmx_tra_setup);
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#endif
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/**
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* Setup each TRA buffer for use
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*
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* @param tra Which TRA buffer to use (0-3)
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* @param control TRA control setup
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* @param filter Which events to log
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* @param source_filter
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* Source match
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* @param dest_filter
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* Destination match
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* @param address Address compare
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* @param address_mask
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* Address mask
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*/
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void cvmx_tra_setup_v2(int tra, cvmx_tra_ctl_t control, cvmx_tra_filt_t filter,
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cvmx_tra_sid_t source_filter, cvmx_tra_did_t dest_filter,
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uint64_t address, uint64_t address_mask)
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{
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cvmx_tra_filt_cmd_t filt_cmd;
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cvmx_tra_filt_sid_t filt_sid;
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cvmx_tra_filt_did_t filt_did;
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if ((tra + 1) > CVMX_L2C_TADS)
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{
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cvmx_dprintf("cvmx_tra_setup_per_tra: Invalid tra(%d), max allowed (%d)\n", tra, CVMX_L2C_TADS - 1);
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tra = 0;
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}
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filt_cmd.u64 = __cvmx_tra_set_filter_cmd_mask(filter);
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filt_sid.u64 = source_filter & CVMX_TRA_SOURCE_MASK;
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filt_did.u64 = dest_filter & CVMX_TRA_DESTINATION_MASK;
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/* Address filtering does not work when IOBDMA filter command is enabled
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because of some caveats. Disable the IOBDMA filter command. */
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if ((OCTEON_IS_MODEL(OCTEON_CN6XXX) || OCTEON_IS_MODEL(OCTEON_CNF7XXX))
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&& ((filt_cmd.u64 & CVMX_TRA_FILT_IOBDMA) == CVMX_TRA_FILT_IOBDMA)
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&& address_mask != 0)
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{
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cvmx_dprintf("The address-based filtering does not work with IOBDMAs, disabling the filter command.\n");
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filt_cmd.u64 &= ~(CVMX_TRA_FILT_IOBDMA);
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}
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/* In OcteonII pass2, the mode bit is added to enable reading the trace
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buffer data from different registers for lower and upper 64-bit value.
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This bit is reserved in other Octeon models. */
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control.s.rdat_md = 1;
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cvmx_write_csr(CVMX_TRAX_CTL(tra), control.u64);
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cvmx_write_csr(CVMX_TRAX_FILT_CMD(tra), filt_cmd.u64);
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cvmx_write_csr(CVMX_TRAX_FILT_SID(tra), filt_sid.u64);
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cvmx_write_csr(CVMX_TRAX_FILT_DID(tra), filt_did.u64);
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cvmx_write_csr(CVMX_TRAX_FILT_ADR_ADR(tra), address);
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cvmx_write_csr(CVMX_TRAX_FILT_ADR_MSK(tra), address_mask);
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}
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#ifdef CVMX_BUILD_FOR_LINUX_KERNEL
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EXPORT_SYMBOL(cvmx_tra_setup_v2);
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#endif
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/**
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* Setup a TRA trigger. How the triggers are used should be
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* setup using cvmx_tra_setup.
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*
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* @param trigger Trigger to setup (0 or 1)
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* @param filter Which types of events to trigger on
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* @param source_filter
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* Source trigger match
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* @param dest_filter
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* Destination trigger match
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* @param address Trigger address compare
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* @param address_mask
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* Trigger address mask
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*/
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void cvmx_tra_trig_setup(uint64_t trigger, cvmx_tra_filt_t filter,
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cvmx_tra_sid_t source_filter, cvmx_tra_did_t dest_filter,
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uint64_t address, uint64_t address_mask)
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{
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cvmx_tra_filt_cmd_t tra_filt_cmd;
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cvmx_tra_filt_sid_t tra_filt_sid;
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cvmx_tra_filt_did_t tra_filt_did;
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int tad;
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|
|
tra_filt_cmd.u64 = __cvmx_tra_set_filter_cmd_mask(filter);
|
|
tra_filt_sid.u64 = source_filter & CVMX_TRA_SOURCE_MASK;
|
|
tra_filt_did.u64 = dest_filter & CVMX_TRA_DESTINATION_MASK;
|
|
|
|
/* Address filtering does not work when IOBDMA filter command is enabled
|
|
because of some caveats. Disable the IOBDMA filter command. */
|
|
if ((OCTEON_IS_MODEL(OCTEON_CN6XXX) || OCTEON_IS_MODEL(OCTEON_CNF7XXX))
|
|
&& ((tra_filt_cmd.u64 & CVMX_TRA_FILT_IOBDMA) == CVMX_TRA_FILT_IOBDMA)
|
|
&& address_mask != 0)
|
|
{
|
|
cvmx_dprintf("The address-based filtering does not work with IOBDMAs, disabling the filter command.\n");
|
|
tra_filt_cmd.u64 &= ~(CVMX_TRA_FILT_IOBDMA);
|
|
}
|
|
|
|
for (tad = 0; tad < CVMX_L2C_TADS; tad++)
|
|
{
|
|
cvmx_write_csr(CVMX_TRAX_TRIG0_CMD(tad) + trigger * 64, tra_filt_cmd.u64);
|
|
cvmx_write_csr(CVMX_TRAX_TRIG0_SID(tad) + trigger * 64, tra_filt_sid.u64);
|
|
cvmx_write_csr(CVMX_TRAX_TRIG0_DID(tad) + trigger * 64, tra_filt_did.u64);
|
|
cvmx_write_csr(CVMX_TRAX_TRIG0_ADR_ADR(tad) + trigger * 64, address);
|
|
cvmx_write_csr(CVMX_TRAX_TRIG0_ADR_MSK(tad) + trigger * 64, address_mask);
|
|
}
|
|
}
|
|
#ifdef CVMX_BUILD_FOR_LINUX_KERNEL
|
|
EXPORT_SYMBOL(cvmx_tra_trig_setup);
|
|
#endif
|
|
|
|
/**
|
|
* Setup each TRA trigger. How the triggers are used should be
|
|
* setup using cvmx_tra_setup.
|
|
*
|
|
* @param tra Which TRA buffer to use (0-3)
|
|
* @param trigger Trigger to setup (0 or 1)
|
|
* @param filter Which types of events to trigger on
|
|
* @param source_filter
|
|
* Source trigger match
|
|
* @param dest_filter
|
|
* Destination trigger match
|
|
* @param address Trigger address compare
|
|
* @param address_mask
|
|
* Trigger address mask
|
|
*/
|
|
void cvmx_tra_trig_setup_v2(int tra, uint64_t trigger, cvmx_tra_filt_t filter,
|
|
cvmx_tra_sid_t source_filter, cvmx_tra_did_t dest_filter,
|
|
uint64_t address, uint64_t address_mask)
|
|
{
|
|
cvmx_tra_filt_cmd_t tra_filt_cmd;
|
|
cvmx_tra_filt_sid_t tra_filt_sid;
|
|
cvmx_tra_filt_did_t tra_filt_did;
|
|
|
|
tra_filt_cmd.u64 = __cvmx_tra_set_filter_cmd_mask(filter);
|
|
tra_filt_sid.u64 = source_filter & CVMX_TRA_SOURCE_MASK;
|
|
tra_filt_did.u64 = dest_filter & CVMX_TRA_DESTINATION_MASK;
|
|
|
|
/* Address filtering does not work when IOBDMA filter command is enabled
|
|
because of some caveats. Disable the IOBDMA filter command. */
|
|
if ((OCTEON_IS_MODEL(OCTEON_CN6XXX) || OCTEON_IS_MODEL(OCTEON_CNF7XXX))
|
|
&& ((tra_filt_cmd.u64 & CVMX_TRA_FILT_IOBDMA) == CVMX_TRA_FILT_IOBDMA)
|
|
&& address_mask != 0)
|
|
{
|
|
cvmx_dprintf("The address-based filtering does not work with IOBDMAs, disabling the filter command.\n");
|
|
tra_filt_cmd.u64 &= ~(CVMX_TRA_FILT_IOBDMA);
|
|
}
|
|
|
|
cvmx_write_csr(CVMX_TRAX_TRIG0_CMD(tra) + trigger * 64, tra_filt_cmd.u64);
|
|
cvmx_write_csr(CVMX_TRAX_TRIG0_SID(tra) + trigger * 64, tra_filt_sid.u64);
|
|
cvmx_write_csr(CVMX_TRAX_TRIG0_DID(tra) + trigger * 64, tra_filt_did.u64);
|
|
cvmx_write_csr(CVMX_TRAX_TRIG0_ADR_ADR(tra) + trigger * 64, address);
|
|
cvmx_write_csr(CVMX_TRAX_TRIG0_ADR_MSK(tra) + trigger * 64, address_mask);
|
|
}
|
|
#ifdef CVMX_BUILD_FOR_LINUX_KERNEL
|
|
EXPORT_SYMBOL(cvmx_tra_trig_setup_v2);
|
|
#endif
|
|
|
|
/**
|
|
* Read an entry from the TRA buffer
|
|
*
|
|
* @return Value return. High bit will be zero if there wasn't any data
|
|
*/
|
|
cvmx_tra_data_t cvmx_tra_read(void)
|
|
{
|
|
uint64_t address = CVMX_TRA_READ_DAT;
|
|
cvmx_tra_data_t result;
|
|
|
|
/* The trace buffer format is wider than 64-bits in OcteonII model,
|
|
read the register again to get the second part of the data. */
|
|
if (OCTEON_IS_MODEL(OCTEON_CN63XX_PASS1_X))
|
|
{
|
|
/* These reads need to be as close as possible to each other */
|
|
result.u128.data = cvmx_read_csr(address);
|
|
result.u128.datahi = cvmx_read_csr(address);
|
|
}
|
|
else if (!OCTEON_IS_MODEL(OCTEON_CN3XXX) && !OCTEON_IS_MODEL(OCTEON_CN5XXX))
|
|
{
|
|
/* OcteonII pass2 uses different trace buffer data register for reading
|
|
lower and upper 64-bit values */
|
|
result.u128.data = cvmx_read_csr(address);
|
|
result.u128.datahi = cvmx_read_csr(CVMX_TRA_READ_DAT_HI);
|
|
}
|
|
else
|
|
{
|
|
result.u128.data = cvmx_read_csr(address);
|
|
result.u128.datahi = 0;
|
|
}
|
|
|
|
return result;
|
|
}
|
|
|
|
/**
|
|
* Read an entry from the TRA buffer from a given TRA unit.
|
|
*
|
|
* @param tra_unit Trace buffer unit to read
|
|
*
|
|
* @return Value return. High bit will be zero if there wasn't any data
|
|
*/
|
|
cvmx_tra_data_t cvmx_tra_read_v2(int tra_unit)
|
|
{
|
|
cvmx_tra_data_t result;
|
|
|
|
result.u128.data = cvmx_read_csr(CVMX_TRAX_READ_DAT(tra_unit));
|
|
result.u128.datahi = cvmx_read_csr(CVMX_TRAX_READ_DAT_HI(tra_unit));
|
|
|
|
return result;
|
|
}
|
|
|
|
/**
|
|
* Decode a TRA entry into human readable output
|
|
*
|
|
* @param tra_ctl Trace control setup
|
|
* @param data Data to decode
|
|
*/
|
|
void cvmx_tra_decode_text(cvmx_tra_ctl_t tra_ctl, cvmx_tra_data_t data)
|
|
{
|
|
if (OCTEON_IS_MODEL(OCTEON_CN3XXX) || OCTEON_IS_MODEL(OCTEON_CN5XXX))
|
|
{
|
|
/* The type is a five bit field for some entries and 4 for other. The four
|
|
bit entries can be mis-typed if the top is set */
|
|
int type = data.cmn.type;
|
|
|
|
if (type >= 0x1a)
|
|
type &= 0xf;
|
|
|
|
switch (type)
|
|
{
|
|
case 0: /* DWB */
|
|
case 1: /* PL2 */
|
|
case 2: /* PSL1 */
|
|
case 3: /* LDD */
|
|
case 4: /* LDI */
|
|
case 5: /* LDT */
|
|
cvmx_dprintf("0x%016llx %c%+10d %s %s 0x%016llx\n",
|
|
(unsigned long long)data.u128.data,
|
|
(data.cmn.discontinuity) ? 'D' : ' ',
|
|
data.cmn.timestamp << (tra_ctl.s.time_grn*3),
|
|
TYPE_ARRAY[type],
|
|
SOURCE_ARRAY[data.cmn.source],
|
|
(unsigned long long)data.cmn.address);
|
|
break;
|
|
case 6: /* STF */
|
|
case 7: /* STC */
|
|
case 8: /* STP */
|
|
case 9: /* STT */
|
|
case 16: /* SAA */
|
|
cvmx_dprintf("0x%016llx %c%+10d %s %s mask=0x%02x 0x%016llx\n",
|
|
(unsigned long long)data.u128.data,
|
|
(data.cmn.discontinuity) ? 'D' : ' ',
|
|
data.cmn.timestamp << (tra_ctl.s.time_grn*3),
|
|
TYPE_ARRAY[type],
|
|
SOURCE_ARRAY[data.store.source],
|
|
(unsigned int)data.store.mask,
|
|
(unsigned long long)data.store.address << 3);
|
|
break;
|
|
case 10: /* IOBLD8 */
|
|
case 11: /* IOBLD16 */
|
|
case 12: /* IOBLD32 */
|
|
case 13: /* IOBLD64 */
|
|
case 14: /* IOBST */
|
|
cvmx_dprintf("0x%016llx %c%+10d %s %s->%s subdid=0x%x 0x%016llx\n",
|
|
(unsigned long long)data.u128.data,
|
|
(data.cmn.discontinuity) ? 'D' : ' ',
|
|
data.cmn.timestamp << (tra_ctl.s.time_grn*3),
|
|
TYPE_ARRAY[type],
|
|
SOURCE_ARRAY[data.iobld.source],
|
|
DEST_ARRAY[data.iobld.dest],
|
|
(unsigned int)data.iobld.subid,
|
|
(unsigned long long)data.iobld.address);
|
|
break;
|
|
case 15: /* IOBDMA */
|
|
cvmx_dprintf("0x%016llx %c%+10d %s %s->%s len=0x%x 0x%016llx\n",
|
|
(unsigned long long)data.u128.data,
|
|
(data.cmn.discontinuity) ? 'D' : ' ',
|
|
data.cmn.timestamp << (tra_ctl.s.time_grn*3),
|
|
TYPE_ARRAY[type],
|
|
SOURCE_ARRAY[data.iob.source],
|
|
DEST_ARRAY[data.iob.dest],
|
|
(unsigned int)data.iob.mask,
|
|
(unsigned long long)data.iob.address << 3);
|
|
break;
|
|
default:
|
|
cvmx_dprintf("0x%016llx %c%+10d Unknown format\n",
|
|
(unsigned long long)data.u128.data,
|
|
(data.cmn.discontinuity) ? 'D' : ' ',
|
|
data.cmn.timestamp << (tra_ctl.s.time_grn*3));
|
|
break;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
int type;
|
|
int srcId;
|
|
|
|
type = data.cmn2.type;
|
|
|
|
switch (1ull<<type)
|
|
{
|
|
case CVMX_TRA_FILT_DECR64:
|
|
case CVMX_TRA_FILT_DECR32:
|
|
case CVMX_TRA_FILT_DECR16:
|
|
case CVMX_TRA_FILT_DECR8:
|
|
case CVMX_TRA_FILT_INCR64:
|
|
case CVMX_TRA_FILT_INCR32:
|
|
case CVMX_TRA_FILT_INCR16:
|
|
case CVMX_TRA_FILT_INCR8:
|
|
case CVMX_TRA_FILT_CLR64:
|
|
case CVMX_TRA_FILT_CLR32:
|
|
case CVMX_TRA_FILT_CLR16:
|
|
case CVMX_TRA_FILT_CLR8:
|
|
case CVMX_TRA_FILT_SET64:
|
|
case CVMX_TRA_FILT_SET32:
|
|
case CVMX_TRA_FILT_SET16:
|
|
case CVMX_TRA_FILT_SET8:
|
|
case CVMX_TRA_FILT_LCKL2:
|
|
case CVMX_TRA_FILT_WBIL2:
|
|
case CVMX_TRA_FILT_INVL2:
|
|
case CVMX_TRA_FILT_STGL2I:
|
|
case CVMX_TRA_FILT_LTGL2I:
|
|
case CVMX_TRA_FILT_WBIL2I:
|
|
case CVMX_TRA_FILT_WBL2:
|
|
case CVMX_TRA_FILT_DWB:
|
|
case CVMX_TRA_FILT_RPL2:
|
|
case CVMX_TRA_FILT_PL2:
|
|
case CVMX_TRA_FILT_LDI:
|
|
case CVMX_TRA_FILT_LDT:
|
|
/* CN68XX has 32 cores which are distributed to use different
|
|
trace buffers, decode the core that has data */
|
|
if (OCTEON_IS_MODEL(OCTEON_CN68XX))
|
|
{
|
|
if (data.cmn2.source <= 7)
|
|
{
|
|
srcId = _cvmx_tra_unit + (data.cmn2.source * 4);
|
|
if (srcId >= 16)
|
|
srcId += 16;
|
|
}
|
|
else
|
|
srcId = (data.cmn2.source);
|
|
}
|
|
else
|
|
srcId = (data.cmn2.source);
|
|
|
|
cvmx_dprintf("0x%016llx%016llx %c%+10d %s %s 0x%016llx%llx\n",
|
|
(unsigned long long)data.u128.datahi, (unsigned long long)data.u128.data,
|
|
(data.cmn2.discontinuity) ? 'D' : ' ',
|
|
data.cmn2.timestamp << (tra_ctl.s.time_grn*3),
|
|
TYPE_ARRAY2[type],
|
|
SOURCE_ARRAY[srcId],
|
|
(unsigned long long)data.cmn2.addresshi,
|
|
(unsigned long long)data.cmn2.addresslo);
|
|
break;
|
|
case CVMX_TRA_FILT_PSL1:
|
|
case CVMX_TRA_FILT_LDD:
|
|
case CVMX_TRA_FILT_FAS64:
|
|
case CVMX_TRA_FILT_FAS32:
|
|
case CVMX_TRA_FILT_FAA64:
|
|
case CVMX_TRA_FILT_FAA32:
|
|
case CVMX_TRA_FILT_SAA64:
|
|
case CVMX_TRA_FILT_SAA32:
|
|
case CVMX_TRA_FILT_STC:
|
|
case CVMX_TRA_FILT_STF:
|
|
case CVMX_TRA_FILT_STP:
|
|
case CVMX_TRA_FILT_STT:
|
|
case CVMX_TRA_FILT_STTIL1:
|
|
case CVMX_TRA_FILT_STFIL1:
|
|
/* CN68XX has 32 cores which are distributed to use different
|
|
trace buffers, decode the core that has data */
|
|
if (OCTEON_IS_MODEL(OCTEON_CN68XX))
|
|
{
|
|
if (data.store2.source <= 7)
|
|
{
|
|
srcId = _cvmx_tra_unit + (data.store2.source * 4);
|
|
if (srcId >= 16)
|
|
srcId += 16;
|
|
}
|
|
else
|
|
srcId = data.store2.source;
|
|
}
|
|
else
|
|
srcId = data.store2.source;
|
|
|
|
cvmx_dprintf("0x%016llx%016llx %c%+10d %s %s mask=0x%02x 0x%016llx%llx\n",
|
|
(unsigned long long)data.u128.datahi, (unsigned long long)data.u128.data,
|
|
(data.cmn2.discontinuity) ? 'D' : ' ',
|
|
data.cmn2.timestamp << (tra_ctl.s.time_grn*3),
|
|
TYPE_ARRAY2[type],
|
|
SOURCE_ARRAY[srcId],
|
|
(unsigned int)data.store2.mask,
|
|
(unsigned long long)data.store2.addresshi,
|
|
(unsigned long long)data.store2.addresslo);
|
|
break;
|
|
case CVMX_TRA_FILT_IOBST64:
|
|
case CVMX_TRA_FILT_IOBST32:
|
|
case CVMX_TRA_FILT_IOBST16:
|
|
case CVMX_TRA_FILT_IOBST8:
|
|
case CVMX_TRA_FILT_IOBLD64:
|
|
case CVMX_TRA_FILT_IOBLD32:
|
|
case CVMX_TRA_FILT_IOBLD16:
|
|
case CVMX_TRA_FILT_IOBLD8:
|
|
/* CN68XX has 32 cores which are distributed to use different
|
|
trace buffers, decode the core that has data */
|
|
if (OCTEON_IS_MODEL(OCTEON_CN68XX))
|
|
{
|
|
if (data.iobld2.source <= 7)
|
|
{
|
|
srcId = _cvmx_tra_unit + (data.iobld2.source * 4);
|
|
if (srcId >= 16)
|
|
srcId += 16;
|
|
}
|
|
else
|
|
srcId = data.iobld2.source;
|
|
}
|
|
else
|
|
srcId = data.iobld2.source;
|
|
|
|
cvmx_dprintf("0x%016llx%016llx %c%+10d %s %s->%s subdid=0x%x 0x%016llx%llx\n",
|
|
(unsigned long long)data.u128.datahi, (unsigned long long)data.u128.data,
|
|
(data.cmn2.discontinuity) ? 'D' : ' ',
|
|
data.cmn2.timestamp << (tra_ctl.s.time_grn*3),
|
|
TYPE_ARRAY2[type],
|
|
SOURCE_ARRAY[srcId],
|
|
DEST_ARRAY[data.iobld2.dest],
|
|
(unsigned int)data.iobld2.subid,
|
|
(unsigned long long)data.iobld2.addresshi,
|
|
(unsigned long long)data.iobld2.addresslo);
|
|
break;
|
|
case CVMX_TRA_FILT_IOBDMA:
|
|
/* CN68XX has 32 cores which are distributed to use different
|
|
trace buffers, decode the core that has data */
|
|
if (OCTEON_IS_MODEL(OCTEON_CN68XX))
|
|
{
|
|
if (data.iob2.source <= 7)
|
|
{
|
|
srcId = _cvmx_tra_unit + (data.iob2.source * 4);
|
|
if (srcId >= 16)
|
|
srcId += 16;
|
|
}
|
|
else
|
|
srcId = data.iob2.source;
|
|
}
|
|
else
|
|
srcId = data.iob2.source;
|
|
|
|
cvmx_dprintf("0x%016llx%016llx %c%+10d %s %s->%s len=0x%x 0x%016llx%llx\n",
|
|
(unsigned long long)data.u128.datahi, (unsigned long long)data.u128.data,
|
|
(data.iob2.discontinuity) ? 'D' : ' ',
|
|
data.iob2.timestamp << (tra_ctl.s.time_grn*3),
|
|
TYPE_ARRAY2[type],
|
|
SOURCE_ARRAY[srcId],
|
|
DEST_ARRAY[data.iob2.dest],
|
|
(unsigned int)data.iob2.mask,
|
|
(unsigned long long)data.iob2.addresshi << 3,
|
|
(unsigned long long)data.iob2.addresslo << 3);
|
|
break;
|
|
default:
|
|
cvmx_dprintf("0x%016llx%016llx %c%+10d Unknown format\n",
|
|
(unsigned long long)data.u128.datahi, (unsigned long long)data.u128.data,
|
|
(data.cmn2.discontinuity) ? 'D' : ' ',
|
|
data.cmn2.timestamp << (tra_ctl.s.time_grn*3));
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
/**
|
|
* Display the entire trace buffer. It is advised that you
|
|
* disable the trace buffer before calling this routine
|
|
* otherwise it could infinitely loop displaying trace data
|
|
* that it created.
|
|
*/
|
|
void cvmx_tra_display(void)
|
|
{
|
|
int valid = 0;
|
|
|
|
/* Collect data from each TRA unit for decoding */
|
|
if (CVMX_L2C_TADS > 1)
|
|
{
|
|
cvmx_trax_ctl_t tra_ctl;
|
|
cvmx_tra_data_t data[4];
|
|
int tad;
|
|
do
|
|
{
|
|
valid = 0;
|
|
for (tad = 0; tad < CVMX_L2C_TADS; tad++)
|
|
data[tad] = cvmx_tra_read_v2(tad);
|
|
|
|
for (tad = 0; tad < CVMX_L2C_TADS; tad++)
|
|
{
|
|
tra_ctl.u64 = cvmx_read_csr(CVMX_TRAX_CTL(tad));
|
|
|
|
if (data[tad].cmn2.valid)
|
|
{
|
|
_cvmx_tra_unit = tad;
|
|
cvmx_tra_decode_text(tra_ctl, data[tad]);
|
|
valid = 1;
|
|
}
|
|
}
|
|
} while (valid);
|
|
}
|
|
else
|
|
{
|
|
cvmx_tra_ctl_t tra_ctl;
|
|
cvmx_tra_data_t data;
|
|
|
|
tra_ctl.u64 = cvmx_read_csr(CVMX_TRA_CTL);
|
|
|
|
do
|
|
{
|
|
data = cvmx_tra_read();
|
|
if ((OCTEON_IS_MODEL(OCTEON_CN3XXX) || OCTEON_IS_MODEL(OCTEON_CN5XXX)) && data.cmn.valid)
|
|
valid = 1;
|
|
else if (data.cmn2.valid)
|
|
valid = 1;
|
|
else
|
|
valid = 0;
|
|
|
|
if (valid)
|
|
cvmx_tra_decode_text(tra_ctl, data);
|
|
|
|
} while (valid);
|
|
}
|
|
}
|
|
#ifdef CVMX_BUILD_FOR_LINUX_KERNEL
|
|
EXPORT_SYMBOL(cvmx_tra_display);
|
|
#endif
|
|
|
|
/**
|
|
* Display the entire trace buffer. It is advised that you
|
|
* disable the trace buffer before calling this routine
|
|
* otherwise it could infinitely loop displaying trace data
|
|
* that it created.
|
|
*
|
|
* @param tra_unit Which TRA buffer to use.
|
|
*/
|
|
void cvmx_tra_display_v2(int tra_unit)
|
|
{
|
|
int valid = 0;
|
|
|
|
cvmx_trax_ctl_t tra_ctl;
|
|
cvmx_tra_data_t data;
|
|
|
|
valid = 0;
|
|
tra_ctl.u64 = cvmx_read_csr(CVMX_TRAX_CTL(tra_unit));
|
|
|
|
do
|
|
{
|
|
data = cvmx_tra_read_v2(tra_unit);
|
|
if (data.cmn2.valid)
|
|
{
|
|
_cvmx_tra_unit = tra_unit;
|
|
cvmx_tra_decode_text(tra_ctl, data);
|
|
valid = 1;
|
|
}
|
|
} while (valid);
|
|
}
|
|
#ifdef CVMX_BUILD_FOR_LINUX_KERNEL
|
|
EXPORT_SYMBOL(cvmx_tra_display_v2);
|
|
#endif
|