307 lines
6.4 KiB
C
307 lines
6.4 KiB
C
/*-
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* Copyright (c) 2009 Neelkanth Natu
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/cpuset.h>
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#include <machine/resource.h>
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#include <machine/hwfunc.h>
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#include "sb_scd.h"
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/*
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* We compile a 32-bit kernel to run on the SB-1 processor which is a 64-bit
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* processor. It has some registers that must be accessed using 64-bit load
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* and store instructions.
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*
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* We use the mips_ld() and mips_sd() functions to do this for us.
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*/
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#define sb_store64(addr, val) mips3_sd((uint64_t *)(uintptr_t)(addr), (val))
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#define sb_load64(addr) mips3_ld((uint64_t *)(uintptr_t)(addr))
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/*
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* System Control and Debug (SCD) unit on the Sibyte ZBbus.
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*/
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/*
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* Extract the value starting at bit position 'b' for 'n' bits from 'x'.
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*/
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#define GET_VAL_64(x, b, n) (((x) >> (b)) & ((1ULL << (n)) - 1))
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#define SYSREV_ADDR MIPS_PHYS_TO_KSEG1(0x10020000)
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#define SYSREV_NUM_PROCESSORS(x) GET_VAL_64((x), 24, 4)
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#define SYSCFG_ADDR MIPS_PHYS_TO_KSEG1(0x10020008)
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#define SYSCFG_PLLDIV(x) GET_VAL_64((x), 7, 5)
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#define ZBBUS_CYCLE_COUNT_ADDR MIPS_PHYS_TO_KSEG1(0x10030000)
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#define INTSRC_MASK_ADDR(cpu) \
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(MIPS_PHYS_TO_KSEG1(0x10020028) | ((cpu) << 13))
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#define INTSRC_MAP_ADDR(cpu, intsrc) \
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(MIPS_PHYS_TO_KSEG1(0x10020200) | ((cpu) << 13)) + (intsrc * 8)
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#define MAILBOX_SET_ADDR(cpu) \
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(MIPS_PHYS_TO_KSEG1(0x100200C8) | ((cpu) << 13))
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#define MAILBOX_CLEAR_ADDR(cpu) \
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(MIPS_PHYS_TO_KSEG1(0x100200D0) | ((cpu) << 13))
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static uint64_t
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sb_read_syscfg(void)
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{
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return (sb_load64(SYSCFG_ADDR));
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}
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static void
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sb_write_syscfg(uint64_t val)
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{
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sb_store64(SYSCFG_ADDR, val);
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}
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uint64_t
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sb_zbbus_cycle_count(void)
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{
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return (sb_load64(ZBBUS_CYCLE_COUNT_ADDR));
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}
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uint64_t
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sb_cpu_speed(void)
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{
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int plldiv;
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const uint64_t MHZ = 1000000;
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plldiv = SYSCFG_PLLDIV(sb_read_syscfg());
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if (plldiv == 0) {
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printf("PLL_DIV is 0 - assuming 6 (300MHz).\n");
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plldiv = 6;
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}
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return (plldiv * 50 * MHZ);
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}
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void
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sb_system_reset(void)
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{
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uint64_t syscfg;
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const uint64_t SYSTEM_RESET = 1ULL << 60;
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const uint64_t EXT_RESET = 1ULL << 59;
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const uint64_t SOFT_RESET = 1ULL << 58;
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syscfg = sb_read_syscfg();
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syscfg &= ~SOFT_RESET;
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syscfg |= SYSTEM_RESET | EXT_RESET;
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sb_write_syscfg(syscfg);
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}
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void
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sb_disable_intsrc(int cpu, int src)
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{
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int regaddr;
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uint64_t val;
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regaddr = INTSRC_MASK_ADDR(cpu);
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val = sb_load64(regaddr);
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val |= 1ULL << src;
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sb_store64(regaddr, val);
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}
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void
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sb_enable_intsrc(int cpu, int src)
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{
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int regaddr;
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uint64_t val;
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regaddr = INTSRC_MASK_ADDR(cpu);
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val = sb_load64(regaddr);
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val &= ~(1ULL << src);
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sb_store64(regaddr, val);
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}
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void
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sb_write_intsrc_mask(int cpu, uint64_t val)
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{
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int regaddr;
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regaddr = INTSRC_MASK_ADDR(cpu);
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sb_store64(regaddr, val);
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}
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uint64_t
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sb_read_intsrc_mask(int cpu)
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{
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int regaddr;
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uint64_t val;
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regaddr = INTSRC_MASK_ADDR(cpu);
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val = sb_load64(regaddr);
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return (val);
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}
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void
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sb_write_intmap(int cpu, int intsrc, int intrnum)
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{
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int regaddr;
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regaddr = INTSRC_MAP_ADDR(cpu, intsrc);
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sb_store64(regaddr, intrnum);
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}
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int
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sb_read_intmap(int cpu, int intsrc)
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{
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int regaddr;
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regaddr = INTSRC_MAP_ADDR(cpu, intsrc);
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return (sb_load64(regaddr) & 0x7);
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}
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int
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sb_route_intsrc(int intsrc)
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{
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int intrnum;
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KASSERT(intsrc >= 0 && intsrc < NUM_INTSRC,
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("Invalid interrupt source number (%d)", intsrc));
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/*
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* Interrupt 5 is used by sources internal to the CPU (e.g. timer).
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* Use a deterministic mapping for the remaining sources.
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*/
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#ifdef SMP
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KASSERT(platform_ipi_intrnum() == 4,
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("Unexpected interrupt number used for IPI"));
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intrnum = intsrc % 4;
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#else
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intrnum = intsrc % 5;
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#endif
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return (intrnum);
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}
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#ifdef SMP
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static uint64_t
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sb_read_sysrev(void)
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{
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return (sb_load64(SYSREV_ADDR));
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}
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void
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sb_set_mailbox(int cpu, uint64_t val)
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{
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int regaddr;
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regaddr = MAILBOX_SET_ADDR(cpu);
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sb_store64(regaddr, val);
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}
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void
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sb_clear_mailbox(int cpu, uint64_t val)
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{
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int regaddr;
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regaddr = MAILBOX_CLEAR_ADDR(cpu);
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sb_store64(regaddr, val);
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}
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void
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platform_cpu_mask(cpuset_t *mask)
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{
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int i, s;
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CPU_ZERO(mask);
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s = SYSREV_NUM_PROCESSORS(sb_read_sysrev());
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for (i = 0; i < s; i++)
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CPU_SET(i, mask);
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}
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#endif /* SMP */
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#define SCD_PHYSADDR 0x10000000
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#define SCD_SIZE 0x00060000
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static int
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scd_probe(device_t dev)
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{
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device_set_desc(dev, "Broadcom/Sibyte System Control and Debug");
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return (0);
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}
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static int
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scd_attach(device_t dev)
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{
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int rid;
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struct resource *res;
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if (bootverbose)
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device_printf(dev, "attached.\n");
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rid = 0;
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res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, SCD_PHYSADDR,
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SCD_PHYSADDR + SCD_SIZE - 1, SCD_SIZE, 0);
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if (res == NULL)
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panic("Cannot allocate resource for system control and debug.");
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return (0);
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}
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static device_method_t scd_methods[] ={
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/* Device interface */
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DEVMETHOD(device_probe, scd_probe),
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DEVMETHOD(device_attach, scd_attach),
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DEVMETHOD(device_detach, bus_generic_detach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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{ 0, 0 }
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};
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static driver_t scd_driver = {
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"scd",
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scd_methods
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};
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static devclass_t scd_devclass;
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DRIVER_MODULE(scd, zbbus, scd_driver, scd_devclass, 0, 0);
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