508 lines
13 KiB
C
508 lines
13 KiB
C
/*-
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* Copyright (c) 2001 Tsubai Masanari.
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* Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@freebsd.org>
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* Copyright (c) 2013 Luiz Otavio O Souza <loos@freebsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/bus.h>
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#include <machine/resource.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <sys/sysctl.h>
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#include <dev/iicbus/iicbus.h>
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#include <dev/iicbus/iiconf.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <arm/broadcom/bcm2835/bcm2835_gpio.h>
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#include <arm/broadcom/bcm2835/bcm2835_bscreg.h>
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#include <arm/broadcom/bcm2835/bcm2835_bscvar.h>
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#include "iicbus_if.h"
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static void bcm_bsc_intr(void *);
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static int bcm_bsc_detach(device_t);
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static void
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bcm_bsc_modifyreg(struct bcm_bsc_softc *sc, uint32_t off, uint32_t mask,
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uint32_t value)
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{
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uint32_t reg;
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mtx_assert(&sc->sc_mtx, MA_OWNED);
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reg = BCM_BSC_READ(sc, off);
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reg &= ~mask;
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reg |= value;
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BCM_BSC_WRITE(sc, off, reg);
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}
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static int
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bcm_bsc_clock_proc(SYSCTL_HANDLER_ARGS)
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{
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struct bcm_bsc_softc *sc;
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uint32_t clk;
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sc = (struct bcm_bsc_softc *)arg1;
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BCM_BSC_LOCK(sc);
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clk = BCM_BSC_READ(sc, BCM_BSC_CLOCK);
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BCM_BSC_UNLOCK(sc);
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clk &= 0xffff;
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if (clk == 0)
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clk = 32768;
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clk = BCM_BSC_CORE_CLK / clk;
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return (sysctl_handle_int(oidp, &clk, 0, req));
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}
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static int
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bcm_bsc_clkt_proc(SYSCTL_HANDLER_ARGS)
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{
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struct bcm_bsc_softc *sc;
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uint32_t clkt;
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int error;
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sc = (struct bcm_bsc_softc *)arg1;
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BCM_BSC_LOCK(sc);
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clkt = BCM_BSC_READ(sc, BCM_BSC_CLKT);
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BCM_BSC_UNLOCK(sc);
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clkt &= 0xffff;
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error = sysctl_handle_int(oidp, &clkt, sizeof(clkt), req);
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if (error != 0 || req->newptr == NULL)
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return (error);
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BCM_BSC_LOCK(sc);
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BCM_BSC_WRITE(sc, BCM_BSC_CLKT, clkt & 0xffff);
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BCM_BSC_UNLOCK(sc);
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return (0);
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}
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static int
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bcm_bsc_fall_proc(SYSCTL_HANDLER_ARGS)
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{
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struct bcm_bsc_softc *sc;
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uint32_t clk, reg;
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int error;
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sc = (struct bcm_bsc_softc *)arg1;
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BCM_BSC_LOCK(sc);
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reg = BCM_BSC_READ(sc, BCM_BSC_DELAY);
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BCM_BSC_UNLOCK(sc);
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reg >>= 16;
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error = sysctl_handle_int(oidp, ®, sizeof(reg), req);
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if (error != 0 || req->newptr == NULL)
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return (error);
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BCM_BSC_LOCK(sc);
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clk = BCM_BSC_READ(sc, BCM_BSC_CLOCK);
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clk = BCM_BSC_CORE_CLK / clk;
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if (reg > clk / 2)
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reg = clk / 2 - 1;
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bcm_bsc_modifyreg(sc, BCM_BSC_DELAY, 0xffff0000, reg << 16);
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BCM_BSC_UNLOCK(sc);
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return (0);
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}
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static int
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bcm_bsc_rise_proc(SYSCTL_HANDLER_ARGS)
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{
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struct bcm_bsc_softc *sc;
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uint32_t clk, reg;
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int error;
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sc = (struct bcm_bsc_softc *)arg1;
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BCM_BSC_LOCK(sc);
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reg = BCM_BSC_READ(sc, BCM_BSC_DELAY);
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BCM_BSC_UNLOCK(sc);
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reg &= 0xffff;
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error = sysctl_handle_int(oidp, ®, sizeof(reg), req);
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if (error != 0 || req->newptr == NULL)
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return (error);
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BCM_BSC_LOCK(sc);
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clk = BCM_BSC_READ(sc, BCM_BSC_CLOCK);
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clk = BCM_BSC_CORE_CLK / clk;
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if (reg > clk / 2)
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reg = clk / 2 - 1;
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bcm_bsc_modifyreg(sc, BCM_BSC_DELAY, 0xffff, reg);
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BCM_BSC_UNLOCK(sc);
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return (0);
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}
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static void
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bcm_bsc_sysctl_init(struct bcm_bsc_softc *sc)
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{
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struct sysctl_ctx_list *ctx;
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struct sysctl_oid *tree_node;
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struct sysctl_oid_list *tree;
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/*
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* Add system sysctl tree/handlers.
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*/
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ctx = device_get_sysctl_ctx(sc->sc_dev);
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tree_node = device_get_sysctl_tree(sc->sc_dev);
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tree = SYSCTL_CHILDREN(tree_node);
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SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "frequency",
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CTLFLAG_RW | CTLTYPE_UINT, sc, sizeof(*sc),
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bcm_bsc_clock_proc, "IU", "I2C BUS clock frequency");
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SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "clock_stretch",
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CTLFLAG_RW | CTLTYPE_UINT, sc, sizeof(*sc),
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bcm_bsc_clkt_proc, "IU", "I2C BUS clock stretch timeout");
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SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "fall_edge_delay",
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CTLFLAG_RW | CTLTYPE_UINT, sc, sizeof(*sc),
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bcm_bsc_fall_proc, "IU", "I2C BUS falling edge delay");
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SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "rise_edge_delay",
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CTLFLAG_RW | CTLTYPE_UINT, sc, sizeof(*sc),
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bcm_bsc_rise_proc, "IU", "I2C BUS rising edge delay");
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}
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static void
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bcm_bsc_reset(struct bcm_bsc_softc *sc)
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{
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/* Enable the BSC Controller, disable interrupts. */
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BCM_BSC_WRITE(sc, BCM_BSC_CTRL, BCM_BSC_CTRL_I2CEN);
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/* Clear pending interrupts. */
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BCM_BSC_WRITE(sc, BCM_BSC_STATUS, BCM_BSC_STATUS_CLKT |
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BCM_BSC_STATUS_ERR | BCM_BSC_STATUS_DONE);
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/* Clear the FIFO. */
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bcm_bsc_modifyreg(sc, BCM_BSC_CTRL, BCM_BSC_CTRL_CLEAR0,
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BCM_BSC_CTRL_CLEAR0);
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}
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static int
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bcm_bsc_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "broadcom,bcm2835-bsc"))
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return (ENXIO);
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device_set_desc(dev, "BCM2708/2835 BSC controller");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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bcm_bsc_attach(device_t dev)
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{
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struct bcm_bsc_softc *sc;
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unsigned long start;
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device_t gpio;
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int i, rid;
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sc = device_get_softc(dev);
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sc->sc_dev = dev;
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rid = 0;
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sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (!sc->sc_mem_res) {
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device_printf(dev, "cannot allocate memory window\n");
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return (ENXIO);
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}
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sc->sc_bst = rman_get_bustag(sc->sc_mem_res);
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sc->sc_bsh = rman_get_bushandle(sc->sc_mem_res);
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/* Check the unit we are attaching by its base address. */
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start = rman_get_start(sc->sc_mem_res);
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for (i = 0; i < nitems(bcm_bsc_pins); i++) {
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if (bcm_bsc_pins[i].start == (start & BCM_BSC_BASE_MASK))
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break;
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}
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if (i == nitems(bcm_bsc_pins)) {
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device_printf(dev, "only bsc0 and bsc1 are supported\n");
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bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
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return (ENXIO);
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}
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/*
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* Configure the GPIO pins to ALT0 function to enable BSC control
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* over the pins.
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*/
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gpio = devclass_get_device(devclass_find("gpio"), 0);
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if (!gpio) {
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device_printf(dev, "cannot find gpio0\n");
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bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
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return (ENXIO);
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}
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bcm_gpio_set_alternate(gpio, bcm_bsc_pins[i].sda, BCM_GPIO_ALT0);
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bcm_gpio_set_alternate(gpio, bcm_bsc_pins[i].scl, BCM_GPIO_ALT0);
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rid = 0;
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sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
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RF_ACTIVE | RF_SHAREABLE);
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if (!sc->sc_irq_res) {
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bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
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device_printf(dev, "cannot allocate interrupt\n");
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return (ENXIO);
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}
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/* Hook up our interrupt handler. */
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if (bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
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NULL, bcm_bsc_intr, sc, &sc->sc_intrhand)) {
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bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res);
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bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
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device_printf(dev, "cannot setup the interrupt handler\n");
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return (ENXIO);
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}
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mtx_init(&sc->sc_mtx, "bcm_bsc", NULL, MTX_DEF);
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bcm_bsc_sysctl_init(sc);
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/* Enable the BSC controller. Flush the FIFO. */
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BCM_BSC_LOCK(sc);
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bcm_bsc_reset(sc);
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BCM_BSC_UNLOCK(sc);
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sc->sc_iicbus = device_add_child(dev, "iicbus", -1);
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if (sc->sc_iicbus == NULL) {
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bcm_bsc_detach(dev);
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return (ENXIO);
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}
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return (bus_generic_attach(dev));
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}
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static int
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bcm_bsc_detach(device_t dev)
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{
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struct bcm_bsc_softc *sc;
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bus_generic_detach(dev);
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sc = device_get_softc(dev);
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mtx_destroy(&sc->sc_mtx);
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if (sc->sc_intrhand)
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bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_intrhand);
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if (sc->sc_irq_res)
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bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res);
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if (sc->sc_mem_res)
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bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
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return (0);
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}
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static void
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bcm_bsc_intr(void *arg)
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{
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struct bcm_bsc_softc *sc;
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uint32_t status;
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sc = (struct bcm_bsc_softc *)arg;
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BCM_BSC_LOCK(sc);
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/* The I2C interrupt is shared among all the BSC controllers. */
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if ((sc->sc_flags & BCM_I2C_BUSY) == 0) {
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BCM_BSC_UNLOCK(sc);
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return;
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}
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status = BCM_BSC_READ(sc, BCM_BSC_STATUS);
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/* Check for errors. */
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if (status & (BCM_BSC_STATUS_CLKT | BCM_BSC_STATUS_ERR)) {
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/* Disable interrupts. */
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bcm_bsc_reset(sc);
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sc->sc_flags |= BCM_I2C_ERROR;
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wakeup(sc->sc_dev);
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BCM_BSC_UNLOCK(sc);
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return;
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}
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if (sc->sc_flags & BCM_I2C_READ) {
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while (sc->sc_resid > 0 && (status & BCM_BSC_STATUS_RXD)) {
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*sc->sc_data++ = BCM_BSC_READ(sc, BCM_BSC_DATA);
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sc->sc_resid--;
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status = BCM_BSC_READ(sc, BCM_BSC_STATUS);
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}
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} else {
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while (sc->sc_resid > 0 && (status & BCM_BSC_STATUS_TXD)) {
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BCM_BSC_WRITE(sc, BCM_BSC_DATA, *sc->sc_data++);
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sc->sc_resid--;
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status = BCM_BSC_READ(sc, BCM_BSC_STATUS);
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}
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}
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if (status & BCM_BSC_STATUS_DONE) {
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/* Disable interrupts. */
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bcm_bsc_reset(sc);
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wakeup(sc->sc_dev);
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}
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BCM_BSC_UNLOCK(sc);
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}
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static int
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bcm_bsc_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs)
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{
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struct bcm_bsc_softc *sc;
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uint32_t intr, read, status;
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int i, err;
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sc = device_get_softc(dev);
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BCM_BSC_LOCK(sc);
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/* If the controller is busy wait until it is available. */
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while (sc->sc_flags & BCM_I2C_BUSY)
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mtx_sleep(dev, &sc->sc_mtx, 0, "bscbusw", 0);
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/* Now we have control over the BSC controller. */
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sc->sc_flags = BCM_I2C_BUSY;
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/* Clear the FIFO and the pending interrupts. */
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bcm_bsc_reset(sc);
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err = 0;
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for (i = 0; i < nmsgs; i++) {
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/* Write the slave address. */
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BCM_BSC_WRITE(sc, BCM_BSC_SLAVE, msgs[i].slave >> 1);
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/* Write the data length. */
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BCM_BSC_WRITE(sc, BCM_BSC_DLEN, msgs[i].len);
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sc->sc_data = msgs[i].buf;
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sc->sc_resid = msgs[i].len;
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if ((msgs[i].flags & IIC_M_RD) == 0) {
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/* Fill up the TX FIFO. */
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status = BCM_BSC_READ(sc, BCM_BSC_STATUS);
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while (sc->sc_resid > 0 &&
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(status & BCM_BSC_STATUS_TXD)) {
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BCM_BSC_WRITE(sc, BCM_BSC_DATA, *sc->sc_data);
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sc->sc_data++;
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sc->sc_resid--;
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status = BCM_BSC_READ(sc, BCM_BSC_STATUS);
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}
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read = 0;
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intr = BCM_BSC_CTRL_INTT;
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sc->sc_flags &= ~BCM_I2C_READ;
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} else {
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sc->sc_flags |= BCM_I2C_READ;
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read = BCM_BSC_CTRL_READ;
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intr = BCM_BSC_CTRL_INTR;
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}
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intr |= BCM_BSC_CTRL_INTD;
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/* Start the transfer. */
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BCM_BSC_WRITE(sc, BCM_BSC_CTRL, BCM_BSC_CTRL_I2CEN |
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BCM_BSC_CTRL_ST | read | intr);
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/* Wait for the transaction to complete. */
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err = mtx_sleep(dev, &sc->sc_mtx, 0, "bsciow", hz);
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/* Check for errors. */
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if (err == 0 && (sc->sc_flags & BCM_I2C_ERROR))
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err = EIO;
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if (err != 0)
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break;
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}
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/* Clean the controller flags. */
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sc->sc_flags = 0;
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/* Wake up the threads waiting for bus. */
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wakeup(dev);
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BCM_BSC_UNLOCK(sc);
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return (err);
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}
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static int
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bcm_bsc_iicbus_reset(device_t dev, u_char speed, u_char addr, u_char *oldaddr)
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{
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struct bcm_bsc_softc *sc;
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uint32_t busfreq;
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sc = device_get_softc(dev);
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BCM_BSC_LOCK(sc);
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bcm_bsc_reset(sc);
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if (sc->sc_iicbus == NULL)
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busfreq = 100000;
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else
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busfreq = IICBUS_GET_FREQUENCY(sc->sc_iicbus, speed);
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BCM_BSC_WRITE(sc, BCM_BSC_CLOCK, BCM_BSC_CORE_CLK / busfreq);
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BCM_BSC_UNLOCK(sc);
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|
return (IIC_ENOADDR);
|
|
}
|
|
|
|
static phandle_t
|
|
bcm_bsc_get_node(device_t bus, device_t dev)
|
|
{
|
|
|
|
/* We only have one child, the I2C bus, which needs our own node. */
|
|
return (ofw_bus_get_node(bus));
|
|
}
|
|
|
|
static device_method_t bcm_bsc_methods[] = {
|
|
/* Device interface */
|
|
DEVMETHOD(device_probe, bcm_bsc_probe),
|
|
DEVMETHOD(device_attach, bcm_bsc_attach),
|
|
DEVMETHOD(device_detach, bcm_bsc_detach),
|
|
|
|
/* iicbus interface */
|
|
DEVMETHOD(iicbus_reset, bcm_bsc_iicbus_reset),
|
|
DEVMETHOD(iicbus_callback, iicbus_null_callback),
|
|
DEVMETHOD(iicbus_transfer, bcm_bsc_transfer),
|
|
|
|
/* ofw_bus interface */
|
|
DEVMETHOD(ofw_bus_get_node, bcm_bsc_get_node),
|
|
|
|
DEVMETHOD_END
|
|
};
|
|
|
|
static devclass_t bcm_bsc_devclass;
|
|
|
|
static driver_t bcm_bsc_driver = {
|
|
"iichb",
|
|
bcm_bsc_methods,
|
|
sizeof(struct bcm_bsc_softc),
|
|
};
|
|
|
|
DRIVER_MODULE(iicbus, bcm2835_bsc, iicbus_driver, iicbus_devclass, 0, 0);
|
|
DRIVER_MODULE(bcm2835_bsc, simplebus, bcm_bsc_driver, bcm_bsc_devclass, 0, 0);
|