839 lines
31 KiB
C
839 lines
31 KiB
C
/***********************license start***************
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* Copyright (c) 2003-2010 Cavium Inc. (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of Cavium Inc. nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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* This Software, including technical data, may be subject to U.S. export control
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* laws, including the U.S. Export Administration Act and its associated
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* regulations, and may be subject to export or import regulations in other
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* countries.
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
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* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
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* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
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* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
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* SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
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* MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
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* VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
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* CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
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* PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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***********************license end**************************************/
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/**
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* @file
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*
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* Interface to the hardware Packet Output unit.
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*
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* Starting with SDK 1.7.0, the PKO output functions now support
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* two types of locking. CVMX_PKO_LOCK_ATOMIC_TAG continues to
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* function similarly to previous SDKs by using POW atomic tags
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* to preserve ordering and exclusivity. As a new option, you
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* can now pass CVMX_PKO_LOCK_CMD_QUEUE which uses a ll/sc
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* memory based locking instead. This locking has the advantage
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* of not affecting the tag state but doesn't preserve packet
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* ordering. CVMX_PKO_LOCK_CMD_QUEUE is appropriate in most
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* generic code while CVMX_PKO_LOCK_CMD_QUEUE should be used
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* with hand tuned fast path code.
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*
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* Some of other SDK differences visible to the command command
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* queuing:
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* - PKO indexes are no longer stored in the FAU. A large
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* percentage of the FAU register block used to be tied up
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* maintaining PKO queue pointers. These are now stored in a
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* global named block.
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* - The PKO <b>use_locking</b> parameter can now have a global
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* effect. Since all application use the same named block,
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* queue locking correctly applies across all operating
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* systems when using CVMX_PKO_LOCK_CMD_QUEUE.
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* - PKO 3 word commands are now supported. Use
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* cvmx_pko_send_packet_finish3().
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*
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* <hr>$Revision: 70030 $<hr>
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*/
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#ifndef __CVMX_PKO_H__
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#define __CVMX_PKO_H__
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#ifdef CVMX_BUILD_FOR_LINUX_KERNEL
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#include "cvmx-config.h"
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#include "cvmx-pko-defs.h"
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#include <asm/octeon/cvmx-fau.h>
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#include <asm/octeon/cvmx-fpa.h>
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#include <asm/octeon/cvmx-pow.h>
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#include <asm/octeon/cvmx-cmd-queue.h>
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#include <asm/octeon/cvmx-helper.h>
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#include <asm/octeon/cvmx-helper-cfg.h>
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#else
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# ifndef CVMX_DONT_INCLUDE_CONFIG
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# include "executive-config.h"
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# ifdef CVMX_ENABLE_PKO_FUNCTIONS
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# include "cvmx-config.h"
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# endif
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# endif
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#include "cvmx-fau.h"
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#include "cvmx-fpa.h"
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#include "cvmx-pow.h"
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#include "cvmx-cmd-queue.h"
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#include "cvmx-helper.h"
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#include "cvmx-helper-util.h"
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#include "cvmx-helper-cfg.h"
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#endif
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/* Adjust the command buffer size by 1 word so that in the case of using only
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** two word PKO commands no command words stradle buffers. The useful values
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** for this are 0 and 1. */
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#define CVMX_PKO_COMMAND_BUFFER_SIZE_ADJUST (1)
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define CVMX_PKO_MAX_OUTPUT_QUEUES_STATIC 256
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#define CVMX_PKO_MAX_OUTPUT_QUEUES ((OCTEON_IS_MODEL(OCTEON_CN31XX) || \
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OCTEON_IS_MODEL(OCTEON_CN3010) || \
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OCTEON_IS_MODEL(OCTEON_CN3005) || \
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OCTEON_IS_MODEL(OCTEON_CN50XX)) ? \
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32 : \
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(OCTEON_IS_MODEL(OCTEON_CN58XX) || \
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OCTEON_IS_MODEL(OCTEON_CN56XX) || \
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OCTEON_IS_MODEL(OCTEON_CN52XX) || \
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OCTEON_IS_MODEL(OCTEON_CN6XXX) || \
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OCTEON_IS_MODEL(OCTEON_CNF7XXX)) ? \
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256 : 128)
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#define CVMX_PKO_NUM_OUTPUT_PORTS ((OCTEON_IS_MODEL(OCTEON_CN63XX)) ? 44 : (OCTEON_IS_MODEL(OCTEON_CN66XX) ? 46 : 40))
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#define CVMX_PKO_MEM_QUEUE_PTRS_ILLEGAL_PID 63 /* use this for queues that are not used */
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#define CVMX_PKO_QUEUE_STATIC_PRIORITY 9
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#define CVMX_PKO_ILLEGAL_QUEUE 0xFFFF
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#define CVMX_PKO_MAX_QUEUE_DEPTH 0
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typedef enum
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{
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CVMX_PKO_SUCCESS,
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CVMX_PKO_INVALID_PORT,
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CVMX_PKO_INVALID_QUEUE,
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CVMX_PKO_INVALID_PRIORITY,
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CVMX_PKO_NO_MEMORY,
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CVMX_PKO_PORT_ALREADY_SETUP,
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CVMX_PKO_CMD_QUEUE_INIT_ERROR
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} cvmx_pko_status_t;
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/**
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* This enumeration represents the differnet locking modes supported by PKO.
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*/
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typedef enum
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{
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CVMX_PKO_LOCK_NONE = 0, /**< PKO doesn't do any locking. It is the responsibility
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of the application to make sure that no other core is
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accessing the same queue at the same time */
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CVMX_PKO_LOCK_ATOMIC_TAG = 1, /**< PKO performs an atomic tagswitch to insure exclusive
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access to the output queue. This will maintain
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packet ordering on output */
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CVMX_PKO_LOCK_CMD_QUEUE = 2, /**< PKO uses the common command queue locks to insure
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exclusive access to the output queue. This is a memory
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based ll/sc. This is the most portable locking
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mechanism */
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} cvmx_pko_lock_t;
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typedef struct
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{
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uint32_t packets;
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uint64_t octets;
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uint64_t doorbell;
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} cvmx_pko_port_status_t;
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/**
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* This structure defines the address to use on a packet enqueue
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*/
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typedef union
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{
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uint64_t u64;
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struct
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{
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cvmx_mips_space_t mem_space : 2; /**< Must CVMX_IO_SEG */
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uint64_t reserved :13; /**< Must be zero */
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uint64_t is_io : 1; /**< Must be one */
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uint64_t did : 8; /**< The ID of the device on the non-coherent bus */
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uint64_t reserved2 : 4; /**< Must be zero */
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uint64_t reserved3 :15; /**< Must be zero */
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uint64_t port : 9; /**< The hardware must have the output port in addition to the output queue */
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uint64_t queue : 9; /**< The output queue to send the packet to (0-127 are legal) */
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uint64_t reserved4 : 3; /**< Must be zero */
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} s;
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} cvmx_pko_doorbell_address_t;
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/**
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* Structure of the first packet output command word.
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*/
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typedef union
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{
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uint64_t u64;
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struct
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{
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cvmx_fau_op_size_t size1 : 2; /**< The size of the reg1 operation - could be 8, 16, 32, or 64 bits */
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cvmx_fau_op_size_t size0 : 2; /**< The size of the reg0 operation - could be 8, 16, 32, or 64 bits */
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uint64_t subone1 : 1; /**< If set, subtract 1, if clear, subtract packet size */
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uint64_t reg1 :11; /**< The register, subtract will be done if reg1 is non-zero */
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uint64_t subone0 : 1; /**< If set, subtract 1, if clear, subtract packet size */
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uint64_t reg0 :11; /**< The register, subtract will be done if reg0 is non-zero */
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uint64_t le : 1; /**< When set, interpret segment pointer and segment bytes in little endian order */
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uint64_t n2 : 1; /**< When set, packet data not allocated in L2 cache by PKO */
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uint64_t wqp : 1; /**< If set and rsp is set, word3 contains a pointer to a work queue entry */
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uint64_t rsp : 1; /**< If set, the hardware will send a response when done */
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uint64_t gather : 1; /**< If set, the supplied pkt_ptr is really a pointer to a list of pkt_ptr's */
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uint64_t ipoffp1 : 7; /**< If ipoffp1 is non zero, (ipoffp1-1) is the number of bytes to IP header,
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and the hardware will calculate and insert the UDP/TCP checksum */
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uint64_t ignore_i : 1; /**< If set, ignore the I bit (force to zero) from all pointer structures */
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uint64_t dontfree : 1; /**< If clear, the hardware will attempt to free the buffers containing the packet */
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uint64_t segs : 6; /**< The total number of segs in the packet, if gather set, also gather list length */
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uint64_t total_bytes :16; /**< Including L2, but no trailing CRC */
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} s;
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} cvmx_pko_command_word0_t;
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/* CSR typedefs have been moved to cvmx-pko-defs.h */
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/**
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* Definition of internal state for Packet output processing
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*/
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typedef struct
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{
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uint64_t * start_ptr; /**< ptr to start of buffer, offset kept in FAU reg */
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} cvmx_pko_state_elem_t;
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#ifdef CVMX_ENABLE_PKO_FUNCTIONS
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/**
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* Call before any other calls to initialize the packet
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* output system.
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*/
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extern void cvmx_pko_initialize_global(void);
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extern int cvmx_pko_initialize_local(void);
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#endif
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/**
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* Enables the packet output hardware. It must already be
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* configured.
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*/
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extern void cvmx_pko_enable(void);
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/**
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* Disables the packet output. Does not affect any configuration.
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*/
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extern void cvmx_pko_disable(void);
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/**
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* Shutdown and free resources required by packet output.
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*/
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#ifdef CVMX_ENABLE_PKO_FUNCTIONS
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extern void cvmx_pko_shutdown(void);
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/**
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* Configure a output port and the associated queues for use.
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*
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* @param port Port to configure.
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* @param base_queue First queue number to associate with this port.
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* @param num_queues Number of queues t oassociate with this port
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* @param priority Array of priority levels for each queue. Values are
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* allowed to be 1-8. A value of 8 get 8 times the traffic
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* of a value of 1. There must be num_queues elements in the
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* array.
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*/
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extern cvmx_pko_status_t cvmx_pko_config_port(uint64_t port, uint64_t base_queue, uint64_t num_queues, const uint64_t priority[]);
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/**
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* Ring the packet output doorbell. This tells the packet
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* output hardware that "len" command words have been added
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* to its pending list. This command includes the required
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* CVMX_SYNCWS before the doorbell ring.
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*
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* WARNING: This function may have to look up the proper PKO port in
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* the IPD port to PKO port map, and is thus slower than calling
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* cvmx_pko_doorbell_pkoid() directly if the PKO port identifier is
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* known.
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*
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* @param ipd_port The IPD port corresponding the to pko port the packet is for
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* @param queue Queue the packet is for
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* @param len Length of the command in 64 bit words
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*/
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static inline void cvmx_pko_doorbell(uint64_t ipd_port, uint64_t queue, uint64_t len)
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{
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cvmx_pko_doorbell_address_t ptr;
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uint64_t pko_port;
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pko_port = ipd_port;
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if (octeon_has_feature(OCTEON_FEATURE_PKND))
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pko_port = cvmx_helper_cfg_ipd2pko_port_base(ipd_port);
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ptr.u64 = 0;
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ptr.s.mem_space = CVMX_IO_SEG;
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ptr.s.did = CVMX_OCT_DID_PKT_SEND;
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ptr.s.is_io = 1;
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ptr.s.port = pko_port;
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ptr.s.queue = queue;
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CVMX_SYNCWS; /* Need to make sure output queue data is in DRAM before doorbell write */
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cvmx_write_io(ptr.u64, len);
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}
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#endif
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/**
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* Prepare to send a packet. This may initiate a tag switch to
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* get exclusive access to the output queue structure, and
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* performs other prep work for the packet send operation.
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*
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* cvmx_pko_send_packet_finish() MUST be called after this function is called,
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* and must be called with the same port/queue/use_locking arguments.
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*
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* The use_locking parameter allows the caller to use three
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* possible locking modes.
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* - CVMX_PKO_LOCK_NONE
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* - PKO doesn't do any locking. It is the responsibility
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* of the application to make sure that no other core
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* is accessing the same queue at the same time.
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* - CVMX_PKO_LOCK_ATOMIC_TAG
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* - PKO performs an atomic tagswitch to insure exclusive
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* access to the output queue. This will maintain
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* packet ordering on output.
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* - CVMX_PKO_LOCK_CMD_QUEUE
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* - PKO uses the common command queue locks to insure
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* exclusive access to the output queue. This is a
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* memory based ll/sc. This is the most portable
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* locking mechanism.
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*
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* NOTE: If atomic locking is used, the POW entry CANNOT be
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* descheduled, as it does not contain a valid WQE pointer.
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*
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* @param port Port to send it on, this can be either IPD port or PKO
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* port.
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* @param queue Queue to use
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* @param use_locking
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* CVMX_PKO_LOCK_NONE, CVMX_PKO_LOCK_ATOMIC_TAG, or CVMX_PKO_LOCK_CMD_QUEUE
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*/
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#ifdef CVMX_ENABLE_PKO_FUNCTIONS
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static inline void cvmx_pko_send_packet_prepare(uint64_t port, uint64_t queue, cvmx_pko_lock_t use_locking)
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{
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if (use_locking == CVMX_PKO_LOCK_ATOMIC_TAG)
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{
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/* Must do a full switch here to handle all cases. We use a fake WQE pointer, as the POW does
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** not access this memory. The WQE pointer and group are only used if this work is descheduled,
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** which is not supported by the cvmx_pko_send_packet_prepare/cvmx_pko_send_packet_finish combination.
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** Note that this is a special case in which these fake values can be used - this is not a general technique.
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*/
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uint32_t tag = CVMX_TAG_SW_BITS_INTERNAL << CVMX_TAG_SW_SHIFT | CVMX_TAG_SUBGROUP_PKO << CVMX_TAG_SUBGROUP_SHIFT | (CVMX_TAG_SUBGROUP_MASK & queue);
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cvmx_pow_tag_sw_full((cvmx_wqe_t *)cvmx_phys_to_ptr(0x80), tag, CVMX_POW_TAG_TYPE_ATOMIC, 0);
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}
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}
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#define cvmx_pko_send_packet_prepare_pkoid cvmx_pko_send_packet_prepare
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/**
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* Complete packet output. cvmx_pko_send_packet_prepare() must be called exactly once before this,
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* and the same parameters must be passed to both cvmx_pko_send_packet_prepare() and
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* cvmx_pko_send_packet_finish().
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*
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* WARNING: This function may have to look up the proper PKO port in
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* the IPD port to PKO port map, and is thus slower than calling
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* cvmx_pko_send_packet_finish_pkoid() directly if the PKO port
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* identifier is known.
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*
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* @param ipd_port The IPD port corresponding the to pko port the packet is for
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* @param queue Queue to use
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* @param pko_command
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* PKO HW command word
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* @param packet Packet to send
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* @param use_locking
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* CVMX_PKO_LOCK_NONE, CVMX_PKO_LOCK_ATOMIC_TAG, or CVMX_PKO_LOCK_CMD_QUEUE
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*
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* @return returns CVMX_PKO_SUCCESS on success, or error code on failure of output
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*/
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static inline cvmx_pko_status_t cvmx_pko_send_packet_finish(uint64_t ipd_port, uint64_t queue,
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cvmx_pko_command_word0_t pko_command,
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cvmx_buf_ptr_t packet, cvmx_pko_lock_t use_locking)
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{
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cvmx_cmd_queue_result_t result;
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if (use_locking == CVMX_PKO_LOCK_ATOMIC_TAG)
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cvmx_pow_tag_sw_wait();
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result = cvmx_cmd_queue_write2(CVMX_CMD_QUEUE_PKO(queue),
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(use_locking == CVMX_PKO_LOCK_CMD_QUEUE),
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pko_command.u64,
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packet.u64);
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if (cvmx_likely(result == CVMX_CMD_QUEUE_SUCCESS))
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{
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cvmx_pko_doorbell(ipd_port, queue, 2);
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return CVMX_PKO_SUCCESS;
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}
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else if ((result == CVMX_CMD_QUEUE_NO_MEMORY) || (result == CVMX_CMD_QUEUE_FULL))
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{
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return CVMX_PKO_NO_MEMORY;
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}
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else
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{
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return CVMX_PKO_INVALID_QUEUE;
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}
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}
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/**
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* Complete packet output. cvmx_pko_send_packet_prepare() must be called exactly once before this,
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* and the same parameters must be passed to both cvmx_pko_send_packet_prepare() and
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* cvmx_pko_send_packet_finish().
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*
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* WARNING: This function may have to look up the proper PKO port in
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* the IPD port to PKO port map, and is thus slower than calling
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* cvmx_pko_send_packet_finish3_pkoid() directly if the PKO port
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* identifier is known.
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*
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* @param ipd_port The IPD port corresponding the to pko port the packet is for
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* @param queue Queue to use
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* @param pko_command
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* PKO HW command word
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* @param packet Packet to send
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* @param addr Plysical address of a work queue entry or physical address to zero on complete.
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* @param use_locking
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* CVMX_PKO_LOCK_NONE, CVMX_PKO_LOCK_ATOMIC_TAG, or CVMX_PKO_LOCK_CMD_QUEUE
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*
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* @return returns CVMX_PKO_SUCCESS on success, or error code on failure of output
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*/
|
|
static inline cvmx_pko_status_t cvmx_pko_send_packet_finish3(uint64_t ipd_port, uint64_t queue,
|
|
cvmx_pko_command_word0_t pko_command,
|
|
cvmx_buf_ptr_t packet, uint64_t addr, cvmx_pko_lock_t use_locking)
|
|
{
|
|
cvmx_cmd_queue_result_t result;
|
|
if (use_locking == CVMX_PKO_LOCK_ATOMIC_TAG)
|
|
cvmx_pow_tag_sw_wait();
|
|
result = cvmx_cmd_queue_write3(CVMX_CMD_QUEUE_PKO(queue),
|
|
(use_locking == CVMX_PKO_LOCK_CMD_QUEUE),
|
|
pko_command.u64,
|
|
packet.u64,
|
|
addr);
|
|
if (cvmx_likely(result == CVMX_CMD_QUEUE_SUCCESS))
|
|
{
|
|
cvmx_pko_doorbell(ipd_port, queue, 3);
|
|
return CVMX_PKO_SUCCESS;
|
|
}
|
|
else if ((result == CVMX_CMD_QUEUE_NO_MEMORY) || (result == CVMX_CMD_QUEUE_FULL))
|
|
{
|
|
return CVMX_PKO_NO_MEMORY;
|
|
}
|
|
else
|
|
{
|
|
return CVMX_PKO_INVALID_QUEUE;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* Get the first pko_port for the (interface, index)
|
|
*
|
|
* @param interface
|
|
* @param index
|
|
*/
|
|
extern int cvmx_pko_get_base_pko_port(int interface, int index);
|
|
|
|
/**
|
|
* Get the number of pko_ports for the (interface, index)
|
|
*
|
|
* @param interface
|
|
* @param index
|
|
*/
|
|
extern int cvmx_pko_get_num_pko_ports(int interface, int index);
|
|
|
|
/**
|
|
* Return the pko output queue associated with a port and a specific core.
|
|
* In normal mode (PKO lockless operation is disabled), the value returned
|
|
* is the base queue.
|
|
*
|
|
* @param port Port number
|
|
* @param core Core to get queue for
|
|
*
|
|
* @return Core-specific output queue and -1 on error.
|
|
*
|
|
* Note: This function is invalid for o68.
|
|
*/
|
|
static inline int cvmx_pko_get_base_queue_per_core(int port, int core)
|
|
{
|
|
if (OCTEON_IS_MODEL(OCTEON_CN68XX))
|
|
{
|
|
cvmx_dprintf("cvmx_pko_get_base_queue_per_core() not"
|
|
"supported starting from o68!\n");
|
|
return -1;
|
|
}
|
|
|
|
#ifndef CVMX_HELPER_PKO_MAX_PORTS_INTERFACE0
|
|
#define CVMX_HELPER_PKO_MAX_PORTS_INTERFACE0 16
|
|
#endif
|
|
#ifndef CVMX_HELPER_PKO_MAX_PORTS_INTERFACE1
|
|
#define CVMX_HELPER_PKO_MAX_PORTS_INTERFACE1 16
|
|
#endif
|
|
#ifndef CVMX_PKO_QUEUES_PER_PORT_SRIO0
|
|
/* We use two queues per port for SRIO0. Having two queues per
|
|
port with two ports gives us four queues, one for each mailbox */
|
|
#define CVMX_PKO_QUEUES_PER_PORT_SRIO0 2
|
|
#endif
|
|
#ifndef CVMX_PKO_QUEUES_PER_PORT_SRIO1
|
|
/* We use two queues per port for SRIO1. Having two queues per
|
|
port with two ports gives us four queues, one for each mailbox */
|
|
#define CVMX_PKO_QUEUES_PER_PORT_SRIO1 2
|
|
#endif
|
|
#ifndef CVMX_PKO_QUEUES_PER_PORT_SRIO2
|
|
/* We use two queues per port for SRIO2. Having two queues per
|
|
port with two ports gives us four queues, one for each mailbox */
|
|
#define CVMX_PKO_QUEUES_PER_PORT_SRIO2 2
|
|
#endif
|
|
if (port < CVMX_PKO_MAX_PORTS_INTERFACE0)
|
|
return port * CVMX_PKO_QUEUES_PER_PORT_INTERFACE0 + core;
|
|
else if (port >=16 && port < 16 + CVMX_PKO_MAX_PORTS_INTERFACE1)
|
|
return CVMX_PKO_MAX_PORTS_INTERFACE0 * CVMX_PKO_QUEUES_PER_PORT_INTERFACE0 +
|
|
(port-16) * CVMX_PKO_QUEUES_PER_PORT_INTERFACE1 + core;
|
|
else if ((port >= 32) && (port < 36))
|
|
return CVMX_PKO_MAX_PORTS_INTERFACE0 * CVMX_PKO_QUEUES_PER_PORT_INTERFACE0 +
|
|
CVMX_PKO_MAX_PORTS_INTERFACE1 * CVMX_PKO_QUEUES_PER_PORT_INTERFACE1 +
|
|
(port-32) * CVMX_PKO_QUEUES_PER_PORT_PCI;
|
|
else if ((port >= 36) && (port < 40))
|
|
return CVMX_PKO_MAX_PORTS_INTERFACE0 * CVMX_PKO_QUEUES_PER_PORT_INTERFACE0 +
|
|
CVMX_PKO_MAX_PORTS_INTERFACE1 * CVMX_PKO_QUEUES_PER_PORT_INTERFACE1 +
|
|
4 * CVMX_PKO_QUEUES_PER_PORT_PCI +
|
|
(port-36) * CVMX_PKO_QUEUES_PER_PORT_LOOP;
|
|
else if ((port >= 40) && (port < 42))
|
|
return CVMX_PKO_MAX_PORTS_INTERFACE0 * CVMX_PKO_QUEUES_PER_PORT_INTERFACE0 +
|
|
CVMX_PKO_MAX_PORTS_INTERFACE1 * CVMX_PKO_QUEUES_PER_PORT_INTERFACE1 +
|
|
4 * CVMX_PKO_QUEUES_PER_PORT_PCI +
|
|
4 * CVMX_PKO_QUEUES_PER_PORT_LOOP +
|
|
(port-40) * CVMX_PKO_QUEUES_PER_PORT_SRIO0;
|
|
else if ((port >= 42) && (port < 44))
|
|
return CVMX_PKO_MAX_PORTS_INTERFACE0 * CVMX_PKO_QUEUES_PER_PORT_INTERFACE0 +
|
|
CVMX_PKO_MAX_PORTS_INTERFACE1 * CVMX_PKO_QUEUES_PER_PORT_INTERFACE1 +
|
|
4 * CVMX_PKO_QUEUES_PER_PORT_PCI +
|
|
4 * CVMX_PKO_QUEUES_PER_PORT_LOOP +
|
|
2 * CVMX_PKO_QUEUES_PER_PORT_SRIO0 +
|
|
(port-42) * CVMX_PKO_QUEUES_PER_PORT_SRIO1;
|
|
else if ((port >= 44) && (port < 46))
|
|
return CVMX_PKO_MAX_PORTS_INTERFACE0 * CVMX_PKO_QUEUES_PER_PORT_INTERFACE0 +
|
|
CVMX_PKO_MAX_PORTS_INTERFACE1 * CVMX_PKO_QUEUES_PER_PORT_INTERFACE1 +
|
|
4 * CVMX_PKO_QUEUES_PER_PORT_PCI +
|
|
4 * CVMX_PKO_QUEUES_PER_PORT_LOOP +
|
|
4 * CVMX_PKO_QUEUES_PER_PORT_SRIO0 +
|
|
(port-44) * CVMX_PKO_QUEUES_PER_PORT_SRIO2;
|
|
else
|
|
/* Given the limit on the number of ports we can map to
|
|
* CVMX_MAX_OUTPUT_QUEUES_STATIC queues (currently 256,
|
|
* divided among all cores), the remaining unmapped ports
|
|
* are assigned an illegal queue number */
|
|
return CVMX_PKO_ILLEGAL_QUEUE;
|
|
}
|
|
|
|
/**
|
|
* For a given port number, return the base pko output queue
|
|
* for the port.
|
|
*
|
|
* @param port IPD port number
|
|
* @return Base output queue
|
|
*/
|
|
extern int cvmx_pko_get_base_queue(int port);
|
|
|
|
/**
|
|
* For a given port number, return the number of pko output queues.
|
|
*
|
|
* @param port IPD port number
|
|
* @return Number of output queues
|
|
*/
|
|
extern int cvmx_pko_get_num_queues(int port);
|
|
|
|
#ifdef CVMX_ENABLE_PKO_FUNCTIONS
|
|
|
|
/**
|
|
* Get the status counters for a port.
|
|
*
|
|
* @param ipd_port Port number (ipd_port) to get statistics for.
|
|
* @param clear Set to 1 to clear the counters after they are read
|
|
* @param status Where to put the results.
|
|
*
|
|
* Note:
|
|
* - Only the doorbell for the base queue of the ipd_port is
|
|
* collected.
|
|
* - Retrieving the stats involves writing the index through
|
|
* CVMX_PKO_REG_READ_IDX and reading the stat CSRs, in that
|
|
* order. It is not MP-safe and caller should guarantee
|
|
* atomicity.
|
|
*/
|
|
static inline void cvmx_pko_get_port_status(uint64_t ipd_port, uint64_t clear,
|
|
cvmx_pko_port_status_t *status)
|
|
{
|
|
cvmx_pko_reg_read_idx_t pko_reg_read_idx;
|
|
cvmx_pko_mem_count0_t pko_mem_count0;
|
|
cvmx_pko_mem_count1_t pko_mem_count1;
|
|
int pko_port, port_base, port_limit;
|
|
|
|
if (octeon_has_feature(OCTEON_FEATURE_PKND)) {
|
|
int interface = cvmx_helper_get_interface_num(ipd_port);
|
|
int index = cvmx_helper_get_interface_index_num(ipd_port);
|
|
port_base = cvmx_helper_get_pko_port(interface, index);
|
|
if (port_base == -1)
|
|
cvmx_dprintf("Warning: Invalid port_base\n");
|
|
port_limit = port_base + cvmx_pko_get_num_pko_ports(interface, index);
|
|
} else {
|
|
port_base = ipd_port;
|
|
port_limit = port_base + 1;
|
|
}
|
|
|
|
/*
|
|
* status->packets and status->octets
|
|
*/
|
|
status->packets = 0;
|
|
status->octets = 0;
|
|
pko_reg_read_idx.u64 = 0;
|
|
|
|
for (pko_port = port_base; pko_port < port_limit; pko_port++)
|
|
{
|
|
|
|
/*
|
|
* In theory, one doesn't need to write the index csr every
|
|
* time as he can set pko_reg_read_idx.s.inc to increment
|
|
* the index automatically. Need to find out exactly how XXX.
|
|
*/
|
|
pko_reg_read_idx.s.index = pko_port;
|
|
cvmx_write_csr(CVMX_PKO_REG_READ_IDX, pko_reg_read_idx.u64);
|
|
|
|
pko_mem_count0.u64 = cvmx_read_csr(CVMX_PKO_MEM_COUNT0);
|
|
status->packets += pko_mem_count0.s.count;
|
|
if (clear)
|
|
{
|
|
pko_mem_count0.s.count = pko_port;
|
|
cvmx_write_csr(CVMX_PKO_MEM_COUNT0, pko_mem_count0.u64);
|
|
}
|
|
|
|
pko_mem_count1.u64 = cvmx_read_csr(CVMX_PKO_MEM_COUNT1);
|
|
status->octets += pko_mem_count1.s.count;
|
|
if (clear)
|
|
{
|
|
pko_mem_count1.s.count = pko_port;
|
|
cvmx_write_csr(CVMX_PKO_MEM_COUNT1, pko_mem_count1.u64);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* status->doorbell
|
|
*/
|
|
if (OCTEON_IS_MODEL(OCTEON_CN3XXX))
|
|
{
|
|
cvmx_pko_mem_debug9_t debug9;
|
|
pko_reg_read_idx.s.index = cvmx_pko_get_base_queue(ipd_port);
|
|
cvmx_write_csr(CVMX_PKO_REG_READ_IDX, pko_reg_read_idx.u64);
|
|
debug9.u64 = cvmx_read_csr(CVMX_PKO_MEM_DEBUG9);
|
|
status->doorbell = debug9.cn38xx.doorbell;
|
|
}
|
|
else
|
|
{
|
|
cvmx_pko_mem_debug8_t debug8;
|
|
pko_reg_read_idx.s.index = cvmx_pko_get_base_queue(ipd_port);
|
|
cvmx_write_csr(CVMX_PKO_REG_READ_IDX, pko_reg_read_idx.u64);
|
|
debug8.u64 = cvmx_read_csr(CVMX_PKO_MEM_DEBUG8);
|
|
if (OCTEON_IS_MODEL(OCTEON_CN68XX))
|
|
status->doorbell = debug8.cn68xx.doorbell;
|
|
else
|
|
status->doorbell = debug8.cn58xx.doorbell;
|
|
}
|
|
}
|
|
|
|
#endif /* CVMX_ENABLE_PKO_FUNCTION */
|
|
|
|
|
|
/**
|
|
* Rate limit a PKO port to a max packets/sec. This function is only
|
|
* supported on CN57XX, CN56XX, CN55XX, and CN54XX.
|
|
*
|
|
* @param port Port to rate limit
|
|
* @param packets_s Maximum packet/sec
|
|
* @param burst Maximum number of packets to burst in a row before rate
|
|
* limiting cuts in.
|
|
*
|
|
* @return Zero on success, negative on failure
|
|
*/
|
|
extern int cvmx_pko_rate_limit_packets(int port, int packets_s, int burst);
|
|
|
|
/**
|
|
* Rate limit a PKO port to a max bits/sec. This function is only
|
|
* supported on CN57XX, CN56XX, CN55XX, and CN54XX.
|
|
*
|
|
* @param port Port to rate limit
|
|
* @param bits_s PKO rate limit in bits/sec
|
|
* @param burst Maximum number of bits to burst before rate
|
|
* limiting cuts in.
|
|
*
|
|
* @return Zero on success, negative on failure
|
|
*/
|
|
extern int cvmx_pko_rate_limit_bits(int port, uint64_t bits_s, int burst);
|
|
|
|
/**
|
|
* @INTERNAL
|
|
*
|
|
* Retrieve the PKO pipe number for a port
|
|
*
|
|
* @param interface
|
|
* @param index
|
|
*
|
|
* @return negative on error.
|
|
*
|
|
* This applies only to the non-loopback interfaces.
|
|
*
|
|
*/
|
|
extern int __cvmx_pko_get_pipe(int interface, int index);
|
|
|
|
/**
|
|
* For a given PKO port number, return the base output queue
|
|
* for the port.
|
|
*
|
|
* @param pko_port PKO port number
|
|
* @return Base output queue
|
|
*/
|
|
extern int cvmx_pko_get_base_queue_pkoid(int pko_port);
|
|
|
|
/**
|
|
* For a given PKO port number, return the number of output queues
|
|
* for the port.
|
|
*
|
|
* @param pko_port PKO port number
|
|
* @return the number of output queues
|
|
*/
|
|
extern int cvmx_pko_get_num_queues_pkoid(int pko_port);
|
|
|
|
/**
|
|
* Ring the packet output doorbell. This tells the packet
|
|
* output hardware that "len" command words have been added
|
|
* to its pending list. This command includes the required
|
|
* CVMX_SYNCWS before the doorbell ring.
|
|
*
|
|
* @param pko_port Port the packet is for
|
|
* @param queue Queue the packet is for
|
|
* @param len Length of the command in 64 bit words
|
|
*/
|
|
static inline void cvmx_pko_doorbell_pkoid(uint64_t pko_port, uint64_t queue, uint64_t len)
|
|
{
|
|
cvmx_pko_doorbell_address_t ptr;
|
|
|
|
ptr.u64 = 0;
|
|
ptr.s.mem_space = CVMX_IO_SEG;
|
|
ptr.s.did = CVMX_OCT_DID_PKT_SEND;
|
|
ptr.s.is_io = 1;
|
|
ptr.s.port = pko_port;
|
|
ptr.s.queue = queue;
|
|
CVMX_SYNCWS; /* Need to make sure output queue data is in DRAM before doorbell write */
|
|
cvmx_write_io(ptr.u64, len);
|
|
}
|
|
|
|
/**
|
|
* Complete packet output. cvmx_pko_send_packet_prepare() must be called exactly once before this,
|
|
* and the same parameters must be passed to both cvmx_pko_send_packet_prepare() and
|
|
* cvmx_pko_send_packet_finish_pkoid().
|
|
*
|
|
* @param pko_port Port to send it on
|
|
* @param queue Queue to use
|
|
* @param pko_command
|
|
* PKO HW command word
|
|
* @param packet Packet to send
|
|
* @param use_locking
|
|
* CVMX_PKO_LOCK_NONE, CVMX_PKO_LOCK_ATOMIC_TAG, or CVMX_PKO_LOCK_CMD_QUEUE
|
|
*
|
|
* @return returns CVMX_PKO_SUCCESS on success, or error code on failure of output
|
|
*/
|
|
static inline cvmx_pko_status_t cvmx_pko_send_packet_finish_pkoid(int pko_port, uint64_t queue,
|
|
cvmx_pko_command_word0_t pko_command,
|
|
cvmx_buf_ptr_t packet, cvmx_pko_lock_t use_locking)
|
|
{
|
|
cvmx_cmd_queue_result_t result;
|
|
if (use_locking == CVMX_PKO_LOCK_ATOMIC_TAG)
|
|
cvmx_pow_tag_sw_wait();
|
|
result = cvmx_cmd_queue_write2(CVMX_CMD_QUEUE_PKO(queue),
|
|
(use_locking == CVMX_PKO_LOCK_CMD_QUEUE),
|
|
pko_command.u64,
|
|
packet.u64);
|
|
if (cvmx_likely(result == CVMX_CMD_QUEUE_SUCCESS))
|
|
{
|
|
cvmx_pko_doorbell_pkoid(pko_port, queue, 2);
|
|
return CVMX_PKO_SUCCESS;
|
|
}
|
|
else if ((result == CVMX_CMD_QUEUE_NO_MEMORY) || (result == CVMX_CMD_QUEUE_FULL))
|
|
{
|
|
return CVMX_PKO_NO_MEMORY;
|
|
}
|
|
else
|
|
{
|
|
return CVMX_PKO_INVALID_QUEUE;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* Complete packet output. cvmx_pko_send_packet_prepare() must be called exactly once before this,
|
|
* and the same parameters must be passed to both cvmx_pko_send_packet_prepare() and
|
|
* cvmx_pko_send_packet_finish_pkoid().
|
|
*
|
|
* @param pko_port The PKO port the packet is for
|
|
* @param queue Queue to use
|
|
* @param pko_command
|
|
* PKO HW command word
|
|
* @param packet Packet to send
|
|
* @param addr Plysical address of a work queue entry or physical address to zero on complete.
|
|
* @param use_locking
|
|
* CVMX_PKO_LOCK_NONE, CVMX_PKO_LOCK_ATOMIC_TAG, or CVMX_PKO_LOCK_CMD_QUEUE
|
|
*
|
|
* @return returns CVMX_PKO_SUCCESS on success, or error code on failure of output
|
|
*/
|
|
static inline cvmx_pko_status_t cvmx_pko_send_packet_finish3_pkoid(uint64_t pko_port, uint64_t queue,
|
|
cvmx_pko_command_word0_t pko_command,
|
|
cvmx_buf_ptr_t packet, uint64_t addr, cvmx_pko_lock_t use_locking)
|
|
{
|
|
cvmx_cmd_queue_result_t result;
|
|
if (use_locking == CVMX_PKO_LOCK_ATOMIC_TAG)
|
|
cvmx_pow_tag_sw_wait();
|
|
result = cvmx_cmd_queue_write3(CVMX_CMD_QUEUE_PKO(queue),
|
|
(use_locking == CVMX_PKO_LOCK_CMD_QUEUE),
|
|
pko_command.u64,
|
|
packet.u64,
|
|
addr);
|
|
if (cvmx_likely(result == CVMX_CMD_QUEUE_SUCCESS))
|
|
{
|
|
cvmx_pko_doorbell_pkoid(pko_port, queue, 3);
|
|
return CVMX_PKO_SUCCESS;
|
|
}
|
|
else if ((result == CVMX_CMD_QUEUE_NO_MEMORY) || (result == CVMX_CMD_QUEUE_FULL))
|
|
{
|
|
return CVMX_PKO_NO_MEMORY;
|
|
}
|
|
else
|
|
{
|
|
return CVMX_PKO_INVALID_QUEUE;
|
|
}
|
|
}
|
|
|
|
#endif /* CVMX_ENABLE_PKO_FUNCTIONS */
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* __CVMX_PKO_H__ */
|