669 lines
16 KiB
C
669 lines
16 KiB
C
/*-
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* Copyright 2016 Stanislav Galabov
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_platform.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/conf.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/proc.h>
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#include <sys/resource.h>
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#include <sys/gpio.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <mips/mediatek/mtk_soc.h>
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#include <dev/gpio/gpiobusvar.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <gnu/dts/include/dt-bindings/interrupt-controller/irq.h>
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#include "gpio_if.h"
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#include "pic_if.h"
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#define MTK_GPIO_PINS 32
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struct mtk_gpio_pin_irqsrc {
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struct intr_irqsrc isrc;
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u_int irq;
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};
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struct mtk_gpio_pin {
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uint32_t pin_caps;
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uint32_t pin_flags;
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enum intr_trigger intr_trigger;
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enum intr_polarity intr_polarity;
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char pin_name[GPIOMAXNAME];
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struct mtk_gpio_pin_irqsrc pin_irqsrc;
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};
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struct mtk_gpio_softc {
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device_t dev;
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device_t busdev;
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struct resource *res[2];
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struct mtx mtx;
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struct mtk_gpio_pin pins[MTK_GPIO_PINS];
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void *intrhand;
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uint32_t num_pins;
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uint32_t bank_id;
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};
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#define PIC_INTR_ISRC(sc, irq) (&(sc)->pins[(irq)].pin_irqsrc.isrc)
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static struct resource_spec mtk_gpio_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE | RF_SHAREABLE },
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{ SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE },
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{ -1, 0 }
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};
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static int mtk_gpio_probe(device_t dev);
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static int mtk_gpio_attach(device_t dev);
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static int mtk_gpio_detach(device_t dev);
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static int mtk_gpio_intr(void *arg);
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#define MTK_GPIO_LOCK(sc) mtx_lock_spin(&(sc)->mtx)
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#define MTK_GPIO_UNLOCK(sc) mtx_unlock_spin(&(sc)->mtx)
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#define MTK_GPIO_LOCK_INIT(sc) \
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mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), \
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"mtk_gpio", MTX_SPIN)
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#define MTK_GPIO_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtx)
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#define MTK_WRITE_4(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val))
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#define MTK_READ_4(sc, reg) bus_read_4((sc)->res[0], (reg))
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/* Register definitions */
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#define GPIO_REG(_sc, _reg) ((_reg) + (_sc)->bank_id * 0x4)
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#define GPIO_PIOINT(_sc) GPIO_REG((_sc), 0x0090)
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#define GPIO_PIOEDGE(_sc) GPIO_REG((_sc), 0x00A0)
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#define GPIO_PIORENA(_sc) GPIO_REG((_sc), 0x0050)
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#define GPIO_PIOFENA(_sc) GPIO_REG((_sc), 0x0060)
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#define GPIO_PIODATA(_sc) GPIO_REG((_sc), 0x0020)
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#define GPIO_PIODIR(_sc) GPIO_REG((_sc), 0x0000)
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#define GPIO_PIOPOL(_sc) GPIO_REG((_sc), 0x0010)
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#define GPIO_PIOSET(_sc) GPIO_REG((_sc), 0x0030)
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#define GPIO_PIORESET(_sc) GPIO_REG((_sc), 0x0040)
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static struct ofw_compat_data compat_data[] = {
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{ "mtk,mt7621-gpio-bank", 1 },
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{ "mtk,mt7628-gpio-bank", 1 },
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{ NULL, 0 }
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};
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static int
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mtk_gpio_probe(device_t dev)
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{
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phandle_t node;
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return (ENXIO);
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node = ofw_bus_get_node(dev);
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if (!OF_hasprop(node, "gpio-controller"))
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return (ENXIO);
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device_set_desc(dev, "MTK GPIO Controller (v2)");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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mtk_pic_register_isrcs(struct mtk_gpio_softc *sc)
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{
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int error;
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uint32_t irq;
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struct intr_irqsrc *isrc;
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const char *name;
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name = device_get_nameunit(sc->dev);
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for (irq = 0; irq < sc->num_pins; irq++) {
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sc->pins[irq].pin_irqsrc.irq = irq;
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isrc = PIC_INTR_ISRC(sc, irq);
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error = intr_isrc_register(isrc, sc->dev, 0, "%s", name);
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if (error != 0) {
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/* XXX call intr_isrc_deregister */
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device_printf(sc->dev, "%s failed", __func__);
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return (error);
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}
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}
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return (0);
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}
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static int
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mtk_gpio_pin_set_direction(struct mtk_gpio_softc *sc, uint32_t pin,
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uint32_t dir)
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{
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uint32_t regval, mask = (1u << pin);
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if (!(sc->pins[pin].pin_caps & dir))
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return (EINVAL);
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regval = MTK_READ_4(sc, GPIO_PIODIR(sc));
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if (dir == GPIO_PIN_INPUT)
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regval &= ~mask;
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else
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regval |= mask;
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MTK_WRITE_4(sc, GPIO_PIODIR(sc), regval);
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sc->pins[pin].pin_flags &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT);
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sc->pins[pin].pin_flags |= dir;
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return (0);
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}
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static int
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mtk_gpio_pin_set_invert(struct mtk_gpio_softc *sc, uint32_t pin, uint32_t val)
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{
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uint32_t regval, mask = (1u << pin);
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regval = MTK_READ_4(sc, GPIO_PIOPOL(sc));
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if (val)
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regval |= mask;
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else
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regval &= ~mask;
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MTK_WRITE_4(sc, GPIO_PIOPOL(sc), regval);
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sc->pins[pin].pin_flags &= ~(GPIO_PIN_INVIN | GPIO_PIN_INVOUT);
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sc->pins[pin].pin_flags |= val;
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return (0);
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}
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static void
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mtk_gpio_pin_probe(struct mtk_gpio_softc *sc, uint32_t pin)
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{
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uint32_t mask = (1u << pin);
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uint32_t val;
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/* Clear cached gpio config */
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sc->pins[pin].pin_flags = 0;
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val = MTK_READ_4(sc, GPIO_PIORENA(sc)) |
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MTK_READ_4(sc, GPIO_PIOFENA(sc));
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if (val & mask) {
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/* Pin is in interrupt mode */
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sc->pins[pin].intr_trigger = INTR_TRIGGER_EDGE;
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val = MTK_READ_4(sc, GPIO_PIORENA(sc));
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if (val & mask)
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sc->pins[pin].intr_polarity = INTR_POLARITY_HIGH;
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else
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sc->pins[pin].intr_polarity = INTR_POLARITY_LOW;
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}
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val = MTK_READ_4(sc, GPIO_PIODIR(sc));
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if (val & mask)
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sc->pins[pin].pin_flags |= GPIO_PIN_OUTPUT;
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else
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sc->pins[pin].pin_flags |= GPIO_PIN_INPUT;
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val = MTK_READ_4(sc, GPIO_PIOPOL(sc));
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if (val & mask) {
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if (sc->pins[pin].pin_flags & GPIO_PIN_INPUT) {
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sc->pins[pin].pin_flags |= GPIO_PIN_INVIN;
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} else {
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sc->pins[pin].pin_flags |= GPIO_PIN_INVOUT;
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}
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}
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}
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static int
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mtk_gpio_attach(device_t dev)
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{
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struct mtk_gpio_softc *sc;
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phandle_t node;
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uint32_t i, num_pins, bank_id;
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sc = device_get_softc(dev);
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sc->dev = dev;
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if (bus_alloc_resources(dev, mtk_gpio_spec, sc->res)) {
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device_printf(dev, "could not allocate resources for device\n");
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return (ENXIO);
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}
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MTK_GPIO_LOCK_INIT(sc);
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node = ofw_bus_get_node(dev);
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if (OF_hasprop(node, "clocks"))
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mtk_soc_start_clock(dev);
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if (OF_hasprop(node, "resets"))
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mtk_soc_reset_device(dev);
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if (OF_hasprop(node, "mtk,bank-id") && (OF_getencprop(node,
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"mtk,bank-id", &bank_id, sizeof(bank_id)) >= 0))
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sc->bank_id = bank_id;
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else
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sc->bank_id = device_get_unit(dev);
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if (OF_hasprop(node, "mtk,num-pins") && (OF_getencprop(node,
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"mtk,num-pins", &num_pins, sizeof(num_pins)) >= 0))
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sc->num_pins = num_pins;
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else
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sc->num_pins = MTK_GPIO_PINS;
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for (i = 0; i < sc->num_pins; i++) {
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sc->pins[i].pin_caps |= GPIO_PIN_INPUT | GPIO_PIN_OUTPUT |
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GPIO_PIN_INVIN | GPIO_PIN_INVOUT;
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sc->pins[i].intr_polarity = INTR_POLARITY_HIGH;
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sc->pins[i].intr_trigger = INTR_TRIGGER_EDGE;
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snprintf(sc->pins[i].pin_name, GPIOMAXNAME - 1, "gpio%c%d",
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device_get_unit(dev) + 'a', i);
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sc->pins[i].pin_name[GPIOMAXNAME - 1] = '\0';
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mtk_gpio_pin_probe(sc, i);
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}
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if (mtk_pic_register_isrcs(sc) != 0) {
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device_printf(dev, "could not register PIC ISRCs\n");
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goto fail;
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}
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if (intr_pic_register(dev, OF_xref_from_node(node)) == NULL) {
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device_printf(dev, "could not register PIC\n");
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goto fail;
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}
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if (bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE,
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mtk_gpio_intr, NULL, sc, &sc->intrhand) != 0)
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goto fail_pic;
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sc->busdev = gpiobus_attach_bus(dev);
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if (sc->busdev == NULL)
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goto fail_pic;
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return (0);
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fail_pic:
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intr_pic_deregister(dev, OF_xref_from_node(node));
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fail:
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if(sc->intrhand != NULL)
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bus_teardown_intr(dev, sc->res[1], sc->intrhand);
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bus_release_resources(dev, mtk_gpio_spec, sc->res);
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MTK_GPIO_LOCK_DESTROY(sc);
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return (ENXIO);
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}
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static int
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mtk_gpio_detach(device_t dev)
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{
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struct mtk_gpio_softc *sc = device_get_softc(dev);
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phandle_t node;
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node = ofw_bus_get_node(dev);
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intr_pic_deregister(dev, OF_xref_from_node(node));
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if (sc->intrhand != NULL)
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bus_teardown_intr(dev, sc->res[1], sc->intrhand);
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bus_release_resources(dev, mtk_gpio_spec, sc->res);
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MTK_GPIO_LOCK_DESTROY(sc);
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return (0);
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}
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static device_t
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mtk_gpio_get_bus(device_t dev)
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{
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struct mtk_gpio_softc *sc = device_get_softc(dev);
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return (sc->busdev);
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}
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static int
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mtk_gpio_pin_max(device_t dev, int *maxpin)
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{
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struct mtk_gpio_softc *sc = device_get_softc(dev);
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*maxpin = sc->num_pins - 1;
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return (0);
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}
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static int
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mtk_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
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{
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struct mtk_gpio_softc *sc = device_get_softc(dev);
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if (pin >= sc->num_pins)
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return (EINVAL);
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MTK_GPIO_LOCK(sc);
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*caps = sc->pins[pin].pin_caps;
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MTK_GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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mtk_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
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{
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struct mtk_gpio_softc *sc = device_get_softc(dev);
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if (pin >= sc->num_pins)
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return (EINVAL);
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MTK_GPIO_LOCK(sc);
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*flags = sc->pins[pin].pin_flags;
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MTK_GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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mtk_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
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{
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struct mtk_gpio_softc *sc = device_get_softc(dev);
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if (pin >= sc->num_pins)
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return (EINVAL);
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strncpy(name, sc->pins[pin].pin_name, GPIOMAXNAME - 1);
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name[GPIOMAXNAME - 1] = '\0';
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return (0);
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}
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static int
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mtk_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
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{
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struct mtk_gpio_softc *sc;
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int retval;
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sc = device_get_softc(dev);
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if (pin >= sc->num_pins)
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return (EINVAL);
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MTK_GPIO_LOCK(sc);
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retval = mtk_gpio_pin_set_direction(sc, pin,
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flags & (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT));
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if (retval == 0)
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retval = mtk_gpio_pin_set_invert(sc, pin,
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flags & (GPIO_PIN_INVIN | GPIO_PIN_INVOUT));
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MTK_GPIO_UNLOCK(sc);
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return (retval);
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}
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static int
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mtk_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
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{
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struct mtk_gpio_softc *sc;
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int ret;
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sc = device_get_softc(dev);
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ret = 0;
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if (pin >= sc->num_pins)
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return (EINVAL);
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MTK_GPIO_LOCK(sc);
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if (value)
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MTK_WRITE_4(sc, GPIO_PIOSET(sc), (1u << pin));
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else
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MTK_WRITE_4(sc, GPIO_PIORESET(sc), (1u << pin));
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MTK_GPIO_UNLOCK(sc);
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return (ret);
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}
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static int
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mtk_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
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{
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struct mtk_gpio_softc *sc;
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uint32_t data;
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int ret;
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sc = device_get_softc(dev);
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ret = 0;
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if (pin >= sc->num_pins)
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return (EINVAL);
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MTK_GPIO_LOCK(sc);
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data = MTK_READ_4(sc, GPIO_PIODATA(sc));
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*val = (data & (1u << pin)) ? 1 : 0;
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MTK_GPIO_UNLOCK(sc);
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return (ret);
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}
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static int
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mtk_gpio_pin_toggle(device_t dev, uint32_t pin)
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{
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struct mtk_gpio_softc *sc;
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uint32_t val;
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int ret;
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sc = device_get_softc(dev);
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ret = 0;
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if (pin >= sc->num_pins)
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return (EINVAL);
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MTK_GPIO_LOCK(sc);
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if(!(sc->pins[pin].pin_flags & GPIO_PIN_OUTPUT)) {
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ret = EINVAL;
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goto out;
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}
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val = MTK_READ_4(sc, GPIO_PIODATA(sc));
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val &= (1u << pin);
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if (val)
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MTK_WRITE_4(sc, GPIO_PIORESET(sc), (1u << pin));
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else
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MTK_WRITE_4(sc, GPIO_PIOSET(sc), (1u << pin));
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out:
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MTK_GPIO_UNLOCK(sc);
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return (ret);
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}
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|
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static int
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mtk_gpio_pic_map_intr(device_t dev, struct intr_map_data *data,
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struct intr_irqsrc **isrcp)
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{
|
|
struct intr_map_data_fdt *daf;
|
|
struct mtk_gpio_softc *sc;
|
|
|
|
if (data->type != INTR_MAP_DATA_FDT)
|
|
return (ENOTSUP);
|
|
|
|
sc = device_get_softc(dev);
|
|
daf = (struct intr_map_data_fdt *)data;
|
|
|
|
if (daf->ncells != 1 || daf->cells[0] >= sc->num_pins)
|
|
return (EINVAL);
|
|
|
|
*isrcp = PIC_INTR_ISRC(sc, daf->cells[0]);
|
|
return (0);
|
|
}
|
|
|
|
static void
|
|
mtk_gpio_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
|
|
{
|
|
struct mtk_gpio_softc *sc;
|
|
struct mtk_gpio_pin_irqsrc *pisrc;
|
|
uint32_t pin, mask, val;
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
pisrc = (struct mtk_gpio_pin_irqsrc *)isrc;
|
|
pin = pisrc->irq;
|
|
mask = 1u << pin;
|
|
|
|
MTK_GPIO_LOCK(sc);
|
|
|
|
if (sc->pins[pin].intr_polarity == INTR_POLARITY_LOW) {
|
|
val = MTK_READ_4(sc, GPIO_PIORENA(sc)) & ~mask;
|
|
MTK_WRITE_4(sc, GPIO_PIORENA(sc), val);
|
|
val = MTK_READ_4(sc, GPIO_PIOFENA(sc)) | mask;
|
|
MTK_WRITE_4(sc, GPIO_PIOFENA(sc), val);
|
|
} else {
|
|
val = MTK_READ_4(sc, GPIO_PIOFENA(sc)) & ~mask;
|
|
MTK_WRITE_4(sc, GPIO_PIOFENA(sc), val);
|
|
val = MTK_READ_4(sc, GPIO_PIORENA(sc)) | mask;
|
|
MTK_WRITE_4(sc, GPIO_PIORENA(sc), val);
|
|
}
|
|
|
|
MTK_GPIO_UNLOCK(sc);
|
|
}
|
|
|
|
static void
|
|
mtk_gpio_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
|
|
{
|
|
struct mtk_gpio_softc *sc;
|
|
struct mtk_gpio_pin_irqsrc *pisrc;
|
|
uint32_t pin, mask, val;
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
pisrc = (struct mtk_gpio_pin_irqsrc *)isrc;
|
|
pin = pisrc->irq;
|
|
mask = 1u << pin;
|
|
|
|
MTK_GPIO_LOCK(sc);
|
|
|
|
val = MTK_READ_4(sc, GPIO_PIORENA(sc)) & ~mask;
|
|
MTK_WRITE_4(sc, GPIO_PIORENA(sc), val);
|
|
val = MTK_READ_4(sc, GPIO_PIOFENA(sc)) & ~mask;
|
|
MTK_WRITE_4(sc, GPIO_PIOFENA(sc), val);
|
|
|
|
MTK_GPIO_UNLOCK(sc);
|
|
}
|
|
|
|
static void
|
|
mtk_gpio_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
|
|
{
|
|
|
|
mtk_gpio_pic_disable_intr(dev, isrc);
|
|
}
|
|
|
|
static void
|
|
mtk_gpio_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
|
|
{
|
|
|
|
mtk_gpio_pic_enable_intr(dev, isrc);
|
|
}
|
|
|
|
static void
|
|
mtk_gpio_pic_post_filter(device_t dev, struct intr_irqsrc *isrc)
|
|
{
|
|
struct mtk_gpio_softc *sc;
|
|
struct mtk_gpio_pin_irqsrc *pisrc;
|
|
|
|
pisrc = (struct mtk_gpio_pin_irqsrc *)isrc;
|
|
sc = device_get_softc(dev);
|
|
MTK_GPIO_LOCK(sc);
|
|
MTK_WRITE_4(sc, GPIO_PIOINT(sc), 1u << pisrc->irq);
|
|
MTK_GPIO_UNLOCK(sc);
|
|
}
|
|
|
|
static int
|
|
mtk_gpio_intr(void *arg)
|
|
{
|
|
struct mtk_gpio_softc *sc;
|
|
uint32_t i, interrupts;
|
|
|
|
sc = arg;
|
|
interrupts = MTK_READ_4(sc, GPIO_PIOINT(sc));
|
|
|
|
for (i = 0; interrupts != 0; i++, interrupts >>= 1) {
|
|
if ((interrupts & 0x1) == 0)
|
|
continue;
|
|
if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i),
|
|
curthread->td_intr_frame) != 0) {
|
|
device_printf(sc->dev, "spurious interrupt %d\n", i);
|
|
}
|
|
}
|
|
|
|
return (FILTER_HANDLED);
|
|
}
|
|
|
|
static phandle_t
|
|
mtk_gpio_get_node(device_t bus, device_t dev)
|
|
{
|
|
|
|
/* We only have one child, the GPIO bus, which needs our own node. */
|
|
return (ofw_bus_get_node(bus));
|
|
}
|
|
|
|
static device_method_t mtk_gpio_methods[] = {
|
|
/* Device interface */
|
|
DEVMETHOD(device_probe, mtk_gpio_probe),
|
|
DEVMETHOD(device_attach, mtk_gpio_attach),
|
|
DEVMETHOD(device_detach, mtk_gpio_detach),
|
|
|
|
/* GPIO protocol */
|
|
DEVMETHOD(gpio_get_bus, mtk_gpio_get_bus),
|
|
DEVMETHOD(gpio_pin_max, mtk_gpio_pin_max),
|
|
DEVMETHOD(gpio_pin_getname, mtk_gpio_pin_getname),
|
|
DEVMETHOD(gpio_pin_getflags, mtk_gpio_pin_getflags),
|
|
DEVMETHOD(gpio_pin_getcaps, mtk_gpio_pin_getcaps),
|
|
DEVMETHOD(gpio_pin_setflags, mtk_gpio_pin_setflags),
|
|
DEVMETHOD(gpio_pin_get, mtk_gpio_pin_get),
|
|
DEVMETHOD(gpio_pin_set, mtk_gpio_pin_set),
|
|
DEVMETHOD(gpio_pin_toggle, mtk_gpio_pin_toggle),
|
|
|
|
/* Interrupt controller interface */
|
|
DEVMETHOD(pic_disable_intr, mtk_gpio_pic_disable_intr),
|
|
DEVMETHOD(pic_enable_intr, mtk_gpio_pic_enable_intr),
|
|
DEVMETHOD(pic_map_intr, mtk_gpio_pic_map_intr),
|
|
DEVMETHOD(pic_post_filter, mtk_gpio_pic_post_filter),
|
|
DEVMETHOD(pic_post_ithread, mtk_gpio_pic_post_ithread),
|
|
DEVMETHOD(pic_pre_ithread, mtk_gpio_pic_pre_ithread),
|
|
|
|
/* ofw_bus interface */
|
|
DEVMETHOD(ofw_bus_get_node, mtk_gpio_get_node),
|
|
|
|
DEVMETHOD_END
|
|
};
|
|
|
|
static driver_t mtk_gpio_driver = {
|
|
"gpio",
|
|
mtk_gpio_methods,
|
|
sizeof(struct mtk_gpio_softc),
|
|
};
|
|
|
|
static devclass_t mtk_gpio_devclass;
|
|
|
|
EARLY_DRIVER_MODULE(mtk_gpio_v2, simplebus, mtk_gpio_driver,
|
|
mtk_gpio_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
|