gf_cpu.c: fix pclmul detection and add portable cpuid feature bit defs
Correct invalid check for pclmul support. Was checking SSE3 (1 << 0) vs. PCLMUL (1 << 1). Fixes: http://tracker.ceph.com/issues/18092 Signed-off-by: John Coyle <dx9err@gmail.com>master
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c431e1ff76
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7c2fcc5bd0
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src/gf_cpu.c
22
src/gf_cpu.c
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@ -22,6 +22,18 @@ int gf_cpu_supports_arm_neon = 0;
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#if defined(__x86_64__)
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#if defined(__x86_64__)
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/* CPUID Feature Bits */
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/* ECX */
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#define GF_CPU_SSE3 (1 << 0)
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#define GF_CPU_PCLMUL (1 << 1)
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#define GF_CPU_SSSE3 (1 << 9)
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#define GF_CPU_SSE41 (1 << 19)
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#define GF_CPU_SSE42 (1 << 20)
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/* EDX */
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#define GF_CPU_SSE2 (1 << 26)
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#if defined(_MSC_VER)
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#if defined(_MSC_VER)
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#define cpuid(info, x) __cpuidex(info, x, 0)
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#define cpuid(info, x) __cpuidex(info, x, 0)
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@ -50,7 +62,7 @@ void gf_cpu_identify(void)
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cpuid(reg, 1);
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cpuid(reg, 1);
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#if defined(INTEL_SSE4_PCLMUL)
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#if defined(INTEL_SSE4_PCLMUL)
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if ((reg[2] & 1) != 0 && !getenv("GF_COMPLETE_DISABLE_SSE4_PCLMUL")) {
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if ((reg[2] & GF_CPU_PCLMUL) != 0 && !getenv("GF_COMPLETE_DISABLE_SSE4_PCLMUL")) {
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gf_cpu_supports_intel_pclmul = 1;
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gf_cpu_supports_intel_pclmul = 1;
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#ifdef DEBUG_CPU_DETECTION
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#ifdef DEBUG_CPU_DETECTION
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printf("#gf_cpu_supports_intel_pclmul\n");
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printf("#gf_cpu_supports_intel_pclmul\n");
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@ -59,7 +71,7 @@ void gf_cpu_identify(void)
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#endif
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#endif
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#if defined(INTEL_SSE4)
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#if defined(INTEL_SSE4)
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if (((reg[2] & (1<<20)) != 0 || (reg[2] & (1<<19)) != 0) && !getenv("GF_COMPLETE_DISABLE_SSE4")) {
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if (((reg[2] & GF_CPU_SSE42) != 0 || (reg[2] & GF_CPU_SSE41) != 0) && !getenv("GF_COMPLETE_DISABLE_SSE4")) {
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gf_cpu_supports_intel_sse4 = 1;
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gf_cpu_supports_intel_sse4 = 1;
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#ifdef DEBUG_CPU_DETECTION
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#ifdef DEBUG_CPU_DETECTION
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printf("#gf_cpu_supports_intel_sse4\n");
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printf("#gf_cpu_supports_intel_sse4\n");
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@ -68,7 +80,7 @@ void gf_cpu_identify(void)
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#endif
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#endif
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#if defined(INTEL_SSSE3)
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#if defined(INTEL_SSSE3)
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if ((reg[2] & (1<<9)) != 0 && !getenv("GF_COMPLETE_DISABLE_SSSE3")) {
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if ((reg[2] & GF_CPU_SSSE3) != 0 && !getenv("GF_COMPLETE_DISABLE_SSSE3")) {
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gf_cpu_supports_intel_ssse3 = 1;
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gf_cpu_supports_intel_ssse3 = 1;
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#ifdef DEBUG_CPU_DETECTION
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#ifdef DEBUG_CPU_DETECTION
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printf("#gf_cpu_supports_intel_ssse3\n");
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printf("#gf_cpu_supports_intel_ssse3\n");
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@ -77,7 +89,7 @@ void gf_cpu_identify(void)
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#endif
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#endif
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#if defined(INTEL_SSE3)
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#if defined(INTEL_SSE3)
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if ((reg[2] & 1) != 0 && !getenv("GF_COMPLETE_DISABLE_SSE3")) {
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if ((reg[2] & GF_CPU_SSE3) != 0 && !getenv("GF_COMPLETE_DISABLE_SSE3")) {
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gf_cpu_supports_intel_sse3 = 1;
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gf_cpu_supports_intel_sse3 = 1;
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#ifdef DEBUG_CPU_DETECTION
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#ifdef DEBUG_CPU_DETECTION
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printf("#gf_cpu_supports_intel_sse3\n");
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printf("#gf_cpu_supports_intel_sse3\n");
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@ -86,7 +98,7 @@ void gf_cpu_identify(void)
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#endif
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#endif
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#if defined(INTEL_SSE2)
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#if defined(INTEL_SSE2)
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if ((reg[3] & (1<<26)) != 0 && !getenv("GF_COMPLETE_DISABLE_SSE2")) {
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if ((reg[3] & GF_CPU_SSE2) != 0 && !getenv("GF_COMPLETE_DISABLE_SSE2")) {
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gf_cpu_supports_intel_sse2 = 1;
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gf_cpu_supports_intel_sse2 = 1;
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#ifdef DEBUG_CPU_DETECTION
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#ifdef DEBUG_CPU_DETECTION
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printf("#gf_cpu_supports_intel_sse2\n");
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printf("#gf_cpu_supports_intel_sse2\n");
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