2013-03-12 04:31:07 +04:00
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/*
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* PowerPC MMU, TLB and BAT emulation helpers for QEMU.
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*
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* Copyright (c) 2003-2007 Jocelyn Mayer
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* Copyright (c) 2013 David Gibson, IBM Corporation
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "cpu.h"
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#include "helper.h"
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#include "sysemu/kvm.h"
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#include "kvm_ppc.h"
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#include "mmu-hash32.h"
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//#define DEBUG_MMU
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#ifdef DEBUG_MMU
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# define LOG_MMU(...) qemu_log(__VA_ARGS__)
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# define LOG_MMU_STATE(env) log_cpu_state((env), 0)
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#else
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# define LOG_MMU(...) do { } while (0)
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# define LOG_MMU_STATE(...) do { } while (0)
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#endif
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#define PTE_PTEM_MASK 0x7FFFFFBF
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#define PTE_CHECK_MASK (TARGET_PAGE_MASK | 0x7B)
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static inline int pte_is_valid_hash32(target_ulong pte0)
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{
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return pte0 & 0x80000000 ? 1 : 0;
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}
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2013-03-12 04:31:08 +04:00
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static int pte_check_hash32(mmu_ctx_t *ctx, target_ulong pte0,
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target_ulong pte1, int h, int rw, int type)
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2013-03-12 04:31:07 +04:00
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{
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target_ulong ptem, mmask;
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int access, ret, pteh, ptev, pp;
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ret = -1;
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/* Check validity and table match */
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ptev = pte_is_valid_hash32(pte0);
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pteh = (pte0 >> 6) & 1;
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if (ptev && h == pteh) {
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/* Check vsid & api */
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ptem = pte0 & PTE_PTEM_MASK;
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mmask = PTE_CHECK_MASK;
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pp = pte1 & 0x00000003;
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if (ptem == ctx->ptem) {
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if (ctx->raddr != (hwaddr)-1ULL) {
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/* all matches should have equal RPN, WIMG & PP */
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if ((ctx->raddr & mmask) != (pte1 & mmask)) {
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qemu_log("Bad RPN/WIMG/PP\n");
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return -3;
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}
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}
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/* Compute access rights */
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access = pp_check(ctx->key, pp, ctx->nx);
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/* Keep the matching PTE informations */
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ctx->raddr = pte1;
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ctx->prot = access;
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ret = check_prot(ctx->prot, rw, type);
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if (ret == 0) {
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/* Access granted */
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LOG_MMU("PTE access granted !\n");
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} else {
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/* Access right violation */
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LOG_MMU("PTE access rejected\n");
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}
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}
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}
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return ret;
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}
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2013-03-12 04:31:08 +04:00
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/* PTE table lookup */
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int find_pte32(CPUPPCState *env, mmu_ctx_t *ctx, int h,
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int rw, int type, int target_page_bits)
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{
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hwaddr pteg_off;
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target_ulong pte0, pte1;
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int i, good = -1;
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int ret, r;
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ret = -1; /* No entry found */
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pteg_off = get_pteg_offset(env, ctx->hash[h], HASH_PTE_SIZE_32);
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for (i = 0; i < 8; i++) {
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if (env->external_htab) {
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pte0 = ldl_p(env->external_htab + pteg_off + (i * 8));
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pte1 = ldl_p(env->external_htab + pteg_off + (i * 8) + 4);
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} else {
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pte0 = ldl_phys(env->htab_base + pteg_off + (i * 8));
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pte1 = ldl_phys(env->htab_base + pteg_off + (i * 8) + 4);
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}
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r = pte_check_hash32(ctx, pte0, pte1, h, rw, type);
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LOG_MMU("Load pte from %08" HWADDR_PRIx " => " TARGET_FMT_lx " "
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TARGET_FMT_lx " %d %d %d " TARGET_FMT_lx "\n",
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pteg_off + (i * 8), pte0, pte1, (int)(pte0 >> 31), h,
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(int)((pte0 >> 6) & 1), ctx->ptem);
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switch (r) {
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case -3:
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/* PTE inconsistency */
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return -1;
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case -2:
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/* Access violation */
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ret = -2;
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good = i;
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break;
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case -1:
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default:
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/* No PTE match */
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break;
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case 0:
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/* access granted */
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/* XXX: we should go on looping to check all PTEs consistency
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* but if we can speed-up the whole thing as the
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* result would be undefined if PTEs are not consistent.
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*/
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ret = 0;
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good = i;
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goto done;
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}
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}
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if (good != -1) {
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done:
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LOG_MMU("found PTE at addr %08" HWADDR_PRIx " prot=%01x ret=%d\n",
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ctx->raddr, ctx->prot, ret);
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/* Update page flags */
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pte1 = ctx->raddr;
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if (pte_update_flags(ctx, &pte1, ret, rw) == 1) {
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if (env->external_htab) {
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stl_p(env->external_htab + pteg_off + (good * 8) + 4,
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pte1);
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} else {
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stl_phys_notdirty(env->htab_base + pteg_off +
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(good * 8) + 4, pte1);
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}
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}
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}
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/* We have a TLB that saves 4K pages, so let's
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* split a huge page to 4k chunks */
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if (target_page_bits != TARGET_PAGE_BITS) {
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ctx->raddr |= (ctx->eaddr & ((1 << target_page_bits) - 1))
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& TARGET_PAGE_MASK;
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}
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return ret;
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}
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