2011-07-07 16:37:12 +04:00
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/*
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* Optimizations for Tiny Code Generator for QEMU
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*
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* Copyright (c) 2010 Samsung Electronics.
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* Contributed by Kirill Batuzov <batuzovk@ispras.ru>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2016-01-26 21:17:08 +03:00
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#include "qemu/osdep.h"
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2011-07-07 16:37:12 +04:00
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#include "qemu-common.h"
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2016-03-15 15:16:36 +03:00
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#include "exec/cpu-common.h"
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2011-07-07 16:37:12 +04:00
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#include "tcg-op.h"
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#define CASE_OP_32_64(x) \
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glue(glue(case INDEX_op_, x), _i32): \
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glue(glue(case INDEX_op_, x), _i64)
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2011-07-07 16:37:13 +04:00
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struct tcg_temp_info {
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2015-07-27 13:41:44 +03:00
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bool is_const;
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2011-07-07 16:37:13 +04:00
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uint16_t prev_copy;
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uint16_t next_copy;
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tcg_target_ulong val;
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2013-01-12 03:42:52 +04:00
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tcg_target_ulong mask;
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2011-07-07 16:37:13 +04:00
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};
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static struct tcg_temp_info temps[TCG_MAX_TEMPS];
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2015-07-27 13:41:44 +03:00
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static TCGTempSet temps_used;
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2011-07-07 16:37:13 +04:00
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2015-07-27 13:41:44 +03:00
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static inline bool temp_is_const(TCGArg arg)
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{
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2015-07-27 13:41:44 +03:00
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return temps[arg].is_const;
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2015-07-27 13:41:44 +03:00
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}
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static inline bool temp_is_copy(TCGArg arg)
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{
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2015-07-27 13:41:44 +03:00
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return temps[arg].next_copy != arg;
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2015-07-27 13:41:44 +03:00
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}
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2015-07-27 13:41:44 +03:00
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/* Reset TEMP's state, possibly removing the temp for the list of copies. */
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2012-09-11 14:31:21 +04:00
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static void reset_temp(TCGArg temp)
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2011-07-07 16:37:13 +04:00
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{
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2015-07-27 13:41:44 +03:00
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temps[temps[temp].next_copy].prev_copy = temps[temp].prev_copy;
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temps[temps[temp].prev_copy].next_copy = temps[temp].next_copy;
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temps[temp].next_copy = temp;
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temps[temp].prev_copy = temp;
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temps[temp].is_const = false;
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2013-01-12 03:42:52 +04:00
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temps[temp].mask = -1;
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2011-07-07 16:37:13 +04:00
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}
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2015-07-27 13:41:44 +03:00
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/* Reset all temporaries, given that there are NB_TEMPS of them. */
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static void reset_all_temps(int nb_temps)
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{
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bitmap_zero(temps_used.l, nb_temps);
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}
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/* Initialize and activate a temporary. */
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static void init_temp_info(TCGArg temp)
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{
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if (!test_bit(temp, temps_used.l)) {
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2015-07-27 13:41:44 +03:00
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temps[temp].next_copy = temp;
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temps[temp].prev_copy = temp;
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temps[temp].is_const = false;
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2015-07-27 13:41:44 +03:00
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temps[temp].mask = -1;
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set_bit(temp, temps_used.l);
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}
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}
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2011-07-30 23:18:32 +04:00
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static int op_bits(TCGOpcode op)
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2011-07-07 16:37:13 +04:00
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{
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2011-08-18 01:11:45 +04:00
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const TCGOpDef *def = &tcg_op_defs[op];
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return def->flags & TCG_OPF_64BIT ? 64 : 32;
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2011-07-07 16:37:13 +04:00
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}
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2014-05-22 21:59:12 +04:00
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static TCGOpcode op_to_mov(TCGOpcode op)
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{
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switch (op_bits(op)) {
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case 32:
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return INDEX_op_mov_i32;
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case 64:
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return INDEX_op_mov_i64;
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default:
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fprintf(stderr, "op_to_mov: unexpected return value of "
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"function op_bits.\n");
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tcg_abort();
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}
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}
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2011-07-30 23:18:32 +04:00
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static TCGOpcode op_to_movi(TCGOpcode op)
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2011-07-07 16:37:13 +04:00
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{
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switch (op_bits(op)) {
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case 32:
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return INDEX_op_movi_i32;
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case 64:
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return INDEX_op_movi_i64;
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default:
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fprintf(stderr, "op_to_movi: unexpected return value of "
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"function op_bits.\n");
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tcg_abort();
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}
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}
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2012-09-11 14:31:21 +04:00
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static TCGArg find_better_copy(TCGContext *s, TCGArg temp)
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{
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TCGArg i;
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/* If this is already a global, we can't do better. */
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if (temp < s->nb_globals) {
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return temp;
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}
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/* Search for a global first. */
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for (i = temps[temp].next_copy ; i != temp ; i = temps[i].next_copy) {
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if (i < s->nb_globals) {
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return i;
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}
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}
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/* If it is a temp, search for a temp local. */
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if (!s->temps[temp].temp_local) {
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for (i = temps[temp].next_copy ; i != temp ; i = temps[i].next_copy) {
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if (s->temps[i].temp_local) {
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return i;
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}
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}
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}
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/* Failure to find a better representation, return the same temp. */
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return temp;
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}
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static bool temps_are_copies(TCGArg arg1, TCGArg arg2)
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{
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TCGArg i;
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if (arg1 == arg2) {
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return true;
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}
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2015-07-27 13:41:44 +03:00
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if (!temp_is_copy(arg1) || !temp_is_copy(arg2)) {
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2012-09-11 14:31:21 +04:00
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return false;
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}
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for (i = temps[arg1].next_copy ; i != arg1 ; i = temps[i].next_copy) {
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if (i == arg2) {
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return true;
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}
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}
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return false;
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}
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2015-06-05 12:19:18 +03:00
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static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op, TCGArg *args,
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TCGArg dst, TCGArg val)
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{
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TCGOpcode new_op = op_to_movi(op->opc);
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tcg_target_ulong mask;
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op->opc = new_op;
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reset_temp(dst);
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2015-07-27 13:41:44 +03:00
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temps[dst].is_const = true;
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2015-06-05 12:19:18 +03:00
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temps[dst].val = val;
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mask = val;
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2015-07-10 19:03:30 +03:00
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if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_movi_i32) {
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2015-06-05 12:19:18 +03:00
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/* High bits of the destination are now garbage. */
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mask |= ~0xffffffffull;
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}
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temps[dst].mask = mask;
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args[0] = dst;
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args[1] = val;
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}
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2014-09-20 00:49:15 +04:00
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static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg *args,
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2015-06-04 22:53:24 +03:00
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TCGArg dst, TCGArg src)
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2011-07-07 16:37:13 +04:00
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{
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2015-06-04 22:53:25 +03:00
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if (temps_are_copies(dst, src)) {
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tcg_op_remove(s, op);
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return;
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}
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2015-06-04 22:53:24 +03:00
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TCGOpcode new_op = op_to_mov(op->opc);
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2014-05-22 22:14:10 +04:00
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tcg_target_ulong mask;
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2014-05-22 21:59:12 +04:00
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2014-09-20 00:49:15 +04:00
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op->opc = new_op;
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2014-05-22 21:59:12 +04:00
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2013-01-12 03:42:52 +04:00
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reset_temp(dst);
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2014-05-22 22:14:10 +04:00
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mask = temps[src].mask;
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if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) {
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/* High bits of the destination are now garbage. */
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mask |= ~0xffffffffull;
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}
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temps[dst].mask = mask;
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2013-01-12 03:42:52 +04:00
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if (s->temps[src].type == s->temps[dst].type) {
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temps[dst].next_copy = temps[src].next_copy;
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temps[dst].prev_copy = src;
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temps[temps[dst].next_copy].prev_copy = dst;
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temps[src].next_copy = dst;
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tcg/optimize: allow constant to have copies
Now that copies and constants are tracked separately, we can allow
constant to have copies, deferring the choice to use a register or a
constant to the register allocation pass. This prevent this kind of
regular constant reloading:
-OUT: [size=338]
+OUT: [size=298]
mov -0x4(%r14),%ebp
test %ebp,%ebp
jne 0x7ffbe9cb0ed6
mov $0x40002219f8,%rbp
mov %rbp,(%r14)
- mov $0x40002219f8,%rbp
mov $0x4000221a20,%rbx
mov %rbp,(%rbx)
mov $0x4000000000,%rbp
mov %rbp,(%r14)
- mov $0x4000000000,%rbp
mov $0x4000221d38,%rbx
mov %rbp,(%rbx)
mov $0x40002221a8,%rbp
mov %rbp,(%r14)
- mov $0x40002221a8,%rbp
mov $0x4000221d40,%rbx
mov %rbp,(%rbx)
mov $0x4000019170,%rbp
mov %rbp,(%r14)
- mov $0x4000019170,%rbp
mov $0x4000221d48,%rbx
mov %rbp,(%rbx)
mov $0x40000049ee,%rbp
mov %rbp,0x80(%r14)
mov %r14,%rdi
callq 0x7ffbe99924d0
mov $0x4000001680,%rbp
mov %rbp,0x30(%r14)
mov 0x10(%r14),%rbp
mov $0x4000001680,%rbp
mov %rbp,0x30(%r14)
mov 0x10(%r14),%rbp
shl $0x20,%rbp
mov (%r14),%rbx
mov %ebx,%ebx
mov %rbx,(%r14)
or %rbx,%rbp
mov %rbp,0x10(%r14)
mov %rbp,0x90(%r14)
mov 0x60(%r14),%rbx
mov %rbx,0x38(%r14)
mov 0x28(%r14),%rbx
mov $0x4000220e60,%r12
mov %rbx,(%r12)
mov $0x40002219c8,%rbx
mov %rbp,(%rbx)
mov 0x20(%r14),%rbp
sub $0x8,%rbp
mov $0x4000004a16,%rbx
mov %rbx,0x0(%rbp)
mov %rbp,0x20(%r14)
mov $0x19,%ebp
mov %ebp,0xa8(%r14)
mov $0x4000015110,%rbp
mov %rbp,0x80(%r14)
xor %eax,%eax
jmpq 0x7ffbebcae426
lea -0x5f6d72a(%rip),%rax # 0x7ffbe3d437b3
jmpq 0x7ffbebcae426
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-07-27 13:41:44 +03:00
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temps[dst].is_const = temps[src].is_const;
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temps[dst].val = temps[src].val;
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2013-01-12 03:42:52 +04:00
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}
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2012-09-11 14:31:21 +04:00
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2014-09-20 00:49:15 +04:00
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args[0] = dst;
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args[1] = src;
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2011-07-07 16:37:13 +04:00
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}
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2011-07-30 23:18:32 +04:00
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static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y)
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2011-07-07 16:37:14 +04:00
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{
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2013-08-15 01:35:56 +04:00
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uint64_t l64, h64;
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2011-07-07 16:37:14 +04:00
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switch (op) {
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CASE_OP_32_64(add):
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return x + y;
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CASE_OP_32_64(sub):
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return x - y;
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CASE_OP_32_64(mul):
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return x * y;
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2011-07-07 16:37:15 +04:00
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CASE_OP_32_64(and):
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return x & y;
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CASE_OP_32_64(or):
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return x | y;
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CASE_OP_32_64(xor):
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return x ^ y;
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2011-07-07 16:37:16 +04:00
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case INDEX_op_shl_i32:
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2014-03-18 18:45:39 +04:00
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return (uint32_t)x << (y & 31);
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2011-07-07 16:37:16 +04:00
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case INDEX_op_shl_i64:
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2014-03-18 18:45:39 +04:00
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return (uint64_t)x << (y & 63);
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2011-07-07 16:37:16 +04:00
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case INDEX_op_shr_i32:
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2014-03-18 18:45:39 +04:00
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return (uint32_t)x >> (y & 31);
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2011-07-07 16:37:16 +04:00
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case INDEX_op_shr_i64:
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2014-03-18 18:45:39 +04:00
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return (uint64_t)x >> (y & 63);
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2011-07-07 16:37:16 +04:00
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case INDEX_op_sar_i32:
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2014-03-18 18:45:39 +04:00
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return (int32_t)x >> (y & 31);
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2011-07-07 16:37:16 +04:00
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case INDEX_op_sar_i64:
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2014-03-18 18:45:39 +04:00
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return (int64_t)x >> (y & 63);
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2011-07-07 16:37:16 +04:00
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case INDEX_op_rotr_i32:
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2014-03-18 18:45:39 +04:00
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return ror32(x, y & 31);
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2011-07-07 16:37:16 +04:00
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case INDEX_op_rotr_i64:
|
2014-03-18 18:45:39 +04:00
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return ror64(x, y & 63);
|
2011-07-07 16:37:16 +04:00
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case INDEX_op_rotl_i32:
|
2014-03-18 18:45:39 +04:00
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|
return rol32(x, y & 31);
|
2011-07-07 16:37:16 +04:00
|
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case INDEX_op_rotl_i64:
|
2014-03-18 18:45:39 +04:00
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|
return rol64(x, y & 63);
|
2011-08-18 01:11:46 +04:00
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|
|
CASE_OP_32_64(not):
|
2011-07-07 16:37:17 +04:00
|
|
|
return ~x;
|
2011-08-18 01:11:46 +04:00
|
|
|
|
2011-08-18 01:11:47 +04:00
|
|
|
CASE_OP_32_64(neg):
|
|
|
|
return -x;
|
|
|
|
|
|
|
|
CASE_OP_32_64(andc):
|
|
|
|
return x & ~y;
|
|
|
|
|
|
|
|
CASE_OP_32_64(orc):
|
|
|
|
return x | ~y;
|
|
|
|
|
|
|
|
CASE_OP_32_64(eqv):
|
|
|
|
return ~(x ^ y);
|
|
|
|
|
|
|
|
CASE_OP_32_64(nand):
|
|
|
|
return ~(x & y);
|
|
|
|
|
|
|
|
CASE_OP_32_64(nor):
|
|
|
|
return ~(x | y);
|
|
|
|
|
2011-08-18 01:11:46 +04:00
|
|
|
CASE_OP_32_64(ext8s):
|
2011-07-07 16:37:17 +04:00
|
|
|
return (int8_t)x;
|
2011-08-18 01:11:46 +04:00
|
|
|
|
|
|
|
CASE_OP_32_64(ext16s):
|
2011-07-07 16:37:17 +04:00
|
|
|
return (int16_t)x;
|
2011-08-18 01:11:46 +04:00
|
|
|
|
|
|
|
CASE_OP_32_64(ext8u):
|
2011-07-07 16:37:17 +04:00
|
|
|
return (uint8_t)x;
|
2011-08-18 01:11:46 +04:00
|
|
|
|
|
|
|
CASE_OP_32_64(ext16u):
|
2011-07-07 16:37:17 +04:00
|
|
|
return (uint16_t)x;
|
|
|
|
|
2015-07-27 13:41:45 +03:00
|
|
|
case INDEX_op_ext_i32_i64:
|
2011-07-07 16:37:17 +04:00
|
|
|
case INDEX_op_ext32s_i64:
|
|
|
|
return (int32_t)x;
|
|
|
|
|
2015-07-27 13:41:45 +03:00
|
|
|
case INDEX_op_extu_i32_i64:
|
2015-07-24 17:16:00 +03:00
|
|
|
case INDEX_op_extrl_i64_i32:
|
2011-07-07 16:37:17 +04:00
|
|
|
case INDEX_op_ext32u_i64:
|
|
|
|
return (uint32_t)x;
|
|
|
|
|
2015-07-24 17:16:00 +03:00
|
|
|
case INDEX_op_extrh_i64_i32:
|
|
|
|
return (uint64_t)x >> 32;
|
|
|
|
|
2013-08-15 01:35:56 +04:00
|
|
|
case INDEX_op_muluh_i32:
|
|
|
|
return ((uint64_t)(uint32_t)x * (uint32_t)y) >> 32;
|
|
|
|
case INDEX_op_mulsh_i32:
|
|
|
|
return ((int64_t)(int32_t)x * (int32_t)y) >> 32;
|
|
|
|
|
|
|
|
case INDEX_op_muluh_i64:
|
|
|
|
mulu64(&l64, &h64, x, y);
|
|
|
|
return h64;
|
|
|
|
case INDEX_op_mulsh_i64:
|
|
|
|
muls64(&l64, &h64, x, y);
|
|
|
|
return h64;
|
|
|
|
|
2013-08-15 02:22:46 +04:00
|
|
|
case INDEX_op_div_i32:
|
|
|
|
/* Avoid crashing on divide by zero, otherwise undefined. */
|
|
|
|
return (int32_t)x / ((int32_t)y ? : 1);
|
|
|
|
case INDEX_op_divu_i32:
|
|
|
|
return (uint32_t)x / ((uint32_t)y ? : 1);
|
|
|
|
case INDEX_op_div_i64:
|
|
|
|
return (int64_t)x / ((int64_t)y ? : 1);
|
|
|
|
case INDEX_op_divu_i64:
|
|
|
|
return (uint64_t)x / ((uint64_t)y ? : 1);
|
|
|
|
|
|
|
|
case INDEX_op_rem_i32:
|
|
|
|
return (int32_t)x % ((int32_t)y ? : 1);
|
|
|
|
case INDEX_op_remu_i32:
|
|
|
|
return (uint32_t)x % ((uint32_t)y ? : 1);
|
|
|
|
case INDEX_op_rem_i64:
|
|
|
|
return (int64_t)x % ((int64_t)y ? : 1);
|
|
|
|
case INDEX_op_remu_i64:
|
|
|
|
return (uint64_t)x % ((uint64_t)y ? : 1);
|
|
|
|
|
2011-07-07 16:37:14 +04:00
|
|
|
default:
|
|
|
|
fprintf(stderr,
|
|
|
|
"Unrecognized operation %d in do_constant_folding.\n", op);
|
|
|
|
tcg_abort();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-07-30 23:18:32 +04:00
|
|
|
static TCGArg do_constant_folding(TCGOpcode op, TCGArg x, TCGArg y)
|
2011-07-07 16:37:14 +04:00
|
|
|
{
|
|
|
|
TCGArg res = do_constant_folding_2(op, x, y);
|
|
|
|
if (op_bits(op) == 32) {
|
tcg/optimize: fix constant signedness
By convention, on a 64-bit host TCG internally stores 32-bit constants
as sign-extended. This is not the case in the optimizer when a 32-bit
constant is folded.
This doesn't seem to have more consequences than suboptimal code
generation. For instance the x86 backend assumes sign-extended constants,
and in some rare cases uses a 32-bit unsigned immediate 0xffffffff
instead of a 8-bit signed immediate 0xff for the constant -1. This is
with a ppc guest:
before
------
---- 0x9f29cc
movi_i32 tmp1,$0xffffffff
movi_i32 tmp2,$0x0
add2_i32 tmp0,CA,CA,tmp2,r6,tmp2
add2_i32 tmp0,CA,tmp0,CA,tmp1,tmp2
mov_i32 r10,tmp0
0x7fd8c7dfe90c: xor %ebp,%ebp
0x7fd8c7dfe90e: mov %ebp,%r11d
0x7fd8c7dfe911: mov 0x18(%r14),%r9d
0x7fd8c7dfe915: add %r9d,%r10d
0x7fd8c7dfe918: adc %ebp,%r11d
0x7fd8c7dfe91b: add $0xffffffff,%r10d
0x7fd8c7dfe922: adc %ebp,%r11d
0x7fd8c7dfe925: mov %r11d,0x134(%r14)
0x7fd8c7dfe92c: mov %r10d,0x28(%r14)
after
-----
---- 0x9f29cc
movi_i32 tmp1,$0xffffffffffffffff
movi_i32 tmp2,$0x0
add2_i32 tmp0,CA,CA,tmp2,r6,tmp2
add2_i32 tmp0,CA,tmp0,CA,tmp1,tmp2
mov_i32 r10,tmp0
0x7f37010d490c: xor %ebp,%ebp
0x7f37010d490e: mov %ebp,%r11d
0x7f37010d4911: mov 0x18(%r14),%r9d
0x7f37010d4915: add %r9d,%r10d
0x7f37010d4918: adc %ebp,%r11d
0x7f37010d491b: add $0xffffffffffffffff,%r10d
0x7f37010d491f: adc %ebp,%r11d
0x7f37010d4922: mov %r11d,0x134(%r14)
0x7f37010d4929: mov %r10d,0x28(%r14)
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Message-Id: <1436544211-2769-2-git-send-email-aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-07-10 19:03:31 +03:00
|
|
|
res = (int32_t)res;
|
2011-07-07 16:37:14 +04:00
|
|
|
}
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
|
2012-10-02 22:32:26 +04:00
|
|
|
static bool do_constant_folding_cond_32(uint32_t x, uint32_t y, TCGCond c)
|
|
|
|
{
|
|
|
|
switch (c) {
|
|
|
|
case TCG_COND_EQ:
|
|
|
|
return x == y;
|
|
|
|
case TCG_COND_NE:
|
|
|
|
return x != y;
|
|
|
|
case TCG_COND_LT:
|
|
|
|
return (int32_t)x < (int32_t)y;
|
|
|
|
case TCG_COND_GE:
|
|
|
|
return (int32_t)x >= (int32_t)y;
|
|
|
|
case TCG_COND_LE:
|
|
|
|
return (int32_t)x <= (int32_t)y;
|
|
|
|
case TCG_COND_GT:
|
|
|
|
return (int32_t)x > (int32_t)y;
|
|
|
|
case TCG_COND_LTU:
|
|
|
|
return x < y;
|
|
|
|
case TCG_COND_GEU:
|
|
|
|
return x >= y;
|
|
|
|
case TCG_COND_LEU:
|
|
|
|
return x <= y;
|
|
|
|
case TCG_COND_GTU:
|
|
|
|
return x > y;
|
|
|
|
default:
|
|
|
|
tcg_abort();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool do_constant_folding_cond_64(uint64_t x, uint64_t y, TCGCond c)
|
|
|
|
{
|
|
|
|
switch (c) {
|
|
|
|
case TCG_COND_EQ:
|
|
|
|
return x == y;
|
|
|
|
case TCG_COND_NE:
|
|
|
|
return x != y;
|
|
|
|
case TCG_COND_LT:
|
|
|
|
return (int64_t)x < (int64_t)y;
|
|
|
|
case TCG_COND_GE:
|
|
|
|
return (int64_t)x >= (int64_t)y;
|
|
|
|
case TCG_COND_LE:
|
|
|
|
return (int64_t)x <= (int64_t)y;
|
|
|
|
case TCG_COND_GT:
|
|
|
|
return (int64_t)x > (int64_t)y;
|
|
|
|
case TCG_COND_LTU:
|
|
|
|
return x < y;
|
|
|
|
case TCG_COND_GEU:
|
|
|
|
return x >= y;
|
|
|
|
case TCG_COND_LEU:
|
|
|
|
return x <= y;
|
|
|
|
case TCG_COND_GTU:
|
|
|
|
return x > y;
|
|
|
|
default:
|
|
|
|
tcg_abort();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool do_constant_folding_cond_eq(TCGCond c)
|
|
|
|
{
|
|
|
|
switch (c) {
|
|
|
|
case TCG_COND_GT:
|
|
|
|
case TCG_COND_LTU:
|
|
|
|
case TCG_COND_LT:
|
|
|
|
case TCG_COND_GTU:
|
|
|
|
case TCG_COND_NE:
|
|
|
|
return 0;
|
|
|
|
case TCG_COND_GE:
|
|
|
|
case TCG_COND_GEU:
|
|
|
|
case TCG_COND_LE:
|
|
|
|
case TCG_COND_LEU:
|
|
|
|
case TCG_COND_EQ:
|
|
|
|
return 1;
|
|
|
|
default:
|
|
|
|
tcg_abort();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-09-18 21:37:00 +04:00
|
|
|
/* Return 2 if the condition can't be simplified, and the result
|
|
|
|
of the condition (0 or 1) if it can */
|
2012-09-06 18:47:14 +04:00
|
|
|
static TCGArg do_constant_folding_cond(TCGOpcode op, TCGArg x,
|
|
|
|
TCGArg y, TCGCond c)
|
|
|
|
{
|
2015-07-27 13:41:44 +03:00
|
|
|
if (temp_is_const(x) && temp_is_const(y)) {
|
2012-09-18 21:37:00 +04:00
|
|
|
switch (op_bits(op)) {
|
|
|
|
case 32:
|
2012-10-02 22:32:26 +04:00
|
|
|
return do_constant_folding_cond_32(temps[x].val, temps[y].val, c);
|
2012-09-18 21:37:00 +04:00
|
|
|
case 64:
|
2012-10-02 22:32:26 +04:00
|
|
|
return do_constant_folding_cond_64(temps[x].val, temps[y].val, c);
|
2012-09-25 01:21:40 +04:00
|
|
|
default:
|
2012-10-02 22:32:26 +04:00
|
|
|
tcg_abort();
|
2012-09-18 21:37:00 +04:00
|
|
|
}
|
2012-10-02 22:32:26 +04:00
|
|
|
} else if (temps_are_copies(x, y)) {
|
|
|
|
return do_constant_folding_cond_eq(c);
|
2015-07-27 13:41:44 +03:00
|
|
|
} else if (temp_is_const(y) && temps[y].val == 0) {
|
2012-09-18 21:37:00 +04:00
|
|
|
switch (c) {
|
2012-09-06 18:47:14 +04:00
|
|
|
case TCG_COND_LTU:
|
2012-09-18 21:37:00 +04:00
|
|
|
return 0;
|
2012-09-06 18:47:14 +04:00
|
|
|
case TCG_COND_GEU:
|
2012-09-18 21:37:00 +04:00
|
|
|
return 1;
|
|
|
|
default:
|
|
|
|
return 2;
|
2012-09-06 18:47:14 +04:00
|
|
|
}
|
2012-09-18 21:37:00 +04:00
|
|
|
} else {
|
|
|
|
return 2;
|
2012-09-06 18:47:14 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-10-02 22:32:27 +04:00
|
|
|
/* Return 2 if the condition can't be simplified, and the result
|
|
|
|
of the condition (0 or 1) if it can */
|
|
|
|
static TCGArg do_constant_folding_cond2(TCGArg *p1, TCGArg *p2, TCGCond c)
|
|
|
|
{
|
|
|
|
TCGArg al = p1[0], ah = p1[1];
|
|
|
|
TCGArg bl = p2[0], bh = p2[1];
|
|
|
|
|
2015-07-27 13:41:44 +03:00
|
|
|
if (temp_is_const(bl) && temp_is_const(bh)) {
|
2012-10-02 22:32:27 +04:00
|
|
|
uint64_t b = ((uint64_t)temps[bh].val << 32) | (uint32_t)temps[bl].val;
|
|
|
|
|
2015-07-27 13:41:44 +03:00
|
|
|
if (temp_is_const(al) && temp_is_const(ah)) {
|
2012-10-02 22:32:27 +04:00
|
|
|
uint64_t a;
|
|
|
|
a = ((uint64_t)temps[ah].val << 32) | (uint32_t)temps[al].val;
|
|
|
|
return do_constant_folding_cond_64(a, b, c);
|
|
|
|
}
|
|
|
|
if (b == 0) {
|
|
|
|
switch (c) {
|
|
|
|
case TCG_COND_LTU:
|
|
|
|
return 0;
|
|
|
|
case TCG_COND_GEU:
|
|
|
|
return 1;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (temps_are_copies(al, bl) && temps_are_copies(ah, bh)) {
|
|
|
|
return do_constant_folding_cond_eq(c);
|
|
|
|
}
|
|
|
|
return 2;
|
|
|
|
}
|
|
|
|
|
tcg: Split out swap_commutative as a subroutine
Reduces code duplication and prefers
movcond d, c1, c2, const, s
to
movcond d, c1, c2, s, const
It also prefers
add r, r, c
over
add r, c, r
when both inputs are known constants. This doesn't matter for true add, as
we will fully constant fold that. But it matters for a follow-on patch using
this routine for add2 which may not be fully foldable.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-02 22:32:21 +04:00
|
|
|
static bool swap_commutative(TCGArg dest, TCGArg *p1, TCGArg *p2)
|
|
|
|
{
|
|
|
|
TCGArg a1 = *p1, a2 = *p2;
|
|
|
|
int sum = 0;
|
2015-07-27 13:41:44 +03:00
|
|
|
sum += temp_is_const(a1);
|
|
|
|
sum -= temp_is_const(a2);
|
tcg: Split out swap_commutative as a subroutine
Reduces code duplication and prefers
movcond d, c1, c2, const, s
to
movcond d, c1, c2, s, const
It also prefers
add r, r, c
over
add r, c, r
when both inputs are known constants. This doesn't matter for true add, as
we will fully constant fold that. But it matters for a follow-on patch using
this routine for add2 which may not be fully foldable.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-02 22:32:21 +04:00
|
|
|
|
|
|
|
/* Prefer the constant in second argument, and then the form
|
|
|
|
op a, a, b, which is better handled on non-RISC hosts. */
|
|
|
|
if (sum > 0 || (sum == 0 && dest == a2)) {
|
|
|
|
*p1 = a2;
|
|
|
|
*p2 = a1;
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2012-10-02 22:32:23 +04:00
|
|
|
static bool swap_commutative2(TCGArg *p1, TCGArg *p2)
|
|
|
|
{
|
|
|
|
int sum = 0;
|
2015-07-27 13:41:44 +03:00
|
|
|
sum += temp_is_const(p1[0]);
|
|
|
|
sum += temp_is_const(p1[1]);
|
|
|
|
sum -= temp_is_const(p2[0]);
|
|
|
|
sum -= temp_is_const(p2[1]);
|
2012-10-02 22:32:23 +04:00
|
|
|
if (sum > 0) {
|
|
|
|
TCGArg t;
|
|
|
|
t = p1[0], p1[0] = p2[0], p2[0] = t;
|
|
|
|
t = p1[1], p1[1] = p2[1], p2[1] = t;
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2011-07-07 16:37:13 +04:00
|
|
|
/* Propagate constants and copies, fold constant expressions. */
|
2015-06-04 22:53:27 +03:00
|
|
|
void tcg_optimize(TCGContext *s)
|
2011-07-07 16:37:12 +04:00
|
|
|
{
|
2014-09-20 00:49:15 +04:00
|
|
|
int oi, oi_next, nb_temps, nb_globals;
|
2016-08-23 16:48:25 +03:00
|
|
|
TCGArg *prev_mb_args = NULL;
|
2012-09-21 21:13:38 +04:00
|
|
|
|
2011-07-07 16:37:13 +04:00
|
|
|
/* Array VALS has an element for each temp.
|
|
|
|
If this temp holds a constant then its value is kept in VALS' element.
|
2012-09-11 14:31:21 +04:00
|
|
|
If this temp is a copy of other ones then the other copies are
|
|
|
|
available through the doubly linked circular list. */
|
2011-07-07 16:37:12 +04:00
|
|
|
|
|
|
|
nb_temps = s->nb_temps;
|
|
|
|
nb_globals = s->nb_globals;
|
2013-01-12 03:42:51 +04:00
|
|
|
reset_all_temps(nb_temps);
|
2011-07-07 16:37:12 +04:00
|
|
|
|
2016-06-23 05:42:31 +03:00
|
|
|
for (oi = s->gen_op_buf[0].next; oi != 0; oi = oi_next) {
|
2014-05-22 22:14:10 +04:00
|
|
|
tcg_target_ulong mask, partmask, affected;
|
2014-09-20 00:49:15 +04:00
|
|
|
int nb_oargs, nb_iargs, i;
|
2014-03-23 07:06:52 +04:00
|
|
|
TCGArg tmp;
|
|
|
|
|
2014-09-20 00:49:15 +04:00
|
|
|
TCGOp * const op = &s->gen_op_buf[oi];
|
|
|
|
TCGArg * const args = &s->gen_opparam_buf[op->args];
|
|
|
|
TCGOpcode opc = op->opc;
|
|
|
|
const TCGOpDef *def = &tcg_op_defs[opc];
|
|
|
|
|
|
|
|
oi_next = op->next;
|
2015-07-27 13:41:44 +03:00
|
|
|
|
|
|
|
/* Count the arguments, and initialize the temps that are
|
|
|
|
going to be used */
|
2014-09-20 00:49:15 +04:00
|
|
|
if (opc == INDEX_op_call) {
|
|
|
|
nb_oargs = op->callo;
|
|
|
|
nb_iargs = op->calli;
|
2015-07-27 13:41:44 +03:00
|
|
|
for (i = 0; i < nb_oargs + nb_iargs; i++) {
|
|
|
|
tmp = args[i];
|
|
|
|
if (tmp != TCG_CALL_DUMMY_ARG) {
|
|
|
|
init_temp_info(tmp);
|
|
|
|
}
|
|
|
|
}
|
2012-09-11 18:18:49 +04:00
|
|
|
} else {
|
2014-03-23 07:06:52 +04:00
|
|
|
nb_oargs = def->nb_oargs;
|
|
|
|
nb_iargs = def->nb_iargs;
|
2015-07-27 13:41:44 +03:00
|
|
|
for (i = 0; i < nb_oargs + nb_iargs; i++) {
|
|
|
|
init_temp_info(args[i]);
|
|
|
|
}
|
2014-03-23 07:06:52 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Do copy propagation */
|
|
|
|
for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
|
2015-07-27 13:41:44 +03:00
|
|
|
if (temp_is_copy(args[i])) {
|
2014-03-23 07:06:52 +04:00
|
|
|
args[i] = find_better_copy(s, args[i]);
|
2011-07-07 16:37:13 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-07-07 16:37:14 +04:00
|
|
|
/* For commutative operations make constant second argument */
|
2014-09-20 00:49:15 +04:00
|
|
|
switch (opc) {
|
2011-07-07 16:37:14 +04:00
|
|
|
CASE_OP_32_64(add):
|
|
|
|
CASE_OP_32_64(mul):
|
2011-07-07 16:37:15 +04:00
|
|
|
CASE_OP_32_64(and):
|
|
|
|
CASE_OP_32_64(or):
|
|
|
|
CASE_OP_32_64(xor):
|
2011-08-18 01:11:47 +04:00
|
|
|
CASE_OP_32_64(eqv):
|
|
|
|
CASE_OP_32_64(nand):
|
|
|
|
CASE_OP_32_64(nor):
|
2013-08-15 01:35:56 +04:00
|
|
|
CASE_OP_32_64(muluh):
|
|
|
|
CASE_OP_32_64(mulsh):
|
tcg: Split out swap_commutative as a subroutine
Reduces code duplication and prefers
movcond d, c1, c2, const, s
to
movcond d, c1, c2, s, const
It also prefers
add r, r, c
over
add r, c, r
when both inputs are known constants. This doesn't matter for true add, as
we will fully constant fold that. But it matters for a follow-on patch using
this routine for add2 which may not be fully foldable.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-02 22:32:21 +04:00
|
|
|
swap_commutative(args[0], &args[1], &args[2]);
|
2011-07-07 16:37:14 +04:00
|
|
|
break;
|
2012-09-06 18:47:14 +04:00
|
|
|
CASE_OP_32_64(brcond):
|
tcg: Split out swap_commutative as a subroutine
Reduces code duplication and prefers
movcond d, c1, c2, const, s
to
movcond d, c1, c2, s, const
It also prefers
add r, r, c
over
add r, c, r
when both inputs are known constants. This doesn't matter for true add, as
we will fully constant fold that. But it matters for a follow-on patch using
this routine for add2 which may not be fully foldable.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-02 22:32:21 +04:00
|
|
|
if (swap_commutative(-1, &args[0], &args[1])) {
|
2012-09-06 18:47:14 +04:00
|
|
|
args[2] = tcg_swap_cond(args[2]);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
CASE_OP_32_64(setcond):
|
tcg: Split out swap_commutative as a subroutine
Reduces code duplication and prefers
movcond d, c1, c2, const, s
to
movcond d, c1, c2, s, const
It also prefers
add r, r, c
over
add r, c, r
when both inputs are known constants. This doesn't matter for true add, as
we will fully constant fold that. But it matters for a follow-on patch using
this routine for add2 which may not be fully foldable.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-02 22:32:21 +04:00
|
|
|
if (swap_commutative(args[0], &args[1], &args[2])) {
|
2012-09-06 18:47:14 +04:00
|
|
|
args[3] = tcg_swap_cond(args[3]);
|
|
|
|
}
|
|
|
|
break;
|
2012-09-21 21:13:37 +04:00
|
|
|
CASE_OP_32_64(movcond):
|
tcg: Split out swap_commutative as a subroutine
Reduces code duplication and prefers
movcond d, c1, c2, const, s
to
movcond d, c1, c2, s, const
It also prefers
add r, r, c
over
add r, c, r
when both inputs are known constants. This doesn't matter for true add, as
we will fully constant fold that. But it matters for a follow-on patch using
this routine for add2 which may not be fully foldable.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-02 22:32:21 +04:00
|
|
|
if (swap_commutative(-1, &args[1], &args[2])) {
|
|
|
|
args[5] = tcg_swap_cond(args[5]);
|
2012-09-21 21:13:38 +04:00
|
|
|
}
|
|
|
|
/* For movcond, we canonicalize the "false" input reg to match
|
|
|
|
the destination reg so that the tcg backend can implement
|
|
|
|
a "move if true" operation. */
|
tcg: Split out swap_commutative as a subroutine
Reduces code duplication and prefers
movcond d, c1, c2, const, s
to
movcond d, c1, c2, s, const
It also prefers
add r, r, c
over
add r, c, r
when both inputs are known constants. This doesn't matter for true add, as
we will fully constant fold that. But it matters for a follow-on patch using
this routine for add2 which may not be fully foldable.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-02 22:32:21 +04:00
|
|
|
if (swap_commutative(args[0], &args[4], &args[3])) {
|
|
|
|
args[5] = tcg_invert_cond(args[5]);
|
2012-09-21 21:13:37 +04:00
|
|
|
}
|
2012-10-02 22:32:22 +04:00
|
|
|
break;
|
2013-02-20 11:51:52 +04:00
|
|
|
CASE_OP_32_64(add2):
|
2012-10-02 22:32:22 +04:00
|
|
|
swap_commutative(args[0], &args[2], &args[4]);
|
|
|
|
swap_commutative(args[1], &args[3], &args[5]);
|
|
|
|
break;
|
2013-02-20 11:51:52 +04:00
|
|
|
CASE_OP_32_64(mulu2):
|
2013-02-20 11:51:53 +04:00
|
|
|
CASE_OP_32_64(muls2):
|
2012-10-02 22:32:30 +04:00
|
|
|
swap_commutative(args[0], &args[2], &args[3]);
|
|
|
|
break;
|
2012-10-02 22:32:23 +04:00
|
|
|
case INDEX_op_brcond2_i32:
|
|
|
|
if (swap_commutative2(&args[0], &args[2])) {
|
|
|
|
args[4] = tcg_swap_cond(args[4]);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case INDEX_op_setcond2_i32:
|
|
|
|
if (swap_commutative2(&args[1], &args[3])) {
|
|
|
|
args[5] = tcg_swap_cond(args[5]);
|
|
|
|
}
|
|
|
|
break;
|
2011-07-07 16:37:14 +04:00
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2013-03-21 20:13:33 +04:00
|
|
|
/* Simplify expressions for "shift/rot r, 0, a => movi r, 0",
|
|
|
|
and "sub r, 0, a => neg r, a" case. */
|
2014-09-20 00:49:15 +04:00
|
|
|
switch (opc) {
|
2012-09-06 18:47:14 +04:00
|
|
|
CASE_OP_32_64(shl):
|
|
|
|
CASE_OP_32_64(shr):
|
|
|
|
CASE_OP_32_64(sar):
|
|
|
|
CASE_OP_32_64(rotl):
|
|
|
|
CASE_OP_32_64(rotr):
|
2015-07-27 13:41:44 +03:00
|
|
|
if (temp_is_const(args[1]) && temps[args[1]].val == 0) {
|
2015-06-04 22:53:23 +03:00
|
|
|
tcg_opt_gen_movi(s, op, args, args[0], 0);
|
2012-09-06 18:47:14 +04:00
|
|
|
continue;
|
|
|
|
}
|
|
|
|
break;
|
2013-03-21 20:13:33 +04:00
|
|
|
CASE_OP_32_64(sub):
|
|
|
|
{
|
|
|
|
TCGOpcode neg_op;
|
|
|
|
bool have_neg;
|
|
|
|
|
2015-07-27 13:41:44 +03:00
|
|
|
if (temp_is_const(args[2])) {
|
2013-03-21 20:13:33 +04:00
|
|
|
/* Proceed with possible constant folding. */
|
|
|
|
break;
|
|
|
|
}
|
2014-09-20 00:49:15 +04:00
|
|
|
if (opc == INDEX_op_sub_i32) {
|
2013-03-21 20:13:33 +04:00
|
|
|
neg_op = INDEX_op_neg_i32;
|
|
|
|
have_neg = TCG_TARGET_HAS_neg_i32;
|
|
|
|
} else {
|
|
|
|
neg_op = INDEX_op_neg_i64;
|
|
|
|
have_neg = TCG_TARGET_HAS_neg_i64;
|
|
|
|
}
|
|
|
|
if (!have_neg) {
|
|
|
|
break;
|
|
|
|
}
|
2015-07-27 13:41:44 +03:00
|
|
|
if (temp_is_const(args[1]) && temps[args[1]].val == 0) {
|
2014-09-20 00:49:15 +04:00
|
|
|
op->opc = neg_op;
|
2013-03-21 20:13:33 +04:00
|
|
|
reset_temp(args[0]);
|
2014-09-20 00:49:15 +04:00
|
|
|
args[1] = args[2];
|
2013-03-21 20:13:33 +04:00
|
|
|
continue;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
2014-01-29 01:15:38 +04:00
|
|
|
CASE_OP_32_64(xor):
|
|
|
|
CASE_OP_32_64(nand):
|
2015-07-27 13:41:44 +03:00
|
|
|
if (!temp_is_const(args[1])
|
|
|
|
&& temp_is_const(args[2]) && temps[args[2]].val == -1) {
|
2014-01-29 01:15:38 +04:00
|
|
|
i = 1;
|
|
|
|
goto try_not;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
CASE_OP_32_64(nor):
|
2015-07-27 13:41:44 +03:00
|
|
|
if (!temp_is_const(args[1])
|
|
|
|
&& temp_is_const(args[2]) && temps[args[2]].val == 0) {
|
2014-01-29 01:15:38 +04:00
|
|
|
i = 1;
|
|
|
|
goto try_not;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
CASE_OP_32_64(andc):
|
2015-07-27 13:41:44 +03:00
|
|
|
if (!temp_is_const(args[2])
|
|
|
|
&& temp_is_const(args[1]) && temps[args[1]].val == -1) {
|
2014-01-29 01:15:38 +04:00
|
|
|
i = 2;
|
|
|
|
goto try_not;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
CASE_OP_32_64(orc):
|
|
|
|
CASE_OP_32_64(eqv):
|
2015-07-27 13:41:44 +03:00
|
|
|
if (!temp_is_const(args[2])
|
|
|
|
&& temp_is_const(args[1]) && temps[args[1]].val == 0) {
|
2014-01-29 01:15:38 +04:00
|
|
|
i = 2;
|
|
|
|
goto try_not;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
try_not:
|
|
|
|
{
|
|
|
|
TCGOpcode not_op;
|
|
|
|
bool have_not;
|
|
|
|
|
|
|
|
if (def->flags & TCG_OPF_64BIT) {
|
|
|
|
not_op = INDEX_op_not_i64;
|
|
|
|
have_not = TCG_TARGET_HAS_not_i64;
|
|
|
|
} else {
|
|
|
|
not_op = INDEX_op_not_i32;
|
|
|
|
have_not = TCG_TARGET_HAS_not_i32;
|
|
|
|
}
|
|
|
|
if (!have_not) {
|
|
|
|
break;
|
|
|
|
}
|
2014-09-20 00:49:15 +04:00
|
|
|
op->opc = not_op;
|
2014-01-29 01:15:38 +04:00
|
|
|
reset_temp(args[0]);
|
2014-09-20 00:49:15 +04:00
|
|
|
args[1] = args[i];
|
2014-01-29 01:15:38 +04:00
|
|
|
continue;
|
|
|
|
}
|
2012-09-06 18:47:14 +04:00
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2014-01-31 17:42:11 +04:00
|
|
|
/* Simplify expression for "op r, a, const => mov r, a" cases */
|
2014-09-20 00:49:15 +04:00
|
|
|
switch (opc) {
|
2011-07-07 16:37:14 +04:00
|
|
|
CASE_OP_32_64(add):
|
|
|
|
CASE_OP_32_64(sub):
|
2011-07-07 16:37:16 +04:00
|
|
|
CASE_OP_32_64(shl):
|
|
|
|
CASE_OP_32_64(shr):
|
|
|
|
CASE_OP_32_64(sar):
|
2011-08-18 01:11:46 +04:00
|
|
|
CASE_OP_32_64(rotl):
|
|
|
|
CASE_OP_32_64(rotr):
|
2012-09-06 18:47:14 +04:00
|
|
|
CASE_OP_32_64(or):
|
|
|
|
CASE_OP_32_64(xor):
|
2014-01-31 17:42:11 +04:00
|
|
|
CASE_OP_32_64(andc):
|
2015-07-27 13:41:44 +03:00
|
|
|
if (!temp_is_const(args[1])
|
|
|
|
&& temp_is_const(args[2]) && temps[args[2]].val == 0) {
|
2015-06-05 12:19:18 +03:00
|
|
|
tcg_opt_gen_mov(s, op, args, args[0], args[1]);
|
|
|
|
continue;
|
2011-07-07 16:37:14 +04:00
|
|
|
}
|
|
|
|
break;
|
2014-01-31 17:42:11 +04:00
|
|
|
CASE_OP_32_64(and):
|
|
|
|
CASE_OP_32_64(orc):
|
|
|
|
CASE_OP_32_64(eqv):
|
2015-07-27 13:41:44 +03:00
|
|
|
if (!temp_is_const(args[1])
|
|
|
|
&& temp_is_const(args[2]) && temps[args[2]].val == -1) {
|
2015-06-05 12:19:18 +03:00
|
|
|
tcg_opt_gen_mov(s, op, args, args[0], args[1]);
|
|
|
|
continue;
|
2014-01-31 17:42:11 +04:00
|
|
|
}
|
|
|
|
break;
|
2012-09-06 18:47:13 +04:00
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2013-09-03 10:27:38 +04:00
|
|
|
/* Simplify using known-zero bits. Currently only ops with a single
|
|
|
|
output argument is supported. */
|
2013-01-12 03:42:52 +04:00
|
|
|
mask = -1;
|
optimize: optimize using nonzero bits
This adds two optimizations using the non-zero bit mask. In some cases
involving shifts or ANDs the value can become zero, and can thus be
optimized to a move of zero. Second, useless zero-extension or an
AND with constant can be detected that would only zero bits that are
already zero.
The main advantage of this optimization is that it turns zero-extensions
into moves, thus enabling much better copy propagation (around 1% code
reduction). Here is for example a "test $0xff0000,%ecx + je" before
optimization:
mov_i64 tmp0,rcx
movi_i64 tmp1,$0xff0000
discard cc_src
and_i64 cc_dst,tmp0,tmp1
movi_i32 cc_op,$0x1c
ext32u_i64 tmp0,cc_dst
movi_i64 tmp12,$0x0
brcond_i64 tmp0,tmp12,eq,$0x0
and after (without patch on the left, with on the right):
movi_i64 tmp1,$0xff0000 movi_i64 tmp1,$0xff0000
discard cc_src discard cc_src
and_i64 cc_dst,rcx,tmp1 and_i64 cc_dst,rcx,tmp1
movi_i32 cc_op,$0x1c movi_i32 cc_op,$0x1c
ext32u_i64 tmp0,cc_dst
movi_i64 tmp12,$0x0 movi_i64 tmp12,$0x0
brcond_i64 tmp0,tmp12,eq,$0x0 brcond_i64 cc_dst,tmp12,eq,$0x0
Other similar cases: "test %eax, %eax + jne" where eax is already 32-bit
(after optimization, without patch on the left, with on the right):
discard cc_src discard cc_src
mov_i64 cc_dst,rax mov_i64 cc_dst,rax
movi_i32 cc_op,$0x1c movi_i32 cc_op,$0x1c
ext32u_i64 tmp0,cc_dst
movi_i64 tmp12,$0x0 movi_i64 tmp12,$0x0
brcond_i64 tmp0,tmp12,ne,$0x0 brcond_i64 rax,tmp12,ne,$0x0
"test $0x1, %dl + je":
movi_i64 tmp1,$0x1 movi_i64 tmp1,$0x1
discard cc_src discard cc_src
and_i64 cc_dst,rdx,tmp1 and_i64 cc_dst,rdx,tmp1
movi_i32 cc_op,$0x1a movi_i32 cc_op,$0x1a
ext8u_i64 tmp0,cc_dst
movi_i64 tmp12,$0x0 movi_i64 tmp12,$0x0
brcond_i64 tmp0,tmp12,eq,$0x0 brcond_i64 cc_dst,tmp12,eq,$0x0
In some cases TCG even outsmarts GCC. :) Here the input code has
"and $0x2,%eax + movslq %eax,%rbx + test %rbx, %rbx" and the optimizer,
thanks to copy propagation, does the following:
movi_i64 tmp12,$0x2 movi_i64 tmp12,$0x2
and_i64 rax,rax,tmp12 and_i64 rax,rax,tmp12
mov_i64 cc_dst,rax mov_i64 cc_dst,rax
ext32s_i64 tmp0,rax -> nop
mov_i64 rbx,tmp0 -> mov_i64 rbx,cc_dst
and_i64 cc_dst,rbx,rbx -> nop
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-01-12 03:42:53 +04:00
|
|
|
affected = -1;
|
2014-09-20 00:49:15 +04:00
|
|
|
switch (opc) {
|
2013-01-12 03:42:52 +04:00
|
|
|
CASE_OP_32_64(ext8s):
|
|
|
|
if ((temps[args[1]].mask & 0x80) != 0) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
CASE_OP_32_64(ext8u):
|
|
|
|
mask = 0xff;
|
|
|
|
goto and_const;
|
|
|
|
CASE_OP_32_64(ext16s):
|
|
|
|
if ((temps[args[1]].mask & 0x8000) != 0) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
CASE_OP_32_64(ext16u):
|
|
|
|
mask = 0xffff;
|
|
|
|
goto and_const;
|
|
|
|
case INDEX_op_ext32s_i64:
|
|
|
|
if ((temps[args[1]].mask & 0x80000000) != 0) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case INDEX_op_ext32u_i64:
|
|
|
|
mask = 0xffffffffU;
|
|
|
|
goto and_const;
|
|
|
|
|
|
|
|
CASE_OP_32_64(and):
|
|
|
|
mask = temps[args[2]].mask;
|
2015-07-27 13:41:44 +03:00
|
|
|
if (temp_is_const(args[2])) {
|
2013-01-12 03:42:52 +04:00
|
|
|
and_const:
|
optimize: optimize using nonzero bits
This adds two optimizations using the non-zero bit mask. In some cases
involving shifts or ANDs the value can become zero, and can thus be
optimized to a move of zero. Second, useless zero-extension or an
AND with constant can be detected that would only zero bits that are
already zero.
The main advantage of this optimization is that it turns zero-extensions
into moves, thus enabling much better copy propagation (around 1% code
reduction). Here is for example a "test $0xff0000,%ecx + je" before
optimization:
mov_i64 tmp0,rcx
movi_i64 tmp1,$0xff0000
discard cc_src
and_i64 cc_dst,tmp0,tmp1
movi_i32 cc_op,$0x1c
ext32u_i64 tmp0,cc_dst
movi_i64 tmp12,$0x0
brcond_i64 tmp0,tmp12,eq,$0x0
and after (without patch on the left, with on the right):
movi_i64 tmp1,$0xff0000 movi_i64 tmp1,$0xff0000
discard cc_src discard cc_src
and_i64 cc_dst,rcx,tmp1 and_i64 cc_dst,rcx,tmp1
movi_i32 cc_op,$0x1c movi_i32 cc_op,$0x1c
ext32u_i64 tmp0,cc_dst
movi_i64 tmp12,$0x0 movi_i64 tmp12,$0x0
brcond_i64 tmp0,tmp12,eq,$0x0 brcond_i64 cc_dst,tmp12,eq,$0x0
Other similar cases: "test %eax, %eax + jne" where eax is already 32-bit
(after optimization, without patch on the left, with on the right):
discard cc_src discard cc_src
mov_i64 cc_dst,rax mov_i64 cc_dst,rax
movi_i32 cc_op,$0x1c movi_i32 cc_op,$0x1c
ext32u_i64 tmp0,cc_dst
movi_i64 tmp12,$0x0 movi_i64 tmp12,$0x0
brcond_i64 tmp0,tmp12,ne,$0x0 brcond_i64 rax,tmp12,ne,$0x0
"test $0x1, %dl + je":
movi_i64 tmp1,$0x1 movi_i64 tmp1,$0x1
discard cc_src discard cc_src
and_i64 cc_dst,rdx,tmp1 and_i64 cc_dst,rdx,tmp1
movi_i32 cc_op,$0x1a movi_i32 cc_op,$0x1a
ext8u_i64 tmp0,cc_dst
movi_i64 tmp12,$0x0 movi_i64 tmp12,$0x0
brcond_i64 tmp0,tmp12,eq,$0x0 brcond_i64 cc_dst,tmp12,eq,$0x0
In some cases TCG even outsmarts GCC. :) Here the input code has
"and $0x2,%eax + movslq %eax,%rbx + test %rbx, %rbx" and the optimizer,
thanks to copy propagation, does the following:
movi_i64 tmp12,$0x2 movi_i64 tmp12,$0x2
and_i64 rax,rax,tmp12 and_i64 rax,rax,tmp12
mov_i64 cc_dst,rax mov_i64 cc_dst,rax
ext32s_i64 tmp0,rax -> nop
mov_i64 rbx,tmp0 -> mov_i64 rbx,cc_dst
and_i64 cc_dst,rbx,rbx -> nop
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-01-12 03:42:53 +04:00
|
|
|
affected = temps[args[1]].mask & ~mask;
|
2013-01-12 03:42:52 +04:00
|
|
|
}
|
|
|
|
mask = temps[args[1]].mask & mask;
|
|
|
|
break;
|
|
|
|
|
2015-07-27 13:41:45 +03:00
|
|
|
case INDEX_op_ext_i32_i64:
|
|
|
|
if ((temps[args[1]].mask & 0x80000000) != 0) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case INDEX_op_extu_i32_i64:
|
|
|
|
/* We do not compute affected as it is a size changing op. */
|
|
|
|
mask = (uint32_t)temps[args[1]].mask;
|
|
|
|
break;
|
|
|
|
|
2014-01-29 00:03:24 +04:00
|
|
|
CASE_OP_32_64(andc):
|
|
|
|
/* Known-zeros does not imply known-ones. Therefore unless
|
|
|
|
args[2] is constant, we can't infer anything from it. */
|
2015-07-27 13:41:44 +03:00
|
|
|
if (temp_is_const(args[2])) {
|
2014-01-29 00:03:24 +04:00
|
|
|
mask = ~temps[args[2]].mask;
|
|
|
|
goto and_const;
|
|
|
|
}
|
|
|
|
/* But we certainly know nothing outside args[1] may be set. */
|
|
|
|
mask = temps[args[1]].mask;
|
|
|
|
break;
|
|
|
|
|
2013-09-03 10:27:38 +04:00
|
|
|
case INDEX_op_sar_i32:
|
2015-07-27 13:41:44 +03:00
|
|
|
if (temp_is_const(args[2])) {
|
2014-03-18 18:45:39 +04:00
|
|
|
tmp = temps[args[2]].val & 31;
|
|
|
|
mask = (int32_t)temps[args[1]].mask >> tmp;
|
2013-09-03 10:27:38 +04:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case INDEX_op_sar_i64:
|
2015-07-27 13:41:44 +03:00
|
|
|
if (temp_is_const(args[2])) {
|
2014-03-18 18:45:39 +04:00
|
|
|
tmp = temps[args[2]].val & 63;
|
|
|
|
mask = (int64_t)temps[args[1]].mask >> tmp;
|
2013-01-12 03:42:52 +04:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2013-09-03 10:27:38 +04:00
|
|
|
case INDEX_op_shr_i32:
|
2015-07-27 13:41:44 +03:00
|
|
|
if (temp_is_const(args[2])) {
|
2014-03-18 18:45:39 +04:00
|
|
|
tmp = temps[args[2]].val & 31;
|
|
|
|
mask = (uint32_t)temps[args[1]].mask >> tmp;
|
2013-09-03 10:27:38 +04:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case INDEX_op_shr_i64:
|
2015-07-27 13:41:44 +03:00
|
|
|
if (temp_is_const(args[2])) {
|
2014-03-18 18:45:39 +04:00
|
|
|
tmp = temps[args[2]].val & 63;
|
|
|
|
mask = (uint64_t)temps[args[1]].mask >> tmp;
|
2013-01-12 03:42:52 +04:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2015-07-24 17:16:00 +03:00
|
|
|
case INDEX_op_extrl_i64_i32:
|
|
|
|
mask = (uint32_t)temps[args[1]].mask;
|
|
|
|
break;
|
|
|
|
case INDEX_op_extrh_i64_i32:
|
|
|
|
mask = (uint64_t)temps[args[1]].mask >> 32;
|
2013-09-10 04:03:24 +04:00
|
|
|
break;
|
|
|
|
|
2013-01-12 03:42:52 +04:00
|
|
|
CASE_OP_32_64(shl):
|
2015-07-27 13:41:44 +03:00
|
|
|
if (temp_is_const(args[2])) {
|
2014-03-18 18:45:39 +04:00
|
|
|
tmp = temps[args[2]].val & (TCG_TARGET_REG_BITS - 1);
|
|
|
|
mask = temps[args[1]].mask << tmp;
|
2013-01-12 03:42:52 +04:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
CASE_OP_32_64(neg):
|
|
|
|
/* Set to 1 all bits to the left of the rightmost. */
|
|
|
|
mask = -(temps[args[1]].mask & -temps[args[1]].mask);
|
|
|
|
break;
|
|
|
|
|
|
|
|
CASE_OP_32_64(deposit):
|
2014-03-19 01:23:52 +04:00
|
|
|
mask = deposit64(temps[args[1]].mask, args[3], args[4],
|
|
|
|
temps[args[2]].mask);
|
2013-01-12 03:42:52 +04:00
|
|
|
break;
|
|
|
|
|
|
|
|
CASE_OP_32_64(or):
|
|
|
|
CASE_OP_32_64(xor):
|
|
|
|
mask = temps[args[1]].mask | temps[args[2]].mask;
|
|
|
|
break;
|
|
|
|
|
|
|
|
CASE_OP_32_64(setcond):
|
2014-04-24 09:18:30 +04:00
|
|
|
case INDEX_op_setcond2_i32:
|
2013-01-12 03:42:52 +04:00
|
|
|
mask = 1;
|
|
|
|
break;
|
|
|
|
|
|
|
|
CASE_OP_32_64(movcond):
|
|
|
|
mask = temps[args[3]].mask | temps[args[4]].mask;
|
|
|
|
break;
|
|
|
|
|
2013-09-03 10:27:39 +04:00
|
|
|
CASE_OP_32_64(ld8u):
|
|
|
|
mask = 0xff;
|
|
|
|
break;
|
|
|
|
CASE_OP_32_64(ld16u):
|
|
|
|
mask = 0xffff;
|
|
|
|
break;
|
|
|
|
case INDEX_op_ld32u_i64:
|
|
|
|
mask = 0xffffffffu;
|
|
|
|
break;
|
|
|
|
|
|
|
|
CASE_OP_32_64(qemu_ld):
|
|
|
|
{
|
2015-05-12 21:51:44 +03:00
|
|
|
TCGMemOpIdx oi = args[nb_oargs + nb_iargs];
|
|
|
|
TCGMemOp mop = get_memop(oi);
|
2013-09-03 10:27:39 +04:00
|
|
|
if (!(mop & MO_SIGN)) {
|
|
|
|
mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2013-01-12 03:42:52 +04:00
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2014-06-09 05:24:14 +04:00
|
|
|
/* 32-bit ops generate 32-bit results. For the result is zero test
|
|
|
|
below, we can ignore high bits, but for further optimizations we
|
|
|
|
need to record that the high bits contain garbage. */
|
2014-05-22 22:14:10 +04:00
|
|
|
partmask = mask;
|
2014-06-09 05:24:14 +04:00
|
|
|
if (!(def->flags & TCG_OPF_64BIT)) {
|
2014-05-22 22:14:10 +04:00
|
|
|
mask |= ~(tcg_target_ulong)0xffffffffu;
|
|
|
|
partmask &= 0xffffffffu;
|
|
|
|
affected &= 0xffffffffu;
|
2013-09-03 10:27:38 +04:00
|
|
|
}
|
|
|
|
|
2014-05-22 22:14:10 +04:00
|
|
|
if (partmask == 0) {
|
2016-04-21 11:48:49 +03:00
|
|
|
tcg_debug_assert(nb_oargs == 1);
|
2015-06-04 22:53:23 +03:00
|
|
|
tcg_opt_gen_movi(s, op, args, args[0], 0);
|
optimize: optimize using nonzero bits
This adds two optimizations using the non-zero bit mask. In some cases
involving shifts or ANDs the value can become zero, and can thus be
optimized to a move of zero. Second, useless zero-extension or an
AND with constant can be detected that would only zero bits that are
already zero.
The main advantage of this optimization is that it turns zero-extensions
into moves, thus enabling much better copy propagation (around 1% code
reduction). Here is for example a "test $0xff0000,%ecx + je" before
optimization:
mov_i64 tmp0,rcx
movi_i64 tmp1,$0xff0000
discard cc_src
and_i64 cc_dst,tmp0,tmp1
movi_i32 cc_op,$0x1c
ext32u_i64 tmp0,cc_dst
movi_i64 tmp12,$0x0
brcond_i64 tmp0,tmp12,eq,$0x0
and after (without patch on the left, with on the right):
movi_i64 tmp1,$0xff0000 movi_i64 tmp1,$0xff0000
discard cc_src discard cc_src
and_i64 cc_dst,rcx,tmp1 and_i64 cc_dst,rcx,tmp1
movi_i32 cc_op,$0x1c movi_i32 cc_op,$0x1c
ext32u_i64 tmp0,cc_dst
movi_i64 tmp12,$0x0 movi_i64 tmp12,$0x0
brcond_i64 tmp0,tmp12,eq,$0x0 brcond_i64 cc_dst,tmp12,eq,$0x0
Other similar cases: "test %eax, %eax + jne" where eax is already 32-bit
(after optimization, without patch on the left, with on the right):
discard cc_src discard cc_src
mov_i64 cc_dst,rax mov_i64 cc_dst,rax
movi_i32 cc_op,$0x1c movi_i32 cc_op,$0x1c
ext32u_i64 tmp0,cc_dst
movi_i64 tmp12,$0x0 movi_i64 tmp12,$0x0
brcond_i64 tmp0,tmp12,ne,$0x0 brcond_i64 rax,tmp12,ne,$0x0
"test $0x1, %dl + je":
movi_i64 tmp1,$0x1 movi_i64 tmp1,$0x1
discard cc_src discard cc_src
and_i64 cc_dst,rdx,tmp1 and_i64 cc_dst,rdx,tmp1
movi_i32 cc_op,$0x1a movi_i32 cc_op,$0x1a
ext8u_i64 tmp0,cc_dst
movi_i64 tmp12,$0x0 movi_i64 tmp12,$0x0
brcond_i64 tmp0,tmp12,eq,$0x0 brcond_i64 cc_dst,tmp12,eq,$0x0
In some cases TCG even outsmarts GCC. :) Here the input code has
"and $0x2,%eax + movslq %eax,%rbx + test %rbx, %rbx" and the optimizer,
thanks to copy propagation, does the following:
movi_i64 tmp12,$0x2 movi_i64 tmp12,$0x2
and_i64 rax,rax,tmp12 and_i64 rax,rax,tmp12
mov_i64 cc_dst,rax mov_i64 cc_dst,rax
ext32s_i64 tmp0,rax -> nop
mov_i64 rbx,tmp0 -> mov_i64 rbx,cc_dst
and_i64 cc_dst,rbx,rbx -> nop
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-01-12 03:42:53 +04:00
|
|
|
continue;
|
|
|
|
}
|
|
|
|
if (affected == 0) {
|
2016-04-21 11:48:49 +03:00
|
|
|
tcg_debug_assert(nb_oargs == 1);
|
2015-06-05 12:19:18 +03:00
|
|
|
tcg_opt_gen_mov(s, op, args, args[0], args[1]);
|
optimize: optimize using nonzero bits
This adds two optimizations using the non-zero bit mask. In some cases
involving shifts or ANDs the value can become zero, and can thus be
optimized to a move of zero. Second, useless zero-extension or an
AND with constant can be detected that would only zero bits that are
already zero.
The main advantage of this optimization is that it turns zero-extensions
into moves, thus enabling much better copy propagation (around 1% code
reduction). Here is for example a "test $0xff0000,%ecx + je" before
optimization:
mov_i64 tmp0,rcx
movi_i64 tmp1,$0xff0000
discard cc_src
and_i64 cc_dst,tmp0,tmp1
movi_i32 cc_op,$0x1c
ext32u_i64 tmp0,cc_dst
movi_i64 tmp12,$0x0
brcond_i64 tmp0,tmp12,eq,$0x0
and after (without patch on the left, with on the right):
movi_i64 tmp1,$0xff0000 movi_i64 tmp1,$0xff0000
discard cc_src discard cc_src
and_i64 cc_dst,rcx,tmp1 and_i64 cc_dst,rcx,tmp1
movi_i32 cc_op,$0x1c movi_i32 cc_op,$0x1c
ext32u_i64 tmp0,cc_dst
movi_i64 tmp12,$0x0 movi_i64 tmp12,$0x0
brcond_i64 tmp0,tmp12,eq,$0x0 brcond_i64 cc_dst,tmp12,eq,$0x0
Other similar cases: "test %eax, %eax + jne" where eax is already 32-bit
(after optimization, without patch on the left, with on the right):
discard cc_src discard cc_src
mov_i64 cc_dst,rax mov_i64 cc_dst,rax
movi_i32 cc_op,$0x1c movi_i32 cc_op,$0x1c
ext32u_i64 tmp0,cc_dst
movi_i64 tmp12,$0x0 movi_i64 tmp12,$0x0
brcond_i64 tmp0,tmp12,ne,$0x0 brcond_i64 rax,tmp12,ne,$0x0
"test $0x1, %dl + je":
movi_i64 tmp1,$0x1 movi_i64 tmp1,$0x1
discard cc_src discard cc_src
and_i64 cc_dst,rdx,tmp1 and_i64 cc_dst,rdx,tmp1
movi_i32 cc_op,$0x1a movi_i32 cc_op,$0x1a
ext8u_i64 tmp0,cc_dst
movi_i64 tmp12,$0x0 movi_i64 tmp12,$0x0
brcond_i64 tmp0,tmp12,eq,$0x0 brcond_i64 cc_dst,tmp12,eq,$0x0
In some cases TCG even outsmarts GCC. :) Here the input code has
"and $0x2,%eax + movslq %eax,%rbx + test %rbx, %rbx" and the optimizer,
thanks to copy propagation, does the following:
movi_i64 tmp12,$0x2 movi_i64 tmp12,$0x2
and_i64 rax,rax,tmp12 and_i64 rax,rax,tmp12
mov_i64 cc_dst,rax mov_i64 cc_dst,rax
ext32s_i64 tmp0,rax -> nop
mov_i64 rbx,tmp0 -> mov_i64 rbx,cc_dst
and_i64 cc_dst,rbx,rbx -> nop
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-01-12 03:42:53 +04:00
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2012-09-06 18:47:13 +04:00
|
|
|
/* Simplify expression for "op r, a, 0 => movi r, 0" cases */
|
2014-09-20 00:49:15 +04:00
|
|
|
switch (opc) {
|
2012-09-06 18:47:14 +04:00
|
|
|
CASE_OP_32_64(and):
|
2011-07-07 16:37:14 +04:00
|
|
|
CASE_OP_32_64(mul):
|
2013-08-15 01:35:56 +04:00
|
|
|
CASE_OP_32_64(muluh):
|
|
|
|
CASE_OP_32_64(mulsh):
|
2015-07-27 13:41:44 +03:00
|
|
|
if ((temp_is_const(args[2]) && temps[args[2]].val == 0)) {
|
2015-06-04 22:53:23 +03:00
|
|
|
tcg_opt_gen_movi(s, op, args, args[0], 0);
|
2011-07-07 16:37:14 +04:00
|
|
|
continue;
|
|
|
|
}
|
|
|
|
break;
|
2012-09-06 18:47:13 +04:00
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Simplify expression for "op r, a, a => mov r, a" cases */
|
2014-09-20 00:49:15 +04:00
|
|
|
switch (opc) {
|
2011-07-07 16:37:15 +04:00
|
|
|
CASE_OP_32_64(or):
|
|
|
|
CASE_OP_32_64(and):
|
2012-09-18 21:11:32 +04:00
|
|
|
if (temps_are_copies(args[1], args[2])) {
|
2015-06-05 12:19:18 +03:00
|
|
|
tcg_opt_gen_mov(s, op, args, args[0], args[1]);
|
2011-07-07 16:37:15 +04:00
|
|
|
continue;
|
|
|
|
}
|
|
|
|
break;
|
2011-07-30 23:18:32 +04:00
|
|
|
default:
|
|
|
|
break;
|
2011-07-07 16:37:14 +04:00
|
|
|
}
|
|
|
|
|
2012-09-18 21:12:36 +04:00
|
|
|
/* Simplify expression for "op r, a, a => movi r, 0" cases */
|
2014-09-20 00:49:15 +04:00
|
|
|
switch (opc) {
|
2014-01-29 01:26:17 +04:00
|
|
|
CASE_OP_32_64(andc):
|
2012-09-18 21:12:36 +04:00
|
|
|
CASE_OP_32_64(sub):
|
|
|
|
CASE_OP_32_64(xor):
|
|
|
|
if (temps_are_copies(args[1], args[2])) {
|
2015-06-04 22:53:23 +03:00
|
|
|
tcg_opt_gen_movi(s, op, args, args[0], 0);
|
2012-09-18 21:12:36 +04:00
|
|
|
continue;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2011-07-07 16:37:13 +04:00
|
|
|
/* Propagate constants through copy operations and do constant
|
|
|
|
folding. Constants will be substituted to arguments by register
|
|
|
|
allocator where needed and possible. Also detect copies. */
|
2014-09-20 00:49:15 +04:00
|
|
|
switch (opc) {
|
2011-07-07 16:37:13 +04:00
|
|
|
CASE_OP_32_64(mov):
|
2015-06-05 12:19:18 +03:00
|
|
|
tcg_opt_gen_mov(s, op, args, args[0], args[1]);
|
|
|
|
break;
|
2011-07-07 16:37:13 +04:00
|
|
|
CASE_OP_32_64(movi):
|
2015-06-04 22:53:23 +03:00
|
|
|
tcg_opt_gen_movi(s, op, args, args[0], args[1]);
|
2011-07-07 16:37:13 +04:00
|
|
|
break;
|
2012-10-02 22:32:24 +04:00
|
|
|
|
2011-07-07 16:37:17 +04:00
|
|
|
CASE_OP_32_64(not):
|
2011-08-18 01:11:47 +04:00
|
|
|
CASE_OP_32_64(neg):
|
2011-08-18 01:11:46 +04:00
|
|
|
CASE_OP_32_64(ext8s):
|
|
|
|
CASE_OP_32_64(ext8u):
|
|
|
|
CASE_OP_32_64(ext16s):
|
|
|
|
CASE_OP_32_64(ext16u):
|
2011-07-07 16:37:17 +04:00
|
|
|
case INDEX_op_ext32s_i64:
|
|
|
|
case INDEX_op_ext32u_i64:
|
2015-07-27 13:41:45 +03:00
|
|
|
case INDEX_op_ext_i32_i64:
|
|
|
|
case INDEX_op_extu_i32_i64:
|
2015-07-24 17:16:00 +03:00
|
|
|
case INDEX_op_extrl_i64_i32:
|
|
|
|
case INDEX_op_extrh_i64_i32:
|
2015-07-27 13:41:44 +03:00
|
|
|
if (temp_is_const(args[1])) {
|
2014-09-20 00:49:15 +04:00
|
|
|
tmp = do_constant_folding(opc, temps[args[1]].val, 0);
|
2015-06-04 22:53:23 +03:00
|
|
|
tcg_opt_gen_movi(s, op, args, args[0], tmp);
|
2012-10-02 22:32:24 +04:00
|
|
|
break;
|
2011-07-07 16:37:17 +04:00
|
|
|
}
|
2012-10-02 22:32:24 +04:00
|
|
|
goto do_default;
|
|
|
|
|
2011-07-07 16:37:14 +04:00
|
|
|
CASE_OP_32_64(add):
|
|
|
|
CASE_OP_32_64(sub):
|
|
|
|
CASE_OP_32_64(mul):
|
2011-07-07 16:37:15 +04:00
|
|
|
CASE_OP_32_64(or):
|
|
|
|
CASE_OP_32_64(and):
|
|
|
|
CASE_OP_32_64(xor):
|
2011-07-07 16:37:16 +04:00
|
|
|
CASE_OP_32_64(shl):
|
|
|
|
CASE_OP_32_64(shr):
|
|
|
|
CASE_OP_32_64(sar):
|
2011-08-18 01:11:46 +04:00
|
|
|
CASE_OP_32_64(rotl):
|
|
|
|
CASE_OP_32_64(rotr):
|
2011-08-18 01:11:47 +04:00
|
|
|
CASE_OP_32_64(andc):
|
|
|
|
CASE_OP_32_64(orc):
|
|
|
|
CASE_OP_32_64(eqv):
|
|
|
|
CASE_OP_32_64(nand):
|
|
|
|
CASE_OP_32_64(nor):
|
2013-08-15 01:35:56 +04:00
|
|
|
CASE_OP_32_64(muluh):
|
|
|
|
CASE_OP_32_64(mulsh):
|
2013-08-15 02:22:46 +04:00
|
|
|
CASE_OP_32_64(div):
|
|
|
|
CASE_OP_32_64(divu):
|
|
|
|
CASE_OP_32_64(rem):
|
|
|
|
CASE_OP_32_64(remu):
|
2015-07-27 13:41:44 +03:00
|
|
|
if (temp_is_const(args[1]) && temp_is_const(args[2])) {
|
2014-09-20 00:49:15 +04:00
|
|
|
tmp = do_constant_folding(opc, temps[args[1]].val,
|
2011-07-07 16:37:14 +04:00
|
|
|
temps[args[2]].val);
|
2015-06-04 22:53:23 +03:00
|
|
|
tcg_opt_gen_movi(s, op, args, args[0], tmp);
|
2012-10-02 22:32:24 +04:00
|
|
|
break;
|
2011-07-07 16:37:14 +04:00
|
|
|
}
|
2012-10-02 22:32:24 +04:00
|
|
|
goto do_default;
|
|
|
|
|
2012-09-21 13:07:29 +04:00
|
|
|
CASE_OP_32_64(deposit):
|
2015-07-27 13:41:44 +03:00
|
|
|
if (temp_is_const(args[1]) && temp_is_const(args[2])) {
|
2014-03-19 01:23:52 +04:00
|
|
|
tmp = deposit64(temps[args[1]].val, args[3], args[4],
|
|
|
|
temps[args[2]].val);
|
2015-06-04 22:53:23 +03:00
|
|
|
tcg_opt_gen_movi(s, op, args, args[0], tmp);
|
2012-10-02 22:32:24 +04:00
|
|
|
break;
|
2012-09-21 13:07:29 +04:00
|
|
|
}
|
2012-10-02 22:32:24 +04:00
|
|
|
goto do_default;
|
|
|
|
|
2012-09-06 18:47:14 +04:00
|
|
|
CASE_OP_32_64(setcond):
|
2014-09-20 00:49:15 +04:00
|
|
|
tmp = do_constant_folding_cond(opc, args[1], args[2], args[3]);
|
2012-09-18 21:37:00 +04:00
|
|
|
if (tmp != 2) {
|
2015-06-04 22:53:23 +03:00
|
|
|
tcg_opt_gen_movi(s, op, args, args[0], tmp);
|
2012-10-02 22:32:24 +04:00
|
|
|
break;
|
2012-09-06 18:47:14 +04:00
|
|
|
}
|
2012-10-02 22:32:24 +04:00
|
|
|
goto do_default;
|
|
|
|
|
2012-09-06 18:47:14 +04:00
|
|
|
CASE_OP_32_64(brcond):
|
2014-09-20 00:49:15 +04:00
|
|
|
tmp = do_constant_folding_cond(opc, args[0], args[1], args[2]);
|
2012-09-18 21:37:00 +04:00
|
|
|
if (tmp != 2) {
|
|
|
|
if (tmp) {
|
2013-01-12 03:42:51 +04:00
|
|
|
reset_all_temps(nb_temps);
|
2014-09-20 00:49:15 +04:00
|
|
|
op->opc = INDEX_op_br;
|
|
|
|
args[0] = args[3];
|
2012-09-06 18:47:14 +04:00
|
|
|
} else {
|
2014-03-31 03:51:54 +04:00
|
|
|
tcg_op_remove(s, op);
|
2012-09-06 18:47:14 +04:00
|
|
|
}
|
2012-10-02 22:32:24 +04:00
|
|
|
break;
|
2012-09-06 18:47:14 +04:00
|
|
|
}
|
2012-10-02 22:32:24 +04:00
|
|
|
goto do_default;
|
|
|
|
|
2012-09-21 21:13:37 +04:00
|
|
|
CASE_OP_32_64(movcond):
|
2014-09-20 00:49:15 +04:00
|
|
|
tmp = do_constant_folding_cond(opc, args[1], args[2], args[5]);
|
2012-09-18 21:37:00 +04:00
|
|
|
if (tmp != 2) {
|
2015-06-05 12:19:18 +03:00
|
|
|
tcg_opt_gen_mov(s, op, args, args[0], args[4-tmp]);
|
2012-10-02 22:32:24 +04:00
|
|
|
break;
|
2012-09-21 21:13:37 +04:00
|
|
|
}
|
2012-10-02 22:32:24 +04:00
|
|
|
goto do_default;
|
2012-10-02 22:32:28 +04:00
|
|
|
|
|
|
|
case INDEX_op_add2_i32:
|
|
|
|
case INDEX_op_sub2_i32:
|
2015-07-27 13:41:44 +03:00
|
|
|
if (temp_is_const(args[2]) && temp_is_const(args[3])
|
|
|
|
&& temp_is_const(args[4]) && temp_is_const(args[5])) {
|
2012-10-02 22:32:28 +04:00
|
|
|
uint32_t al = temps[args[2]].val;
|
|
|
|
uint32_t ah = temps[args[3]].val;
|
|
|
|
uint32_t bl = temps[args[4]].val;
|
|
|
|
uint32_t bh = temps[args[5]].val;
|
|
|
|
uint64_t a = ((uint64_t)ah << 32) | al;
|
|
|
|
uint64_t b = ((uint64_t)bh << 32) | bl;
|
|
|
|
TCGArg rl, rh;
|
2016-06-24 06:34:33 +03:00
|
|
|
TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32, 2);
|
2014-03-31 04:14:02 +04:00
|
|
|
TCGArg *args2 = &s->gen_opparam_buf[op2->args];
|
2012-10-02 22:32:28 +04:00
|
|
|
|
2014-09-20 00:49:15 +04:00
|
|
|
if (opc == INDEX_op_add2_i32) {
|
2012-10-02 22:32:28 +04:00
|
|
|
a += b;
|
|
|
|
} else {
|
|
|
|
a -= b;
|
|
|
|
}
|
|
|
|
|
|
|
|
rl = args[0];
|
|
|
|
rh = args[1];
|
tcg/optimize: fix constant signedness
By convention, on a 64-bit host TCG internally stores 32-bit constants
as sign-extended. This is not the case in the optimizer when a 32-bit
constant is folded.
This doesn't seem to have more consequences than suboptimal code
generation. For instance the x86 backend assumes sign-extended constants,
and in some rare cases uses a 32-bit unsigned immediate 0xffffffff
instead of a 8-bit signed immediate 0xff for the constant -1. This is
with a ppc guest:
before
------
---- 0x9f29cc
movi_i32 tmp1,$0xffffffff
movi_i32 tmp2,$0x0
add2_i32 tmp0,CA,CA,tmp2,r6,tmp2
add2_i32 tmp0,CA,tmp0,CA,tmp1,tmp2
mov_i32 r10,tmp0
0x7fd8c7dfe90c: xor %ebp,%ebp
0x7fd8c7dfe90e: mov %ebp,%r11d
0x7fd8c7dfe911: mov 0x18(%r14),%r9d
0x7fd8c7dfe915: add %r9d,%r10d
0x7fd8c7dfe918: adc %ebp,%r11d
0x7fd8c7dfe91b: add $0xffffffff,%r10d
0x7fd8c7dfe922: adc %ebp,%r11d
0x7fd8c7dfe925: mov %r11d,0x134(%r14)
0x7fd8c7dfe92c: mov %r10d,0x28(%r14)
after
-----
---- 0x9f29cc
movi_i32 tmp1,$0xffffffffffffffff
movi_i32 tmp2,$0x0
add2_i32 tmp0,CA,CA,tmp2,r6,tmp2
add2_i32 tmp0,CA,tmp0,CA,tmp1,tmp2
mov_i32 r10,tmp0
0x7f37010d490c: xor %ebp,%ebp
0x7f37010d490e: mov %ebp,%r11d
0x7f37010d4911: mov 0x18(%r14),%r9d
0x7f37010d4915: add %r9d,%r10d
0x7f37010d4918: adc %ebp,%r11d
0x7f37010d491b: add $0xffffffffffffffff,%r10d
0x7f37010d491f: adc %ebp,%r11d
0x7f37010d4922: mov %r11d,0x134(%r14)
0x7f37010d4929: mov %r10d,0x28(%r14)
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Message-Id: <1436544211-2769-2-git-send-email-aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-07-10 19:03:31 +03:00
|
|
|
tcg_opt_gen_movi(s, op, args, rl, (int32_t)a);
|
|
|
|
tcg_opt_gen_movi(s, op2, args2, rh, (int32_t)(a >> 32));
|
2014-09-20 00:49:15 +04:00
|
|
|
|
|
|
|
/* We've done all we need to do with the movi. Skip it. */
|
|
|
|
oi_next = op2->next;
|
2012-10-02 22:32:28 +04:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
goto do_default;
|
2012-10-02 22:32:30 +04:00
|
|
|
|
|
|
|
case INDEX_op_mulu2_i32:
|
2015-07-27 13:41:44 +03:00
|
|
|
if (temp_is_const(args[2]) && temp_is_const(args[3])) {
|
2012-10-02 22:32:30 +04:00
|
|
|
uint32_t a = temps[args[2]].val;
|
|
|
|
uint32_t b = temps[args[3]].val;
|
|
|
|
uint64_t r = (uint64_t)a * b;
|
|
|
|
TCGArg rl, rh;
|
2016-06-24 06:34:33 +03:00
|
|
|
TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32, 2);
|
2014-03-31 04:14:02 +04:00
|
|
|
TCGArg *args2 = &s->gen_opparam_buf[op2->args];
|
2012-10-02 22:32:30 +04:00
|
|
|
|
|
|
|
rl = args[0];
|
|
|
|
rh = args[1];
|
tcg/optimize: fix constant signedness
By convention, on a 64-bit host TCG internally stores 32-bit constants
as sign-extended. This is not the case in the optimizer when a 32-bit
constant is folded.
This doesn't seem to have more consequences than suboptimal code
generation. For instance the x86 backend assumes sign-extended constants,
and in some rare cases uses a 32-bit unsigned immediate 0xffffffff
instead of a 8-bit signed immediate 0xff for the constant -1. This is
with a ppc guest:
before
------
---- 0x9f29cc
movi_i32 tmp1,$0xffffffff
movi_i32 tmp2,$0x0
add2_i32 tmp0,CA,CA,tmp2,r6,tmp2
add2_i32 tmp0,CA,tmp0,CA,tmp1,tmp2
mov_i32 r10,tmp0
0x7fd8c7dfe90c: xor %ebp,%ebp
0x7fd8c7dfe90e: mov %ebp,%r11d
0x7fd8c7dfe911: mov 0x18(%r14),%r9d
0x7fd8c7dfe915: add %r9d,%r10d
0x7fd8c7dfe918: adc %ebp,%r11d
0x7fd8c7dfe91b: add $0xffffffff,%r10d
0x7fd8c7dfe922: adc %ebp,%r11d
0x7fd8c7dfe925: mov %r11d,0x134(%r14)
0x7fd8c7dfe92c: mov %r10d,0x28(%r14)
after
-----
---- 0x9f29cc
movi_i32 tmp1,$0xffffffffffffffff
movi_i32 tmp2,$0x0
add2_i32 tmp0,CA,CA,tmp2,r6,tmp2
add2_i32 tmp0,CA,tmp0,CA,tmp1,tmp2
mov_i32 r10,tmp0
0x7f37010d490c: xor %ebp,%ebp
0x7f37010d490e: mov %ebp,%r11d
0x7f37010d4911: mov 0x18(%r14),%r9d
0x7f37010d4915: add %r9d,%r10d
0x7f37010d4918: adc %ebp,%r11d
0x7f37010d491b: add $0xffffffffffffffff,%r10d
0x7f37010d491f: adc %ebp,%r11d
0x7f37010d4922: mov %r11d,0x134(%r14)
0x7f37010d4929: mov %r10d,0x28(%r14)
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Message-Id: <1436544211-2769-2-git-send-email-aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-07-10 19:03:31 +03:00
|
|
|
tcg_opt_gen_movi(s, op, args, rl, (int32_t)r);
|
|
|
|
tcg_opt_gen_movi(s, op2, args2, rh, (int32_t)(r >> 32));
|
2014-09-20 00:49:15 +04:00
|
|
|
|
|
|
|
/* We've done all we need to do with the movi. Skip it. */
|
|
|
|
oi_next = op2->next;
|
2012-10-02 22:32:30 +04:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
goto do_default;
|
2012-10-02 22:32:24 +04:00
|
|
|
|
2012-10-02 22:32:25 +04:00
|
|
|
case INDEX_op_brcond2_i32:
|
2012-10-02 22:32:27 +04:00
|
|
|
tmp = do_constant_folding_cond2(&args[0], &args[2], args[4]);
|
|
|
|
if (tmp != 2) {
|
|
|
|
if (tmp) {
|
2014-04-24 09:18:30 +04:00
|
|
|
do_brcond_true:
|
2013-01-12 03:42:51 +04:00
|
|
|
reset_all_temps(nb_temps);
|
2014-09-20 00:49:15 +04:00
|
|
|
op->opc = INDEX_op_br;
|
|
|
|
args[0] = args[5];
|
2012-10-02 22:32:27 +04:00
|
|
|
} else {
|
2014-04-24 09:18:30 +04:00
|
|
|
do_brcond_false:
|
2014-03-31 03:51:54 +04:00
|
|
|
tcg_op_remove(s, op);
|
2012-10-02 22:32:27 +04:00
|
|
|
}
|
|
|
|
} else if ((args[4] == TCG_COND_LT || args[4] == TCG_COND_GE)
|
2015-07-27 13:41:44 +03:00
|
|
|
&& temp_is_const(args[2]) && temps[args[2]].val == 0
|
|
|
|
&& temp_is_const(args[3]) && temps[args[3]].val == 0) {
|
2012-10-02 22:32:27 +04:00
|
|
|
/* Simplify LT/GE comparisons vs zero to a single compare
|
|
|
|
vs the high word of the input. */
|
2014-04-24 09:18:30 +04:00
|
|
|
do_brcond_high:
|
2013-01-12 03:42:51 +04:00
|
|
|
reset_all_temps(nb_temps);
|
2014-09-20 00:49:15 +04:00
|
|
|
op->opc = INDEX_op_brcond_i32;
|
|
|
|
args[0] = args[1];
|
|
|
|
args[1] = args[3];
|
|
|
|
args[2] = args[4];
|
|
|
|
args[3] = args[5];
|
2014-04-24 09:18:30 +04:00
|
|
|
} else if (args[4] == TCG_COND_EQ) {
|
|
|
|
/* Simplify EQ comparisons where one of the pairs
|
|
|
|
can be simplified. */
|
|
|
|
tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
|
|
|
|
args[0], args[2], TCG_COND_EQ);
|
|
|
|
if (tmp == 0) {
|
|
|
|
goto do_brcond_false;
|
|
|
|
} else if (tmp == 1) {
|
|
|
|
goto do_brcond_high;
|
|
|
|
}
|
|
|
|
tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
|
|
|
|
args[1], args[3], TCG_COND_EQ);
|
|
|
|
if (tmp == 0) {
|
|
|
|
goto do_brcond_false;
|
|
|
|
} else if (tmp != 1) {
|
|
|
|
goto do_default;
|
|
|
|
}
|
|
|
|
do_brcond_low:
|
|
|
|
reset_all_temps(nb_temps);
|
2014-09-20 00:49:15 +04:00
|
|
|
op->opc = INDEX_op_brcond_i32;
|
|
|
|
args[1] = args[2];
|
|
|
|
args[2] = args[4];
|
|
|
|
args[3] = args[5];
|
2014-04-24 09:18:30 +04:00
|
|
|
} else if (args[4] == TCG_COND_NE) {
|
|
|
|
/* Simplify NE comparisons where one of the pairs
|
|
|
|
can be simplified. */
|
|
|
|
tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
|
|
|
|
args[0], args[2], TCG_COND_NE);
|
|
|
|
if (tmp == 0) {
|
|
|
|
goto do_brcond_high;
|
|
|
|
} else if (tmp == 1) {
|
|
|
|
goto do_brcond_true;
|
|
|
|
}
|
|
|
|
tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
|
|
|
|
args[1], args[3], TCG_COND_NE);
|
|
|
|
if (tmp == 0) {
|
|
|
|
goto do_brcond_low;
|
|
|
|
} else if (tmp == 1) {
|
|
|
|
goto do_brcond_true;
|
|
|
|
}
|
|
|
|
goto do_default;
|
2012-10-02 22:32:27 +04:00
|
|
|
} else {
|
|
|
|
goto do_default;
|
2012-10-02 22:32:25 +04:00
|
|
|
}
|
2012-10-02 22:32:27 +04:00
|
|
|
break;
|
2012-10-02 22:32:25 +04:00
|
|
|
|
|
|
|
case INDEX_op_setcond2_i32:
|
2012-10-02 22:32:27 +04:00
|
|
|
tmp = do_constant_folding_cond2(&args[1], &args[3], args[5]);
|
|
|
|
if (tmp != 2) {
|
2014-04-24 09:18:30 +04:00
|
|
|
do_setcond_const:
|
2015-06-04 22:53:23 +03:00
|
|
|
tcg_opt_gen_movi(s, op, args, args[0], tmp);
|
2012-10-02 22:32:27 +04:00
|
|
|
} else if ((args[5] == TCG_COND_LT || args[5] == TCG_COND_GE)
|
2015-07-27 13:41:44 +03:00
|
|
|
&& temp_is_const(args[3]) && temps[args[3]].val == 0
|
|
|
|
&& temp_is_const(args[4]) && temps[args[4]].val == 0) {
|
2012-10-02 22:32:27 +04:00
|
|
|
/* Simplify LT/GE comparisons vs zero to a single compare
|
|
|
|
vs the high word of the input. */
|
2014-04-24 09:18:30 +04:00
|
|
|
do_setcond_high:
|
2013-05-09 00:36:39 +04:00
|
|
|
reset_temp(args[0]);
|
2014-04-24 09:18:30 +04:00
|
|
|
temps[args[0]].mask = 1;
|
2014-09-20 00:49:15 +04:00
|
|
|
op->opc = INDEX_op_setcond_i32;
|
|
|
|
args[1] = args[2];
|
|
|
|
args[2] = args[4];
|
|
|
|
args[3] = args[5];
|
2014-04-24 09:18:30 +04:00
|
|
|
} else if (args[5] == TCG_COND_EQ) {
|
|
|
|
/* Simplify EQ comparisons where one of the pairs
|
|
|
|
can be simplified. */
|
|
|
|
tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
|
|
|
|
args[1], args[3], TCG_COND_EQ);
|
|
|
|
if (tmp == 0) {
|
|
|
|
goto do_setcond_const;
|
|
|
|
} else if (tmp == 1) {
|
|
|
|
goto do_setcond_high;
|
|
|
|
}
|
|
|
|
tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
|
|
|
|
args[2], args[4], TCG_COND_EQ);
|
|
|
|
if (tmp == 0) {
|
|
|
|
goto do_setcond_high;
|
|
|
|
} else if (tmp != 1) {
|
|
|
|
goto do_default;
|
|
|
|
}
|
|
|
|
do_setcond_low:
|
|
|
|
reset_temp(args[0]);
|
|
|
|
temps[args[0]].mask = 1;
|
2014-09-20 00:49:15 +04:00
|
|
|
op->opc = INDEX_op_setcond_i32;
|
|
|
|
args[2] = args[3];
|
|
|
|
args[3] = args[5];
|
2014-04-24 09:18:30 +04:00
|
|
|
} else if (args[5] == TCG_COND_NE) {
|
|
|
|
/* Simplify NE comparisons where one of the pairs
|
|
|
|
can be simplified. */
|
|
|
|
tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
|
|
|
|
args[1], args[3], TCG_COND_NE);
|
|
|
|
if (tmp == 0) {
|
|
|
|
goto do_setcond_high;
|
|
|
|
} else if (tmp == 1) {
|
|
|
|
goto do_setcond_const;
|
|
|
|
}
|
|
|
|
tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
|
|
|
|
args[2], args[4], TCG_COND_NE);
|
|
|
|
if (tmp == 0) {
|
|
|
|
goto do_setcond_low;
|
|
|
|
} else if (tmp == 1) {
|
|
|
|
goto do_setcond_const;
|
|
|
|
}
|
|
|
|
goto do_default;
|
2012-10-02 22:32:27 +04:00
|
|
|
} else {
|
|
|
|
goto do_default;
|
2012-10-02 22:32:25 +04:00
|
|
|
}
|
2012-10-02 22:32:27 +04:00
|
|
|
break;
|
2012-10-02 22:32:25 +04:00
|
|
|
|
2011-07-07 16:37:12 +04:00
|
|
|
case INDEX_op_call:
|
2014-03-23 07:06:52 +04:00
|
|
|
if (!(args[nb_oargs + nb_iargs + 1]
|
|
|
|
& (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS))) {
|
2011-07-07 16:37:13 +04:00
|
|
|
for (i = 0; i < nb_globals; i++) {
|
2015-07-27 13:41:44 +03:00
|
|
|
if (test_bit(i, temps_used.l)) {
|
|
|
|
reset_temp(i);
|
|
|
|
}
|
2011-07-07 16:37:13 +04:00
|
|
|
}
|
|
|
|
}
|
2014-03-23 07:06:52 +04:00
|
|
|
goto do_reset_output;
|
2012-10-02 22:32:24 +04:00
|
|
|
|
2011-07-07 16:37:12 +04:00
|
|
|
default:
|
2012-10-02 22:32:24 +04:00
|
|
|
do_default:
|
|
|
|
/* Default case: we know nothing about operation (or were unable
|
|
|
|
to compute the operation result) so no propagation is done.
|
|
|
|
We trash everything if the operation is the end of a basic
|
2013-01-12 03:42:52 +04:00
|
|
|
block, otherwise we only trash the output args. "mask" is
|
|
|
|
the non-zero bits mask for the first output arg. */
|
2012-09-19 23:40:30 +04:00
|
|
|
if (def->flags & TCG_OPF_BB_END) {
|
2013-01-12 03:42:51 +04:00
|
|
|
reset_all_temps(nb_temps);
|
2012-09-19 23:40:30 +04:00
|
|
|
} else {
|
2014-03-23 07:06:52 +04:00
|
|
|
do_reset_output:
|
|
|
|
for (i = 0; i < nb_oargs; i++) {
|
2012-09-11 14:31:21 +04:00
|
|
|
reset_temp(args[i]);
|
2013-09-03 10:27:38 +04:00
|
|
|
/* Save the corresponding known-zero bits mask for the
|
|
|
|
first output argument (only one supported so far). */
|
|
|
|
if (i == 0) {
|
|
|
|
temps[args[i]].mask = mask;
|
|
|
|
}
|
2012-09-19 23:40:30 +04:00
|
|
|
}
|
2011-07-07 16:37:13 +04:00
|
|
|
}
|
2011-07-07 16:37:12 +04:00
|
|
|
break;
|
|
|
|
}
|
2016-08-23 16:48:25 +03:00
|
|
|
|
|
|
|
/* Eliminate duplicate and redundant fence instructions. */
|
|
|
|
if (prev_mb_args) {
|
|
|
|
switch (opc) {
|
|
|
|
case INDEX_op_mb:
|
|
|
|
/* Merge two barriers of the same type into one,
|
|
|
|
* or a weaker barrier into a stronger one,
|
|
|
|
* or two weaker barriers into a stronger one.
|
|
|
|
* mb X; mb Y => mb X|Y
|
|
|
|
* mb; strl => mb; st
|
|
|
|
* ldaq; mb => ld; mb
|
|
|
|
* ldaq; strl => ld; mb; st
|
|
|
|
* Other combinations are also merged into a strong
|
|
|
|
* barrier. This is stricter than specified but for
|
|
|
|
* the purposes of TCG is better than not optimizing.
|
|
|
|
*/
|
|
|
|
prev_mb_args[0] |= args[0];
|
|
|
|
tcg_op_remove(s, op);
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
/* Opcodes that end the block stop the optimization. */
|
|
|
|
if ((def->flags & TCG_OPF_BB_END) == 0) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
/* fallthru */
|
|
|
|
case INDEX_op_qemu_ld_i32:
|
|
|
|
case INDEX_op_qemu_ld_i64:
|
|
|
|
case INDEX_op_qemu_st_i32:
|
|
|
|
case INDEX_op_qemu_st_i64:
|
|
|
|
case INDEX_op_call:
|
|
|
|
/* Opcodes that touch guest memory stop the optimization. */
|
|
|
|
prev_mb_args = NULL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
} else if (opc == INDEX_op_mb) {
|
|
|
|
prev_mb_args = args;
|
|
|
|
}
|
2011-07-07 16:37:12 +04:00
|
|
|
}
|
|
|
|
}
|