mirror of https://github.com/proxmox/mirror_qemu
msix: Use replace local defines with pci_regs versions
This also cleans up an open-coded 64-bit message address readout. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>master
parent
81486b55f4
commit
01731cfb39
40
hw/msix.c
40
hw/msix.c
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@ -16,9 +16,6 @@
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#include "pci.h"
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#include "range.h"
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/* MSI-X capability structure */
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#define MSIX_TABLE_OFFSET 4
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#define MSIX_PBA_OFFSET 8
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#define MSIX_CAP_LENGTH 12
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/* MSI enable bit and maskall bit are in byte 1 in FLAGS register */
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@ -26,14 +23,6 @@
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#define MSIX_ENABLE_MASK (PCI_MSIX_FLAGS_ENABLE >> 8)
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#define MSIX_MASKALL_MASK (PCI_MSIX_FLAGS_MASKALL >> 8)
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/* MSI-X table format */
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#define MSIX_MSG_ADDR 0
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#define MSIX_MSG_UPPER_ADDR 4
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#define MSIX_MSG_DATA 8
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#define MSIX_VECTOR_CTRL 12
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#define MSIX_ENTRY_SIZE 16
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#define MSIX_VECTOR_MASK 0x1
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/* How much space does an MSIX table need. */
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/* The spec requires giving the table structure
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* a 4K aligned region all by itself. */
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@ -82,9 +71,9 @@ static int msix_add_config(struct PCIDevice *pdev, unsigned short nentries,
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pci_set_word(config + PCI_MSIX_FLAGS, nentries - 1);
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/* Table on top of BAR */
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pci_set_long(config + MSIX_TABLE_OFFSET, bar_size | bar_nr);
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pci_set_long(config + PCI_MSIX_TABLE, bar_size | bar_nr);
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/* Pending bits on top of that */
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pci_set_long(config + MSIX_PBA_OFFSET, (bar_size + MSIX_PAGE_PENDING) |
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pci_set_long(config + PCI_MSIX_PBA, (bar_size + MSIX_PAGE_PENDING) |
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bar_nr);
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pdev->msix_cap = config_offset;
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/* Make flags bit writeable. */
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@ -140,9 +129,10 @@ static int msix_function_masked(PCIDevice *dev)
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static int msix_is_masked(PCIDevice *dev, int vector)
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{
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unsigned offset = vector * MSIX_ENTRY_SIZE + MSIX_VECTOR_CTRL;
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unsigned offset =
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vector * PCI_MSIX_ENTRY_SIZE + PCI_MSIX_ENTRY_VECTOR_CTRL;
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return msix_function_masked(dev) ||
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dev->msix_table_page[offset] & MSIX_VECTOR_MASK;
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dev->msix_table_page[offset] & PCI_MSIX_ENTRY_CTRL_MASKBIT;
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}
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static void msix_handle_mask_update(PCIDevice *dev, int vector)
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@ -184,7 +174,7 @@ static void msix_mmio_writel(void *opaque, target_phys_addr_t addr,
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{
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PCIDevice *dev = opaque;
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unsigned int offset = addr & (MSIX_PAGE_SIZE - 1) & ~0x3;
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int vector = offset / MSIX_ENTRY_SIZE;
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int vector = offset / PCI_MSIX_ENTRY_SIZE;
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pci_set_long(dev->msix_table_page + offset, val);
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msix_handle_mask_update(dev, vector);
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}
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@ -208,7 +198,7 @@ void msix_mmio_map(PCIDevice *d, int region_num,
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pcibus_t addr, pcibus_t size, int type)
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{
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uint8_t *config = d->config + d->msix_cap;
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uint32_t table = pci_get_long(config + MSIX_TABLE_OFFSET);
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uint32_t table = pci_get_long(config + PCI_MSIX_TABLE);
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uint32_t offset = table & ~(MSIX_PAGE_SIZE - 1);
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/* TODO: for assigned devices, we'll want to make it possible to map
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* pending bits separately in case they are in a separate bar. */
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@ -226,8 +216,9 @@ static void msix_mask_all(struct PCIDevice *dev, unsigned nentries)
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{
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int vector;
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for (vector = 0; vector < nentries; ++vector) {
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unsigned offset = vector * MSIX_ENTRY_SIZE + MSIX_VECTOR_CTRL;
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dev->msix_table_page[offset] |= MSIX_VECTOR_MASK;
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unsigned offset =
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vector * PCI_MSIX_ENTRY_SIZE + PCI_MSIX_ENTRY_VECTOR_CTRL;
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dev->msix_table_page[offset] |= PCI_MSIX_ENTRY_CTRL_MASKBIT;
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}
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}
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@ -313,7 +304,7 @@ void msix_save(PCIDevice *dev, QEMUFile *f)
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return;
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}
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qemu_put_buffer(f, dev->msix_table_page, n * MSIX_ENTRY_SIZE);
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qemu_put_buffer(f, dev->msix_table_page, n * PCI_MSIX_ENTRY_SIZE);
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qemu_put_buffer(f, dev->msix_table_page + MSIX_PAGE_PENDING, (n + 7) / 8);
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}
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@ -327,7 +318,7 @@ void msix_load(PCIDevice *dev, QEMUFile *f)
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}
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msix_free_irq_entries(dev);
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qemu_get_buffer(f, dev->msix_table_page, n * MSIX_ENTRY_SIZE);
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qemu_get_buffer(f, dev->msix_table_page, n * PCI_MSIX_ENTRY_SIZE);
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qemu_get_buffer(f, dev->msix_table_page + MSIX_PAGE_PENDING, (n + 7) / 8);
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}
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@ -355,7 +346,7 @@ uint32_t msix_bar_size(PCIDevice *dev)
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/* Send an MSI-X message */
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void msix_notify(PCIDevice *dev, unsigned vector)
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{
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uint8_t *table_entry = dev->msix_table_page + vector * MSIX_ENTRY_SIZE;
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uint8_t *table_entry = dev->msix_table_page + vector * PCI_MSIX_ENTRY_SIZE;
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uint64_t address;
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uint32_t data;
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@ -366,9 +357,8 @@ void msix_notify(PCIDevice *dev, unsigned vector)
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return;
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}
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address = pci_get_long(table_entry + MSIX_MSG_UPPER_ADDR);
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address = (address << 32) | pci_get_long(table_entry + MSIX_MSG_ADDR);
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data = pci_get_long(table_entry + MSIX_MSG_DATA);
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address = pci_get_quad(table_entry + PCI_MSIX_ENTRY_LOWER_ADDR);
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data = pci_get_long(table_entry + PCI_MSIX_ENTRY_DATA);
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stl_phys(address, data);
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}
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