mirror of https://github.com/proxmox/mirror_qemu
target/mips: msa: Split helpers for CLE_<S|U>.<B|H|W|D>
Achieves clearer code and slightly better performance. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1569415572-19635-16-git-send-email-aleksandar.markovic@rt-rk.com>master
parent
ade7e788e1
commit
0501bb1a66
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@ -847,6 +847,16 @@ DEF_HELPER_4(msa_ceq_h, void, env, i32, i32, i32)
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DEF_HELPER_4(msa_ceq_w, void, env, i32, i32, i32)
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DEF_HELPER_4(msa_ceq_d, void, env, i32, i32, i32)
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DEF_HELPER_4(msa_cle_s_b, void, env, i32, i32, i32)
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DEF_HELPER_4(msa_cle_s_h, void, env, i32, i32, i32)
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DEF_HELPER_4(msa_cle_s_w, void, env, i32, i32, i32)
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DEF_HELPER_4(msa_cle_s_d, void, env, i32, i32, i32)
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DEF_HELPER_4(msa_cle_u_b, void, env, i32, i32, i32)
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DEF_HELPER_4(msa_cle_u_h, void, env, i32, i32, i32)
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DEF_HELPER_4(msa_cle_u_w, void, env, i32, i32, i32)
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DEF_HELPER_4(msa_cle_u_d, void, env, i32, i32, i32)
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DEF_HELPER_4(msa_andi_b, void, env, i32, i32, i32)
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DEF_HELPER_4(msa_ori_b, void, env, i32, i32, i32)
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@ -898,8 +908,6 @@ DEF_HELPER_5(msa_max_a_df, void, env, i32, i32, i32, i32)
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DEF_HELPER_5(msa_min_a_df, void, env, i32, i32, i32, i32)
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DEF_HELPER_5(msa_clt_s_df, void, env, i32, i32, i32, i32)
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DEF_HELPER_5(msa_clt_u_df, void, env, i32, i32, i32, i32)
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DEF_HELPER_5(msa_cle_s_df, void, env, i32, i32, i32, i32)
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DEF_HELPER_5(msa_cle_u_df, void, env, i32, i32, i32, i32)
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DEF_HELPER_5(msa_add_a_df, void, env, i32, i32, i32, i32)
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DEF_HELPER_5(msa_adds_a_df, void, env, i32, i32, i32, i32)
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DEF_HELPER_5(msa_adds_s_df, void, env, i32, i32, i32, i32)
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@ -1220,6 +1220,150 @@ void helper_msa_ceq_d(CPUMIPSState *env, uint32_t wd, uint32_t ws, uint32_t wt)
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pwd->d[1] = msa_ceq_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
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}
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static inline int64_t msa_cle_s_df(uint32_t df, int64_t arg1, int64_t arg2)
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{
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return arg1 <= arg2 ? -1 : 0;
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}
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void helper_msa_cle_s_b(CPUMIPSState *env,
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uint32_t wd, uint32_t ws, uint32_t wt)
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{
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wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
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wr_t *pws = &(env->active_fpu.fpr[ws].wr);
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wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
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pwd->b[0] = msa_cle_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
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pwd->b[1] = msa_cle_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
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pwd->b[2] = msa_cle_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
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pwd->b[3] = msa_cle_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
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pwd->b[4] = msa_cle_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
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pwd->b[5] = msa_cle_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
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pwd->b[6] = msa_cle_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
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pwd->b[7] = msa_cle_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
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pwd->b[8] = msa_cle_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
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pwd->b[9] = msa_cle_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
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pwd->b[10] = msa_cle_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
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pwd->b[11] = msa_cle_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
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pwd->b[12] = msa_cle_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
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pwd->b[13] = msa_cle_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
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pwd->b[14] = msa_cle_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
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pwd->b[15] = msa_cle_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
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}
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void helper_msa_cle_s_h(CPUMIPSState *env,
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uint32_t wd, uint32_t ws, uint32_t wt)
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{
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wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
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wr_t *pws = &(env->active_fpu.fpr[ws].wr);
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wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
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pwd->h[0] = msa_cle_s_df(DF_HALF, pws->h[0], pwt->h[0]);
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pwd->h[1] = msa_cle_s_df(DF_HALF, pws->h[1], pwt->h[1]);
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pwd->h[2] = msa_cle_s_df(DF_HALF, pws->h[2], pwt->h[2]);
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pwd->h[3] = msa_cle_s_df(DF_HALF, pws->h[3], pwt->h[3]);
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pwd->h[4] = msa_cle_s_df(DF_HALF, pws->h[4], pwt->h[4]);
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pwd->h[5] = msa_cle_s_df(DF_HALF, pws->h[5], pwt->h[5]);
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pwd->h[6] = msa_cle_s_df(DF_HALF, pws->h[6], pwt->h[6]);
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pwd->h[7] = msa_cle_s_df(DF_HALF, pws->h[7], pwt->h[7]);
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}
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void helper_msa_cle_s_w(CPUMIPSState *env,
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uint32_t wd, uint32_t ws, uint32_t wt)
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{
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wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
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wr_t *pws = &(env->active_fpu.fpr[ws].wr);
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wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
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pwd->w[0] = msa_cle_s_df(DF_WORD, pws->w[0], pwt->w[0]);
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pwd->w[1] = msa_cle_s_df(DF_WORD, pws->w[1], pwt->w[1]);
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pwd->w[2] = msa_cle_s_df(DF_WORD, pws->w[2], pwt->w[2]);
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pwd->w[3] = msa_cle_s_df(DF_WORD, pws->w[3], pwt->w[3]);
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}
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void helper_msa_cle_s_d(CPUMIPSState *env,
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uint32_t wd, uint32_t ws, uint32_t wt)
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{
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wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
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wr_t *pws = &(env->active_fpu.fpr[ws].wr);
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wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
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pwd->d[0] = msa_cle_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
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pwd->d[1] = msa_cle_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
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}
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static inline int64_t msa_cle_u_df(uint32_t df, int64_t arg1, int64_t arg2)
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{
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uint64_t u_arg1 = UNSIGNED(arg1, df);
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uint64_t u_arg2 = UNSIGNED(arg2, df);
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return u_arg1 <= u_arg2 ? -1 : 0;
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}
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void helper_msa_cle_u_b(CPUMIPSState *env,
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uint32_t wd, uint32_t ws, uint32_t wt)
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{
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wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
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wr_t *pws = &(env->active_fpu.fpr[ws].wr);
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wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
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pwd->b[0] = msa_cle_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
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pwd->b[1] = msa_cle_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
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pwd->b[2] = msa_cle_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
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pwd->b[3] = msa_cle_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
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pwd->b[4] = msa_cle_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
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pwd->b[5] = msa_cle_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
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pwd->b[6] = msa_cle_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
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pwd->b[7] = msa_cle_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
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pwd->b[8] = msa_cle_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
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pwd->b[9] = msa_cle_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
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pwd->b[10] = msa_cle_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
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pwd->b[11] = msa_cle_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
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pwd->b[12] = msa_cle_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
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pwd->b[13] = msa_cle_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
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pwd->b[14] = msa_cle_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
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pwd->b[15] = msa_cle_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
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}
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void helper_msa_cle_u_h(CPUMIPSState *env,
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uint32_t wd, uint32_t ws, uint32_t wt)
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{
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wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
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wr_t *pws = &(env->active_fpu.fpr[ws].wr);
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wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
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pwd->h[0] = msa_cle_u_df(DF_HALF, pws->h[0], pwt->h[0]);
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pwd->h[1] = msa_cle_u_df(DF_HALF, pws->h[1], pwt->h[1]);
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pwd->h[2] = msa_cle_u_df(DF_HALF, pws->h[2], pwt->h[2]);
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pwd->h[3] = msa_cle_u_df(DF_HALF, pws->h[3], pwt->h[3]);
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pwd->h[4] = msa_cle_u_df(DF_HALF, pws->h[4], pwt->h[4]);
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pwd->h[5] = msa_cle_u_df(DF_HALF, pws->h[5], pwt->h[5]);
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pwd->h[6] = msa_cle_u_df(DF_HALF, pws->h[6], pwt->h[6]);
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pwd->h[7] = msa_cle_u_df(DF_HALF, pws->h[7], pwt->h[7]);
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}
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void helper_msa_cle_u_w(CPUMIPSState *env,
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uint32_t wd, uint32_t ws, uint32_t wt)
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{
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wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
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wr_t *pws = &(env->active_fpu.fpr[ws].wr);
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wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
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pwd->w[0] = msa_cle_u_df(DF_WORD, pws->w[0], pwt->w[0]);
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pwd->w[1] = msa_cle_u_df(DF_WORD, pws->w[1], pwt->w[1]);
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pwd->w[2] = msa_cle_u_df(DF_WORD, pws->w[2], pwt->w[2]);
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pwd->w[3] = msa_cle_u_df(DF_WORD, pws->w[3], pwt->w[3]);
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}
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void helper_msa_cle_u_d(CPUMIPSState *env,
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uint32_t wd, uint32_t ws, uint32_t wt)
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{
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wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
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wr_t *pws = &(env->active_fpu.fpr[ws].wr);
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wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
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pwd->d[0] = msa_cle_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
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pwd->d[1] = msa_cle_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
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}
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/*
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* Int Divide
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@ -1627,18 +1771,6 @@ static inline int64_t msa_subv_df(uint32_t df, int64_t arg1, int64_t arg2)
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return arg1 - arg2;
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}
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static inline int64_t msa_cle_s_df(uint32_t df, int64_t arg1, int64_t arg2)
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{
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return arg1 <= arg2 ? -1 : 0;
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}
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static inline int64_t msa_cle_u_df(uint32_t df, int64_t arg1, int64_t arg2)
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{
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uint64_t u_arg1 = UNSIGNED(arg1, df);
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uint64_t u_arg2 = UNSIGNED(arg2, df);
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return u_arg1 <= u_arg2 ? -1 : 0;
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}
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static inline int64_t msa_clt_s_df(uint32_t df, int64_t arg1, int64_t arg2)
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{
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return arg1 < arg2 ? -1 : 0;
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@ -2250,8 +2382,6 @@ MSA_BINOP_DF(max_a)
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MSA_BINOP_DF(min_a)
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MSA_BINOP_DF(clt_s)
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MSA_BINOP_DF(clt_u)
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MSA_BINOP_DF(cle_s)
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MSA_BINOP_DF(cle_u)
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MSA_BINOP_DF(add_a)
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MSA_BINOP_DF(adds_a)
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MSA_BINOP_DF(adds_s)
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@ -28546,6 +28546,38 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext *ctx)
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break;
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}
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break;
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case OPC_CLE_S_df:
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switch (df) {
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case DF_BYTE:
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gen_helper_msa_cle_s_b(cpu_env, twd, tws, twt);
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break;
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case DF_HALF:
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gen_helper_msa_cle_s_h(cpu_env, twd, tws, twt);
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break;
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case DF_WORD:
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gen_helper_msa_cle_s_w(cpu_env, twd, tws, twt);
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break;
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case DF_DOUBLE:
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gen_helper_msa_cle_s_d(cpu_env, twd, tws, twt);
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break;
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}
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break;
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case OPC_CLE_U_df:
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switch (df) {
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case DF_BYTE:
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gen_helper_msa_cle_u_b(cpu_env, twd, tws, twt);
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break;
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case DF_HALF:
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gen_helper_msa_cle_u_h(cpu_env, twd, tws, twt);
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break;
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case DF_WORD:
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gen_helper_msa_cle_u_w(cpu_env, twd, tws, twt);
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break;
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case DF_DOUBLE:
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gen_helper_msa_cle_u_d(cpu_env, twd, tws, twt);
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break;
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}
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break;
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case OPC_SLL_df:
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gen_helper_msa_sll_df(cpu_env, tdf, twd, tws, twt);
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break;
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case OPC_MIN_S_df:
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gen_helper_msa_min_s_df(cpu_env, tdf, twd, tws, twt);
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break;
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case OPC_CLE_S_df:
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gen_helper_msa_cle_s_df(cpu_env, tdf, twd, tws, twt);
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break;
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case OPC_ASUB_S_df:
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gen_helper_msa_asub_s_df(cpu_env, tdf, twd, tws, twt);
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break;
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case OPC_MIN_U_df:
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gen_helper_msa_min_u_df(cpu_env, tdf, twd, tws, twt);
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break;
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case OPC_CLE_U_df:
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gen_helper_msa_cle_u_df(cpu_env, tdf, twd, tws, twt);
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break;
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case OPC_ASUB_U_df:
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gen_helper_msa_asub_u_df(cpu_env, tdf, twd, tws, twt);
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break;
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