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target-arm: Fix target_ulong/uint32_t confusions 

Correct a few places that were using uint32_t or a 32 bit
only format string to handle something that should be a target_ulong.

Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378235544-22290-6-git-send-email-peter.maydell@linaro.org
[PMM: split out to separate patch; added gen_goto_tb() and
gen_set_pc_im() dest params to list of things to change.]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
master
Alexander Graf 2013-09-03 20:12:05 +01:00 committed by Peter Maydell
parent 3407ad0e7a
commit 0a2461fa49
2 changed files with 7 additions and 6 deletions
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4
target-arm/cpu.h
View File

@ -823,7 +823,7 @@ static inline bool cpu_has_work(CPUState *cpu)
#include "exec/exec-all.h"
/* Load an instruction and return it in the standard little-endian order */
static inline uint32_t arm_ldl_code(CPUARMState *env, uint32_t addr,
static inline uint32_t arm_ldl_code(CPUARMState *env, target_ulong addr,
bool do_swap)
{
uint32_t insn = cpu_ldl_code(env, addr);
@ -834,7 +834,7 @@ static inline uint32_t arm_ldl_code(CPUARMState *env, uint32_t addr,
}
/* Ditto, for a halfword (Thumb) instruction */
static inline uint16_t arm_lduw_code(CPUARMState *env, uint32_t addr,
static inline uint16_t arm_lduw_code(CPUARMState *env, target_ulong addr,
bool do_swap)
{
uint16_t insn = cpu_lduw_code(env, addr);

9
target-arm/translate.c
View File

@ -905,7 +905,7 @@ DO_GEN_ST(st8)
DO_GEN_ST(st16)
DO_GEN_ST(st32)
static inline void gen_set_pc_im(uint32_t val)
static inline void gen_set_pc_im(target_ulong val)
{
tcg_gen_movi_i32(cpu_R[15], val);
}
@ -3413,7 +3413,7 @@ static int disas_vfp_insn(CPUARMState * env, DisasContext *s, uint32_t insn)
return 0;
}
static inline void gen_goto_tb(DisasContext *s, int n, uint32_t dest)
static inline void gen_goto_tb(DisasContext *s, int n, target_ulong dest)
{
TranslationBlock *tb;
@ -9997,7 +9997,7 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu,
uint16_t *gen_opc_end;
int j, lj;
target_ulong pc_start;
uint32_t next_page_start;
target_ulong next_page_start;
int num_insns;
int max_insns;
@ -10151,7 +10151,8 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu,
}
if (tcg_check_temp_count()) {
fprintf(stderr, "TCG temporary leak before %08x\n", dc->pc);
fprintf(stderr, "TCG temporary leak before "TARGET_FMT_lx"\n",
dc->pc);
}
/* Translation stops when a conditional branch is encountered.