target/m68k: add reset

The instruction traps if the CPU is not in
Supervisor state but the helper is empty because
there is no easy way to reset all the peripherals
without resetting the CPU itself.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20180104012913.30763-12-laurent@vivier.eu>
master
Laurent Vivier 2018-01-04 02:29:07 +01:00
parent f58ed1c50a
commit 0bdb2b3bf5
3 changed files with 24 additions and 0 deletions

View File

@ -711,3 +711,10 @@ void HELPER(set_mac_extu)(CPUM68KState *env, uint32_t val, uint32_t acc)
res |= (uint64_t)(val & 0xffff0000) << 16;
env->macc[acc + 1] = res;
}
#if defined(CONFIG_SOFTMMU)
void HELPER(reset)(CPUM68KState *env)
{
/* FIXME: reset all except CPU */
}
#endif

View File

@ -97,3 +97,7 @@ DEF_HELPER_FLAGS_4(bfffo_mem, TCG_CALL_NO_WG, i64, env, i32, s32, i32)
DEF_HELPER_3(chk, void, env, s32, s32)
DEF_HELPER_4(chk2, void, env, s32, s32, s32)
#if defined(CONFIG_SOFTMMU)
DEF_HELPER_FLAGS_1(reset, TCG_CALL_NO_RWG, void, env)
#endif

View File

@ -2762,6 +2762,18 @@ DISAS_INSN(unlk)
tcg_temp_free(src);
}
#if defined(CONFIG_SOFTMMU)
DISAS_INSN(reset)
{
if (IS_USER(s)) {
gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
return;
}
gen_helper_reset(cpu_env);
}
#endif
DISAS_INSN(nop)
{
}
@ -5572,6 +5584,7 @@ void register_m68k_insns (CPUM68KState *env)
#if defined(CONFIG_SOFTMMU)
INSN(move_to_usp, 4e60, fff8, USP);
INSN(move_from_usp, 4e68, fff8, USP);
INSN(reset, 4e70, ffff, M68000);
BASE(stop, 4e72, ffff);
BASE(rte, 4e73, ffff);
INSN(movec, 4e7b, ffff, CF_ISA_A);