mirror of https://github.com/proxmox/mirror_qemu
ppc/ppc405: Remove taihu machine
It has been deprecated since 7.0. Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220809153904.485018-2-clg@kaod.org> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>master
Cédric Le Goater
Daniel Henrique Barboza
parent
6a1e1ce2ef
commit
1335caf312
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@ -1282,7 +1282,7 @@ F: hw/openrisc/openrisc_sim.c
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PowerPC Machines
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PowerPC Machines
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----------------
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----------------
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405 (ref405ep and taihu)
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405 (ref405ep)
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L: qemu-ppc@nongnu.org
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L: qemu-ppc@nongnu.org
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S: Orphan
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S: Orphan
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F: hw/ppc/ppc405_boards.c
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F: hw/ppc/ppc405_boards.c
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@ -233,15 +233,6 @@ deprecated; use the new name ``dtb-randomness`` instead. The new name
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better reflects the way this property affects all random data within
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better reflects the way this property affects all random data within
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the device tree blob, not just the ``kaslr-seed`` node.
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the device tree blob, not just the ``kaslr-seed`` node.
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PPC 405 ``taihu`` machine (since 7.0)
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'''''''''''''''''''''''''''''''''''''
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The PPC 405 CPU is a system-on-a-chip, so all 405 machines are very similar,
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except for some external periphery. However, the periphery of the ``taihu``
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machine is hardly emulated at all (e.g. neither the LCD nor the USB part had
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been implemented), so there is not much value added by this board. Use the
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``ref405ep`` machine instead.
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``pc-i440fx-1.4`` up to ``pc-i440fx-1.7`` (since 7.0)
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``pc-i440fx-1.4`` up to ``pc-i440fx-1.7`` (since 7.0)
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'''''''''''''''''''''''''''''''''''''''''''''''''''''
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'''''''''''''''''''''''''''''''''''''''''''''''''''''
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@ -668,6 +668,12 @@ Aspeed ``swift-bmc`` machine (removed in 7.0)
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This machine was removed because it was unused. Alternative AST2500 based
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This machine was removed because it was unused. Alternative AST2500 based
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OpenPOWER machines are ``witherspoon-bmc`` and ``romulus-bmc``.
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OpenPOWER machines are ``witherspoon-bmc`` and ``romulus-bmc``.
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ppc ``taihu`` machine (removed in 7.2)
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'''''''''''''''''''''''''''''''''''''''''''''
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This machine was removed because it was partially emulated and 405
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machines are very similar. Use the ``ref405ep`` machine instead.
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linux-user mode CPUs
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linux-user mode CPUs
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--------------------
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--------------------
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@ -6,5 +6,4 @@ Embedded family boards
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- ``ppce500`` generic paravirt e500 platform
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- ``ppce500`` generic paravirt e500 platform
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- ``ref405ep`` ref405ep
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- ``ref405ep`` ref405ep
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- ``sam460ex`` aCube Sam460ex
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- ``sam460ex`` aCube Sam460ex
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- ``taihu`` taihu
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- ``virtex-ml507`` Xilinx Virtex ML507 reference design
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- ``virtex-ml507`` Xilinx Virtex ML507 reference design
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@ -342,241 +342,9 @@ static const TypeInfo ref405ep_type = {
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.class_init = ref405ep_class_init,
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.class_init = ref405ep_class_init,
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};
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};
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/*****************************************************************************/
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/* AMCC Taihu evaluation board */
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/* - PowerPC 405EP processor
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* - SDRAM 128 MB at 0x00000000
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* - Boot flash 2 MB at 0xFFE00000
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* - Application flash 32 MB at 0xFC000000
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* - 2 serial ports
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* - 2 ethernet PHY
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* - 1 USB 1.1 device 0x50000000
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* - 1 LCD display 0x50100000
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* - 1 CPLD 0x50100000
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* - 1 I2C EEPROM
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* - 1 I2C thermal sensor
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* - a set of LEDs
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* - bit-bang SPI port using GPIOs
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* - 1 EBC interface connector 0 0x50200000
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* - 1 cardbus controller + expansion slot.
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* - 1 PCI expansion slot.
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*/
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typedef struct taihu_cpld_t taihu_cpld_t;
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struct taihu_cpld_t {
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uint8_t reg0;
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uint8_t reg1;
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};
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static uint64_t taihu_cpld_read(void *opaque, hwaddr addr, unsigned size)
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{
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taihu_cpld_t *cpld;
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uint32_t ret;
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cpld = opaque;
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switch (addr) {
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case 0x0:
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ret = cpld->reg0;
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break;
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case 0x1:
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ret = cpld->reg1;
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break;
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default:
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ret = 0;
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break;
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}
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return ret;
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}
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static void taihu_cpld_write(void *opaque, hwaddr addr,
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uint64_t value, unsigned size)
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{
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taihu_cpld_t *cpld;
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cpld = opaque;
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switch (addr) {
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case 0x0:
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/* Read only */
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break;
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case 0x1:
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cpld->reg1 = value;
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break;
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default:
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break;
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}
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}
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static const MemoryRegionOps taihu_cpld_ops = {
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.read = taihu_cpld_read,
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.write = taihu_cpld_write,
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.impl = {
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.min_access_size = 1,
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.max_access_size = 1,
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},
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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static void taihu_cpld_reset (void *opaque)
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{
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taihu_cpld_t *cpld;
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cpld = opaque;
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cpld->reg0 = 0x01;
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cpld->reg1 = 0x80;
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}
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static void taihu_cpld_init(MemoryRegion *sysmem, uint32_t base)
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{
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taihu_cpld_t *cpld;
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MemoryRegion *cpld_memory = g_new(MemoryRegion, 1);
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cpld = g_new0(taihu_cpld_t, 1);
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memory_region_init_io(cpld_memory, NULL, &taihu_cpld_ops, cpld, "cpld", 0x100);
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memory_region_add_subregion(sysmem, base, cpld_memory);
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qemu_register_reset(&taihu_cpld_reset, cpld);
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}
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static void taihu_405ep_init(MachineState *machine)
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{
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MachineClass *mc = MACHINE_GET_CLASS(machine);
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const char *bios_name = machine->firmware ?: BIOS_FILENAME;
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const char *kernel_filename = machine->kernel_filename;
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const char *initrd_filename = machine->initrd_filename;
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char *filename;
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MemoryRegion *sysmem = get_system_memory();
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MemoryRegion *bios;
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MemoryRegion *ram_memories = g_new(MemoryRegion, 2);
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hwaddr ram_bases[2], ram_sizes[2];
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long bios_size;
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target_ulong kernel_base, initrd_base;
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long kernel_size, initrd_size;
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int linux_boot;
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int fl_idx;
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DriveInfo *dinfo;
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DeviceState *uicdev;
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if (machine->ram_size != mc->default_ram_size) {
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char *sz = size_to_str(mc->default_ram_size);
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error_report("Invalid RAM size, should be %s", sz);
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g_free(sz);
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exit(EXIT_FAILURE);
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}
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ram_bases[0] = 0;
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ram_sizes[0] = 0x04000000;
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memory_region_init_alias(&ram_memories[0], NULL,
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"taihu_405ep.ram-0", machine->ram, ram_bases[0],
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ram_sizes[0]);
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ram_bases[1] = 0x04000000;
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ram_sizes[1] = 0x04000000;
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memory_region_init_alias(&ram_memories[1], NULL,
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"taihu_405ep.ram-1", machine->ram, ram_bases[1],
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ram_sizes[1]);
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ppc405ep_init(sysmem, ram_memories, ram_bases, ram_sizes,
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33333333, &uicdev, kernel_filename == NULL ? 0 : 1);
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/* allocate and load BIOS */
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fl_idx = 0;
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#if defined(USE_FLASH_BIOS)
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dinfo = drive_get(IF_PFLASH, 0, fl_idx);
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if (dinfo) {
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bios_size = 2 * MiB;
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pflash_cfi02_register(0xFFE00000,
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"taihu_405ep.bios", bios_size,
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blk_by_legacy_dinfo(dinfo),
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64 * KiB, 1,
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4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
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1);
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fl_idx++;
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} else
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#endif
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{
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bios = g_new(MemoryRegion, 1);
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memory_region_init_rom(bios, NULL, "taihu_405ep.bios", BIOS_SIZE,
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&error_fatal);
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filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
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if (filename) {
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bios_size = load_image_size(filename,
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memory_region_get_ram_ptr(bios),
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BIOS_SIZE);
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g_free(filename);
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if (bios_size < 0) {
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error_report("Could not load PowerPC BIOS '%s'", bios_name);
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exit(1);
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}
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bios_size = (bios_size + 0xfff) & ~0xfff;
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memory_region_add_subregion(sysmem, (uint32_t)(-bios_size), bios);
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} else if (!qtest_enabled()) {
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error_report("Could not load PowerPC BIOS '%s'", bios_name);
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exit(1);
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}
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}
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/* Register Linux flash */
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dinfo = drive_get(IF_PFLASH, 0, fl_idx);
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if (dinfo) {
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bios_size = 32 * MiB;
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pflash_cfi02_register(0xfc000000, "taihu_405ep.flash", bios_size,
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blk_by_legacy_dinfo(dinfo),
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64 * KiB, 1,
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4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
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1);
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fl_idx++;
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}
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/* Register CLPD & LCD display */
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taihu_cpld_init(sysmem, 0x50100000);
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/* Load kernel */
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linux_boot = (kernel_filename != NULL);
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if (linux_boot) {
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kernel_base = KERNEL_LOAD_ADDR;
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/* now we can load the kernel */
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kernel_size = load_image_targphys(kernel_filename, kernel_base,
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machine->ram_size - kernel_base);
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if (kernel_size < 0) {
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error_report("could not load kernel '%s'", kernel_filename);
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exit(1);
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}
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/* load initrd */
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if (initrd_filename) {
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initrd_base = INITRD_LOAD_ADDR;
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initrd_size = load_image_targphys(initrd_filename, initrd_base,
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machine->ram_size - initrd_base);
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if (initrd_size < 0) {
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error_report("could not load initial ram disk '%s'",
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initrd_filename);
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exit(1);
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}
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} else {
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initrd_base = 0;
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initrd_size = 0;
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}
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} else {
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kernel_base = 0;
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kernel_size = 0;
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initrd_base = 0;
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initrd_size = 0;
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}
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}
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static void taihu_class_init(ObjectClass *oc, void *data)
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{
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MachineClass *mc = MACHINE_CLASS(oc);
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mc->desc = "taihu";
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mc->init = taihu_405ep_init;
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mc->default_ram_size = 0x08000000;
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mc->default_ram_id = "taihu_405ep.ram";
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mc->deprecation_reason = "incomplete, use 'ref405ep' instead";
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}
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static const TypeInfo taihu_type = {
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.name = MACHINE_TYPE_NAME("taihu"),
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.parent = TYPE_MACHINE,
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.class_init = taihu_class_init,
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};
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static void ppc405_machine_init(void)
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static void ppc405_machine_init(void)
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{
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{
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type_register_static(&ref405ep_type);
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type_register_static(&ref405ep_type);
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type_register_static(&taihu_type);
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}
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}
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type_init(ppc405_machine_init)
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type_init(ppc405_machine_init)
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