mirror of https://github.com/proxmox/mirror_qemu
target-i386: Disable HLE and RTM on Haswell & Broadwell
All Haswell CPUs and some Broadwell CPUs were updated by Intel to have the HLE and RTM features disabled. This will prevent "-cpu Haswell,enforce" and "-cpu Broadwell,enforce" from running out of the box on those CPUs. Disable those features by default on Broadwell and Haswell CPU models, starting on pc-*-2.3. Users who want to use those features can enable them explicitly on the command-line. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>master
parent
80fd48df4a
commit
13704e4c45
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@ -328,6 +328,10 @@ static void pc_compat_2_2(MachineState *machine)
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x86_cpu_compat_set_features("Haswell", FEAT_1_ECX, 0, CPUID_EXT_RDRAND);
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x86_cpu_compat_set_features("Haswell", FEAT_1_ECX, 0, CPUID_EXT_RDRAND);
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x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, 0, CPUID_EXT_F16C);
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x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, 0, CPUID_EXT_F16C);
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x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, 0, CPUID_EXT_RDRAND);
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x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, 0, CPUID_EXT_RDRAND);
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x86_cpu_compat_set_features("Haswell", FEAT_7_0_EBX,
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CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_RTM, 0);
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x86_cpu_compat_set_features("Broadwell", FEAT_7_0_EBX,
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CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_RTM, 0);
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}
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}
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static void pc_compat_2_1(MachineState *machine)
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static void pc_compat_2_1(MachineState *machine)
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@ -307,6 +307,10 @@ static void pc_compat_2_2(MachineState *machine)
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x86_cpu_compat_set_features("Haswell", FEAT_1_ECX, 0, CPUID_EXT_RDRAND);
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x86_cpu_compat_set_features("Haswell", FEAT_1_ECX, 0, CPUID_EXT_RDRAND);
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x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, 0, CPUID_EXT_F16C);
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x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, 0, CPUID_EXT_F16C);
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x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, 0, CPUID_EXT_RDRAND);
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x86_cpu_compat_set_features("Broadwell", FEAT_1_ECX, 0, CPUID_EXT_RDRAND);
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x86_cpu_compat_set_features("Haswell", FEAT_7_0_EBX,
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CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_RTM, 0);
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x86_cpu_compat_set_features("Broadwell", FEAT_7_0_EBX,
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CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_RTM, 0);
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}
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}
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static void pc_compat_2_1(MachineState *machine)
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static void pc_compat_2_1(MachineState *machine)
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@ -1100,9 +1100,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
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CPUID_EXT3_LAHF_LM,
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CPUID_EXT3_LAHF_LM,
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.features[FEAT_7_0_EBX] =
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.features[FEAT_7_0_EBX] =
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CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
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CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
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CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
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CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
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CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID |
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CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID,
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CPUID_7_0_EBX_RTM,
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.features[FEAT_XSAVE] =
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.features[FEAT_XSAVE] =
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CPUID_XSAVE_XSAVEOPT,
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CPUID_XSAVE_XSAVEOPT,
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.xlevel = 0x8000000A,
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.xlevel = 0x8000000A,
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@ -1135,9 +1134,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
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CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH,
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CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH,
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.features[FEAT_7_0_EBX] =
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.features[FEAT_7_0_EBX] =
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CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
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CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
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CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
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CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
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CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID |
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CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID |
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CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX |
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CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX |
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CPUID_7_0_EBX_SMAP,
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CPUID_7_0_EBX_SMAP,
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.features[FEAT_XSAVE] =
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.features[FEAT_XSAVE] =
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CPUID_XSAVE_XSAVEOPT,
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CPUID_XSAVE_XSAVEOPT,
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