linux-user/riscv: Adjust vdso signal frame cfa offsets

A typo in sizeof_reg put the registers at the wrong offset.

Simplify the expressions to use positive addresses from the
start of uc_mcontext instead of negative addresses from the
end of uc_mcontext.

Reported-by: Vineet Gupta <vineetg@rivosinc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
master
Richard Henderson 2024-01-13 09:02:38 +11:00
parent c1ddc18f37
commit 1b21fe27e7
3 changed files with 4 additions and 4 deletions

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@ -101,12 +101,12 @@ endf __vdso_flush_icache
.cfi_startproc simple
.cfi_signal_frame
#define sizeof_reg (__riscv_xlen / 4)
#define sizeof_reg (__riscv_xlen / 8)
#define sizeof_freg 8
#define B_GR (offsetof_uc_mcontext - sizeof_rt_sigframe)
#define B_FR (offsetof_uc_mcontext - sizeof_rt_sigframe + offsetof_freg0)
#define B_GR 0
#define B_FR offsetof_freg0
.cfi_def_cfa 2, sizeof_rt_sigframe
.cfi_def_cfa 2, offsetof_uc_mcontext
/* Return address */
.cfi_return_column 64