From 2cf3eb6df552cee74b52de9989e270b74e42847e Mon Sep 17 00:00:00 2001 From: Fabien Chouteau Date: Fri, 29 Mar 2013 02:06:27 +0000 Subject: [PATCH] PPC: Remove env->hreset_excp_prefix This value is not needed if we use correctly the MSR[IP] bit. excp_prefix is always 0x00000000, except when the MSR[IP] bit is implemented and set to 1, in that case excp_prefix is 0xfff00000. The handling of MSR[IP] was already implemented but not used at reset because the value of env->msr was changed "manually". The patch uses the function hreg_store_msr() to set env->msr, this ensures a good handling of MSR[IP] at reset, and therefore a good value for excp_prefix. Signed-off-by: Fabien Chouteau Signed-off-by: Alexander Graf --- hw/ppc/spapr.c | 6 ++++-- target-ppc/cpu.h | 1 - target-ppc/machine.c | 2 -- target-ppc/translate_init.c | 42 +++++++++++-------------------------- 4 files changed, 16 insertions(+), 35 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 7a425011da..e35c26f577 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -801,8 +801,10 @@ static void ppc_spapr_init(QEMUMachineInitArgs *args) /* Set time-base frequency to 512 MHz */ cpu_ppc_tb_init(env, TIMEBASE_FREQ); - /* PAPR always has exception vectors in RAM not ROM */ - env->hreset_excp_prefix = 0; + /* PAPR always has exception vectors in RAM not ROM. To ensure this, + * MSR[IP] should never be set. + */ + env->msr_mask &= ~(1 << 6); /* Tell KVM that we're in PAPR mode */ if (kvm_enabled()) { diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 42c36e2829..99ebf7e16a 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1026,7 +1026,6 @@ struct CPUPPCState { /* Exception vectors */ target_ulong excp_vectors[POWERPC_EXCP_NB]; target_ulong excp_prefix; - target_ulong hreset_excp_prefix; target_ulong ivor_mask; target_ulong ivpr_mask; target_ulong hreset_vector; diff --git a/target-ppc/machine.c b/target-ppc/machine.c index 235b0d5f49..2d10adb60d 100644 --- a/target-ppc/machine.c +++ b/target-ppc/machine.c @@ -78,7 +78,6 @@ void cpu_save(QEMUFile *f, void *opaque) for (i = 0; i < POWERPC_EXCP_NB; i++) qemu_put_betls(f, &env->excp_vectors[i]); qemu_put_betls(f, &env->excp_prefix); - qemu_put_betls(f, &env->hreset_excp_prefix); qemu_put_betls(f, &env->ivor_mask); qemu_put_betls(f, &env->ivpr_mask); qemu_put_betls(f, &env->hreset_vector); @@ -167,7 +166,6 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id) for (i = 0; i < POWERPC_EXCP_NB; i++) qemu_get_betls(f, &env->excp_vectors[i]); qemu_get_betls(f, &env->excp_prefix); - qemu_get_betls(f, &env->hreset_excp_prefix); qemu_get_betls(f, &env->ivor_mask); qemu_get_betls(f, &env->ivpr_mask); qemu_get_betls(f, &env->hreset_vector); diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index aea7d2753e..402ad2a93c 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -2593,7 +2593,6 @@ static void init_excp_4xx_real (CPUPPCState *env) env->excp_vectors[POWERPC_EXCP_FIT] = 0x00001010; env->excp_vectors[POWERPC_EXCP_WDT] = 0x00001020; env->excp_vectors[POWERPC_EXCP_DEBUG] = 0x00002000; - env->hreset_excp_prefix = 0x00000000UL; env->ivor_mask = 0x0000FFF0UL; env->ivpr_mask = 0xFFFF0000UL; /* Hardware reset vector */ @@ -2618,7 +2617,6 @@ static void init_excp_4xx_softmmu (CPUPPCState *env) env->excp_vectors[POWERPC_EXCP_DTLB] = 0x00001100; env->excp_vectors[POWERPC_EXCP_ITLB] = 0x00001200; env->excp_vectors[POWERPC_EXCP_DEBUG] = 0x00002000; - env->hreset_excp_prefix = 0x00000000UL; env->ivor_mask = 0x0000FFF0UL; env->ivpr_mask = 0xFFFF0000UL; /* Hardware reset vector */ @@ -2644,7 +2642,6 @@ static void init_excp_MPC5xx (CPUPPCState *env) env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001C00; env->excp_vectors[POWERPC_EXCP_MEXTBR] = 0x00001E00; env->excp_vectors[POWERPC_EXCP_NMEXTBR] = 0x00001F00; - env->hreset_excp_prefix = 0x00000000UL; env->ivor_mask = 0x0000FFF0UL; env->ivpr_mask = 0xFFFF0000UL; /* Hardware reset vector */ @@ -2676,7 +2673,6 @@ static void init_excp_MPC8xx (CPUPPCState *env) env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001C00; env->excp_vectors[POWERPC_EXCP_MEXTBR] = 0x00001E00; env->excp_vectors[POWERPC_EXCP_NMEXTBR] = 0x00001F00; - env->hreset_excp_prefix = 0x00000000UL; env->ivor_mask = 0x0000FFF0UL; env->ivpr_mask = 0xFFFF0000UL; /* Hardware reset vector */ @@ -2704,7 +2700,6 @@ static void init_excp_G2 (CPUPPCState *env) env->excp_vectors[POWERPC_EXCP_DSTLB] = 0x00001200; env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300; env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400; - env->hreset_excp_prefix = 0x00000000UL; /* Hardware reset vector */ env->hreset_vector = 0xFFFFFFFCUL; #endif @@ -2733,7 +2728,6 @@ static void init_excp_e200(CPUPPCState *env, target_ulong ivpr_mask) env->excp_vectors[POWERPC_EXCP_SPEU] = 0x00000000; env->excp_vectors[POWERPC_EXCP_EFPDI] = 0x00000000; env->excp_vectors[POWERPC_EXCP_EFPRI] = 0x00000000; - env->hreset_excp_prefix = 0x00000000UL; env->ivor_mask = 0x0000FFF7UL; env->ivpr_mask = ivpr_mask; /* Hardware reset vector */ @@ -2760,7 +2754,6 @@ static void init_excp_BookE (CPUPPCState *env) env->excp_vectors[POWERPC_EXCP_DTLB] = 0x00000000; env->excp_vectors[POWERPC_EXCP_ITLB] = 0x00000000; env->excp_vectors[POWERPC_EXCP_DEBUG] = 0x00000000; - env->hreset_excp_prefix = 0x00000000UL; env->ivor_mask = 0x0000FFE0UL; env->ivpr_mask = 0xFFFF0000UL; /* Hardware reset vector */ @@ -2783,7 +2776,6 @@ static void init_excp_601 (CPUPPCState *env) env->excp_vectors[POWERPC_EXCP_IO] = 0x00000A00; env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00; env->excp_vectors[POWERPC_EXCP_RUNM] = 0x00002000; - env->hreset_excp_prefix = 0xFFF00000UL; /* Hardware reset vector */ env->hreset_vector = 0x00000100UL; #endif @@ -2811,7 +2803,6 @@ static void init_excp_602 (CPUPPCState *env) env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400; env->excp_vectors[POWERPC_EXCP_WDT] = 0x00001500; env->excp_vectors[POWERPC_EXCP_EMUL] = 0x00001600; - env->hreset_excp_prefix = 0xFFF00000UL; /* Hardware reset vector */ env->hreset_vector = 0xFFFFFFFCUL; #endif @@ -2836,7 +2827,6 @@ static void init_excp_603 (CPUPPCState *env) env->excp_vectors[POWERPC_EXCP_DSTLB] = 0x00001200; env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300; env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400; - env->hreset_excp_prefix = 0x00000000UL; /* Hardware reset vector */ env->hreset_vector = 0xFFFFFFFCUL; #endif @@ -2859,7 +2849,6 @@ static void init_excp_604 (CPUPPCState *env) env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00; env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300; env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400; - env->hreset_excp_prefix = 0xFFF00000UL; /* Hardware reset vector */ env->hreset_vector = 0x00000100UL; #endif @@ -2883,7 +2872,6 @@ static void init_excp_7x0 (CPUPPCState *env) env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300; env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400; env->excp_vectors[POWERPC_EXCP_THERM] = 0x00001700; - env->hreset_excp_prefix = 0x00000000UL; /* Hardware reset vector */ env->hreset_vector = 0xFFFFFFFCUL; #endif @@ -2906,7 +2894,6 @@ static void init_excp_750cl (CPUPPCState *env) env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00; env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300; env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400; - env->hreset_excp_prefix = 0x00000000UL; /* Hardware reset vector */ env->hreset_vector = 0xFFFFFFFCUL; #endif @@ -2929,7 +2916,6 @@ static void init_excp_750cx (CPUPPCState *env) env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00; env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300; env->excp_vectors[POWERPC_EXCP_THERM] = 0x00001700; - env->hreset_excp_prefix = 0x00000000UL; /* Hardware reset vector */ env->hreset_vector = 0xFFFFFFFCUL; #endif @@ -2957,7 +2943,6 @@ static void init_excp_7x5 (CPUPPCState *env) env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300; env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400; env->excp_vectors[POWERPC_EXCP_THERM] = 0x00001700; - env->hreset_excp_prefix = 0x00000000UL; /* Hardware reset vector */ env->hreset_vector = 0xFFFFFFFCUL; #endif @@ -2983,7 +2968,6 @@ static void init_excp_7400 (CPUPPCState *env) env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400; env->excp_vectors[POWERPC_EXCP_VPUA] = 0x00001600; env->excp_vectors[POWERPC_EXCP_THERM] = 0x00001700; - env->hreset_excp_prefix = 0x00000000UL; /* Hardware reset vector */ env->hreset_vector = 0xFFFFFFFCUL; #endif @@ -3011,7 +2995,6 @@ static void init_excp_7450 (CPUPPCState *env) env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300; env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400; env->excp_vectors[POWERPC_EXCP_VPUA] = 0x00001600; - env->hreset_excp_prefix = 0x00000000UL; /* Hardware reset vector */ env->hreset_vector = 0xFFFFFFFCUL; #endif @@ -3041,7 +3024,6 @@ static void init_excp_970 (CPUPPCState *env) env->excp_vectors[POWERPC_EXCP_MAINT] = 0x00001600; env->excp_vectors[POWERPC_EXCP_VPUA] = 0x00001700; env->excp_vectors[POWERPC_EXCP_THERM] = 0x00001800; - env->hreset_excp_prefix = 0x00000000FFF00000ULL; /* Hardware reset vector */ env->hreset_vector = 0x0000000000000100ULL; #endif @@ -3070,7 +3052,6 @@ static void init_excp_POWER7 (CPUPPCState *env) env->excp_vectors[POWERPC_EXCP_MAINT] = 0x00001600; env->excp_vectors[POWERPC_EXCP_VPUA] = 0x00001700; env->excp_vectors[POWERPC_EXCP_THERM] = 0x00001800; - env->hreset_excp_prefix = 0; /* Hardware reset vector */ env->hreset_vector = 0x0000000000000100ULL; #endif @@ -7043,7 +7024,6 @@ static void init_ppc_proc(PowerPCCPU *cpu) /* Set all exception vectors to an invalid address */ for (i = 0; i < POWERPC_EXCP_NB; i++) env->excp_vectors[i] = (target_ulong)(-1ULL); - env->hreset_excp_prefix = 0x00000000; env->ivor_mask = 0x00000000; env->ivpr_mask = 0x00000000; /* Default MMU definitions */ @@ -7080,9 +7060,7 @@ static void init_ppc_proc(PowerPCCPU *cpu) } /* PowerPC implementation specific initialisations (SPRs, timers, ...) */ (*pcc->init_proc)(env); -#if !defined(CONFIG_USER_ONLY) - env->excp_prefix = env->hreset_excp_prefix; -#endif + /* MSR bits & flags consistency checks */ if (env->msr_mask & (1 << 25)) { switch (env->flags & (POWERPC_FLAG_SPE | POWERPC_FLAG_VRE)) { @@ -8182,19 +8160,23 @@ static void ppc_cpu_reset(CPUState *s) msr |= (target_ulong)1 << MSR_VR; /* Allow altivec usage */ msr |= (target_ulong)1 << MSR_SPE; /* Allow SPE usage */ msr |= (target_ulong)1 << MSR_PR; -#else - env->excp_prefix = env->hreset_excp_prefix; - env->nip = env->hreset_vector | env->excp_prefix; - if (env->mmu_model != POWERPC_MMU_REAL) { - ppc_tlb_invalidate_all(env); - } #endif - env->msr = msr & env->msr_mask; + #if defined(TARGET_PPC64) if (env->mmu_model & POWERPC_MMU_64) { env->msr |= (1ULL << MSR_SF); } #endif + + hreg_store_msr(env, msr, 1); + +#if !defined(CONFIG_USER_ONLY) + env->nip = env->hreset_vector | env->excp_prefix; + if (env->mmu_model != POWERPC_MMU_REAL) { + ppc_tlb_invalidate_all(env); + } +#endif + hreg_compute_hflags(env); env->reserve_addr = (target_ulong)-1ULL; /* Be sure no exception or interrupt is pending */