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target/loongarch: Update gdb_set_fpu() and gdb_get_fpu() 

GDB LoongArch fpu use fcc register, update gdb_set_fpu()
and gdb_get_fpu() to match it.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220805033523.1416837-6-gaosong@loongson.cn>
master
Song Gao 2022-08-05 11:35:23 +08:00 committed by Richard Henderson
parent d182c39000
commit 2f149c759f
3 changed files with 32 additions and 29 deletions
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24
linux-user/loongarch64/signal.c
View File

@ -71,26 +71,6 @@ struct extctx_layout {
struct ctx_layout end;
};
/* The kernel's sc_save_fcc macro is a sequence of MOVCF2GR+BSTRINS. */
static uint64_t read_all_fcc(CPULoongArchState *env)
{
uint64_t ret = 0;
for (int i = 0; i < 8; ++i) {
ret |= (uint64_t)env->cf[i] << (i * 8);
}
return ret;
}
/* The kernel's sc_restore_fcc macro is a sequence of BSTRPICK+MOVGR2CF. */
static void write_all_fcc(CPULoongArchState *env, uint64_t val)
{
for (int i = 0; i < 8; ++i) {
env->cf[i] = (val >> (i * 8)) & 1;
}
}
static abi_ptr extframe_alloc(struct extctx_layout *extctx,
struct ctx_layout *sctx, unsigned size,
unsigned align, abi_ptr orig_sp)
@ -150,7 +130,7 @@ static void setup_sigframe(CPULoongArchState *env,
for (i = 0; i < 32; ++i) {
__put_user(env->fpr[i], &fpu_ctx->regs[i]);
}
__put_user(read_all_fcc(env), &fpu_ctx->fcc);
__put_user(read_fcc(env), &fpu_ctx->fcc);
__put_user(env->fcsr0, &fpu_ctx->fcsr);
/*
@ -216,7 +196,7 @@ static void restore_sigframe(CPULoongArchState *env,
__get_user(env->fpr[i], &fpu_ctx->regs[i]);
}
__get_user(fcc, &fpu_ctx->fcc);
write_all_fcc(env, fcc);
write_fcc(env, fcc);
__get_user(env->fcsr0, &fpu_ctx->fcsr);
restore_fp_status(env);
}

34
target/loongarch/gdbstub.c
View File

@ -11,6 +11,24 @@
#include "internals.h"
#include "exec/gdbstub.h"
uint64_t read_fcc(CPULoongArchState *env)
{
uint64_t ret = 0;
for (int i = 0; i < 8; ++i) {
ret |= (uint64_t)env->cf[i] << (i * 8);
}
return ret;
}
void write_fcc(CPULoongArchState *env, uint64_t val)
{
for (int i = 0; i < 8; ++i) {
env->cf[i] = (val >> (i * 8)) & 1;
}
}
int loongarch_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
LoongArchCPU *cpu = LOONGARCH_CPU(cs);
@ -51,9 +69,10 @@ static int loongarch_gdb_get_fpu(CPULoongArchState *env,
{
if (0 <= n && n < 32) {
return gdb_get_reg64(mem_buf, env->fpr[n]);
} else if (32 <= n && n < 40) {
return gdb_get_reg8(mem_buf, env->cf[n - 32]);
} else if (n == 40) {
} else if (n == 32) {
uint64_t val = read_fcc(env);
return gdb_get_reg64(mem_buf, val);
} else if (n == 33) {
return gdb_get_reg32(mem_buf, env->fcsr0);
}
return 0;
@ -67,10 +86,11 @@ static int loongarch_gdb_set_fpu(CPULoongArchState *env,
if (0 <= n && n < 32) {
env->fpr[n] = ldq_p(mem_buf);
length = 8;
} else if (32 <= n && n < 40) {
env->cf[n - 32] = ldub_p(mem_buf);
length = 1;
} else if (n == 40) {
} else if (n == 32) {
uint64_t val = ldq_p(mem_buf);
write_fcc(env, val);
length = 8;
} else if (n == 33) {
env->fcsr0 = ldl_p(mem_buf);
length = 4;
}

3
target/loongarch/internals.h
View File

@ -51,6 +51,9 @@ bool loongarch_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
hwaddr loongarch_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
#endif /* !CONFIG_USER_ONLY */
uint64_t read_fcc(CPULoongArchState *env);
void write_fcc(CPULoongArchState *env, uint64_t val);
int loongarch_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n);
int loongarch_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n);
void loongarch_cpu_register_gdb_regs_for_features(CPUState *cs);