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fdc: Convert isabus_fdc_init1 to MemoryRegion 

This requires some amount of hoop-jumping, so that we don't
inadvertently claim port 0x3f6, which is used by ISA IDE.

The sysbus initialization path is as yet unconverted.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Avi Kivity <avi@redhat.com>
master
Richard Henderson 2011-08-10 15:28:20 -07:00 committed by Avi Kivity
parent a941ae4515
commit 2f290a8c3d
1 changed files with 33 additions and 20 deletions
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53
hw/fdc.c
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@ -424,6 +424,7 @@ typedef struct FDCtrlSysBus {
typedef struct FDCtrlISABus {
ISADevice busdev;
MemoryRegion io_0, io_7;
struct FDCtrl state;
int32_t bootindexA;
int32_t bootindexB;
@ -489,16 +490,6 @@ static void fdctrl_write (void *opaque, uint32_t reg, uint32_t value)
}
}
static uint32_t fdctrl_read_port (void *opaque, uint32_t reg)
{
return fdctrl_read(opaque, reg & 7);
}
static void fdctrl_write_port (void *opaque, uint32_t reg, uint32_t value)
{
fdctrl_write(opaque, reg & 7, value);
}
static uint32_t fdctrl_read_mem (void *opaque, target_phys_addr_t reg)
{
return fdctrl_read(opaque, (uint32_t)reg);
@ -1889,6 +1880,34 @@ static int fdctrl_init_common(FDCtrl *fdctrl)
return fdctrl_connect_drives(fdctrl);
}
static uint32_t fdctrl_read_port_7(void *opaque, uint32_t reg)
{
return fdctrl_read(opaque, reg + 7);
}
static void fdctrl_write_port_7(void *opaque, uint32_t reg, uint32_t value)
{
fdctrl_write(opaque, reg + 7, value);
}
static const MemoryRegionPortio fdc_portio_0[] = {
{ 1, 5, 1, .read = fdctrl_read, .write = fdctrl_write },
PORTIO_END_OF_LIST()
};
static const MemoryRegionPortio fdc_portio_7[] = {
{ 0, 1, 1, .read = fdctrl_read_port_7, .write = fdctrl_write_port_7 },
PORTIO_END_OF_LIST()
};
static const MemoryRegionOps fdc_ioport_0_ops = {
.old_portio = fdc_portio_0
};
static const MemoryRegionOps fdc_ioport_7_ops = {
.old_portio = fdc_portio_7
};
static int isabus_fdc_init1(ISADevice *dev)
{
FDCtrlISABus *isa = DO_UPCAST(FDCtrlISABus, busdev, dev);
@ -1898,16 +1917,10 @@ static int isabus_fdc_init1(ISADevice *dev)
int dma_chann = 2;
int ret;
register_ioport_read(iobase + 0x01, 5, 1,
&fdctrl_read_port, fdctrl);
register_ioport_read(iobase + 0x07, 1, 1,
&fdctrl_read_port, fdctrl);
register_ioport_write(iobase + 0x01, 5, 1,
&fdctrl_write_port, fdctrl);
register_ioport_write(iobase + 0x07, 1, 1,
&fdctrl_write_port, fdctrl);
isa_init_ioport_range(dev, iobase, 6);
isa_init_ioport(dev, iobase + 7);
memory_region_init_io(&isa->io_0, &fdc_ioport_0_ops, fdctrl, "fdc", 6);
memory_region_init_io(&isa->io_7, &fdc_ioport_7_ops, fdctrl, "fdc", 1);
isa_register_ioport(dev, &isa->io_0, iobase);
isa_register_ioport(dev, &isa->io_7, iobase + 7);
isa_init_irq(&isa->busdev, &fdctrl->irq, isairq);
fdctrl->dma_chann = dma_chann;