mirror of https://github.com/proxmox/mirror_qemu
target-ppc: fix TCGv type in fcmpu/fcmpo
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6044 c046a42c-6fe2-441c-8c8c-71466251a162master
parent
71e991fdfa
commit
330c483bbf
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@ -2249,7 +2249,7 @@ GEN_FLOAT_B(rim, 0x08, 0x0F, 1, PPC_FLOAT_EXT);
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/* fcmpo */
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/* fcmpo */
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GEN_HANDLER(fcmpo, 0x3F, 0x00, 0x01, 0x00600001, PPC_FLOAT)
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GEN_HANDLER(fcmpo, 0x3F, 0x00, 0x01, 0x00600001, PPC_FLOAT)
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{
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{
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TCGv crf;
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TCGv_i32 crf;
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if (unlikely(!ctx->fpu_enabled)) {
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if (unlikely(!ctx->fpu_enabled)) {
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gen_exception(ctx, POWERPC_EXCP_FPU);
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gen_exception(ctx, POWERPC_EXCP_FPU);
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return;
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return;
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@ -2257,14 +2257,14 @@ GEN_HANDLER(fcmpo, 0x3F, 0x00, 0x01, 0x00600001, PPC_FLOAT)
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gen_reset_fpstatus();
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gen_reset_fpstatus();
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crf = tcg_const_i32(crfD(ctx->opcode));
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crf = tcg_const_i32(crfD(ctx->opcode));
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gen_helper_fcmpo(cpu_fpr[rA(ctx->opcode)], cpu_fpr[rB(ctx->opcode)], crf);
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gen_helper_fcmpo(cpu_fpr[rA(ctx->opcode)], cpu_fpr[rB(ctx->opcode)], crf);
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tcg_temp_free(crf);
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tcg_temp_free_i32(crf);
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gen_helper_float_check_status();
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gen_helper_float_check_status();
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}
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}
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/* fcmpu */
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/* fcmpu */
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GEN_HANDLER(fcmpu, 0x3F, 0x00, 0x00, 0x00600001, PPC_FLOAT)
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GEN_HANDLER(fcmpu, 0x3F, 0x00, 0x00, 0x00600001, PPC_FLOAT)
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{
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{
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TCGv crf;
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TCGv_i32 crf;
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if (unlikely(!ctx->fpu_enabled)) {
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if (unlikely(!ctx->fpu_enabled)) {
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gen_exception(ctx, POWERPC_EXCP_FPU);
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gen_exception(ctx, POWERPC_EXCP_FPU);
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return;
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return;
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@ -2272,7 +2272,7 @@ GEN_HANDLER(fcmpu, 0x3F, 0x00, 0x00, 0x00600001, PPC_FLOAT)
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gen_reset_fpstatus();
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gen_reset_fpstatus();
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crf = tcg_const_i32(crfD(ctx->opcode));
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crf = tcg_const_i32(crfD(ctx->opcode));
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gen_helper_fcmpu(cpu_fpr[rA(ctx->opcode)], cpu_fpr[rB(ctx->opcode)], crf);
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gen_helper_fcmpu(cpu_fpr[rA(ctx->opcode)], cpu_fpr[rB(ctx->opcode)], crf);
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tcg_temp_free(crf);
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tcg_temp_free_i32(crf);
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gen_helper_float_check_status();
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gen_helper_float_check_status();
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}
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}
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