target/ppc: make power8-pmu.c CONFIG_TCG only

This is an exclusive TCG helper. Gating it with CONFIG_TCG and changing
meson.build accordingly will prevent problems --disable-tcg and
--disable-linux-user later on.

We're also changing the uses of !kvm_enabled() to tcg_enabled() to avoid
adding "defined(CONFIG_TCG)" ifdefs, since tcg_enabled() will be
defaulted to false with --disable-tcg and the block will always be
skipped.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220225101140.1054160-2-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
master
Daniel Henrique Barboza 2022-03-02 06:51:36 +01:00 committed by Cédric Le Goater
parent 6e7b967503
commit 33edcde7c8
4 changed files with 16 additions and 14 deletions

View File

@ -5698,12 +5698,10 @@ static void register_power9_mmu_sprs(CPUPPCState *env)
*/
static void init_tcg_pmu_power8(CPUPPCState *env)
{
#if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY)
/* Init PMU overflow timers */
if (!kvm_enabled()) {
if (tcg_enabled()) {
cpu_ppc_pmu_init(env);
}
#endif
}
static void init_proc_book3s_common(CPUPPCState *env)
@ -7167,14 +7165,14 @@ static void ppc_cpu_reset(DeviceState *dev)
#if !defined(CONFIG_USER_ONLY)
env->nip = env->hreset_vector | env->excp_prefix;
#if defined(CONFIG_TCG)
if (env->mmu_model != POWERPC_MMU_REAL) {
ppc_tlb_invalidate_all(env);
}
#endif /* CONFIG_TCG */
#endif
pmu_update_summaries(env);
if (tcg_enabled()) {
if (env->mmu_model != POWERPC_MMU_REAL) {
ppc_tlb_invalidate_all(env);
}
pmu_update_summaries(env);
}
#endif
hreg_compute_hflags(env);
env->reserve_addr = (target_ulong)-1ULL;
/* Be sure no exception or interrupt is pending */

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@ -2,6 +2,7 @@
#include "cpu.h"
#include "exec/exec-all.h"
#include "sysemu/kvm.h"
#include "sysemu/tcg.h"
#include "helper_regs.h"
#include "mmu-hash64.h"
#include "migration/cpu.h"
@ -20,7 +21,10 @@ static void post_load_update_msr(CPUPPCState *env)
*/
env->msr ^= env->msr_mask & ~((1ULL << MSR_TGPR) | MSR_HVB);
ppc_store_msr(env, msr);
pmu_update_summaries(env);
if (tcg_enabled()) {
pmu_update_summaries(env);
}
}
static int get_avr(QEMUFile *f, void *pv, size_t size,

View File

@ -16,6 +16,7 @@ ppc_ss.add(when: 'CONFIG_TCG', if_true: files(
'misc_helper.c',
'timebase_helper.c',
'translate.c',
'power8-pmu.c',
))
ppc_ss.add(libdecnumber)
@ -51,7 +52,6 @@ ppc_softmmu_ss.add(when: 'TARGET_PPC64', if_true: files(
'mmu-book3s-v3.c',
'mmu-hash64.c',
'mmu-radix64.c',
'power8-pmu.c',
))
target_arch += {'ppc': ppc_ss}

View File

@ -13,11 +13,11 @@
#ifndef POWER8_PMU
#define POWER8_PMU
void cpu_ppc_pmu_init(CPUPPCState *env);
#if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY)
void cpu_ppc_pmu_init(CPUPPCState *env);
void pmu_update_summaries(CPUPPCState *env);
#else
static inline void cpu_ppc_pmu_init(CPUPPCState *env) { }
static inline void pmu_update_summaries(CPUPPCState *env) { }
#endif