mirror of https://github.com/proxmox/mirror_qemu
vga: fix CVE-2016-3712 regression, misc virtio-gpu fixes.
-----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABAgAGBQJXQvfiAAoJEEy22O7T6HE4yRgQAMeruiyvY3g0pGoxPnXIJUH/ RwFMKJgMgDqpHDDyNH4MEaA7B7Qf1kymoVVwnWClL8ZVy5WFmsXa3EvtQxIHvchk 7bCY7bQxp+yDenj53u5r9hHaMPC8kFd/TMK8ahWIIGA1kUJ+6UziW5ii5rRVop01 fpCyeG8iwAX/byVFx06e4CpIX03kjkVZBsfA+QAzq42ydX7c1UfN+DhCg7CIgclg h3LfhgwRdJqYOUD/ipgTlaatusLhDcLx5bEVNV3hpqizy83+ngJeTykF8OdEVKlV xTbSofx4NRFKBmjOBGhAYCBIzrG7kYu5Fdlekf6Ysk9eUS40VBUxwXg85dOwTDer ZnSW9IMoZlHX9dQrV8zhQwyj8fL7CvHf8924jcCiI1glhHslbLe1nAs5XgjCktCl BRDGgzO+Vzy3ja+0ZM4kuB63MeCwZOxZ4YgLIt6zZXKooyVhtpwaOH0NZbfZGzHu WvZCAVOYwGjjQGlgi6fBHhAD5gT+wAaA7Jt160fHTkOUanJAsJuw4lwFZz40+uMu jTiqPM5EGuIi90syhE4hBK39X20zXWkm1IxygSWlByhy29Q/bNwwx8D46acwCu4d 1FdrqJCM5J8q12tLLTYCQUjsD07/z2XawNs8Ls35vVMwHOli+M3L8+VsPRR83Kqx bLrKw/1xgwH0qQo2uGZe =1iTR -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/kraxel/tags/pull-vga-20160523-1' into staging vga: fix CVE-2016-3712 regression, misc virtio-gpu fixes. # gpg: Signature made Mon 23 May 2016 13:30:26 BST using RSA key ID D3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" * remotes/kraxel/tags/pull-vga-20160523-1: vga: add sr_vbe register set virtio-gpu: fix ui idx check virtio-gpu: use VIRTIO_GPU_MAX_SCANOUTS virtio-gpu: check max_outputs only virtio-gpu: check max_outputs value virtio-vga: propagate on gpu realized error virtio-gpu: check early scanout id Signed-off-by: Peter Maydell <peter.maydell@linaro.org>master
commit
38629bf5e4
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@ -149,6 +149,11 @@ static inline bool vbe_enabled(VGACommonState *s)
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return s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED;
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}
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static inline uint8_t sr(VGACommonState *s, int idx)
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{
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return vbe_enabled(s) ? s->sr_vbe[idx] : s->sr[idx];
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}
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static void vga_update_memory_access(VGACommonState *s)
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{
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hwaddr base, offset, size;
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@ -163,8 +168,8 @@ static void vga_update_memory_access(VGACommonState *s)
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s->has_chain4_alias = false;
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s->plane_updated = 0xf;
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}
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if ((s->sr[VGA_SEQ_PLANE_WRITE] & VGA_SR02_ALL_PLANES) ==
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VGA_SR02_ALL_PLANES && s->sr[VGA_SEQ_MEMORY_MODE] & VGA_SR04_CHN_4M) {
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if ((sr(s, VGA_SEQ_PLANE_WRITE) & VGA_SR02_ALL_PLANES) ==
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VGA_SR02_ALL_PLANES && sr(s, VGA_SEQ_MEMORY_MODE) & VGA_SR04_CHN_4M) {
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offset = 0;
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switch ((s->gr[VGA_GFX_MISC] >> 2) & 3) {
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case 0:
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@ -234,7 +239,7 @@ static void vga_precise_update_retrace_info(VGACommonState *s)
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((s->cr[VGA_CRTC_OVERFLOW] >> 6) & 2)) << 8);
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vretr_end_line = s->cr[VGA_CRTC_V_SYNC_END] & 0xf;
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clocking_mode = (s->sr[VGA_SEQ_CLOCK_MODE] >> 3) & 1;
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clocking_mode = (sr(s, VGA_SEQ_CLOCK_MODE) >> 3) & 1;
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clock_sel = (s->msr >> 2) & 3;
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dots = (s->msr & 1) ? 8 : 9;
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@ -486,7 +491,6 @@ void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val)
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printf("vga: write SR%x = 0x%02x\n", s->sr_index, val);
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#endif
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s->sr[s->sr_index] = val & sr_mask[s->sr_index];
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vbe_update_vgaregs(s);
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if (s->sr_index == VGA_SEQ_CLOCK_MODE) {
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s->update_retrace_info(s);
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}
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@ -680,13 +684,13 @@ static void vbe_update_vgaregs(VGACommonState *s)
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if (s->vbe_regs[VBE_DISPI_INDEX_BPP] == 4) {
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shift_control = 0;
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s->sr[VGA_SEQ_CLOCK_MODE] &= ~8; /* no double line */
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s->sr_vbe[VGA_SEQ_CLOCK_MODE] &= ~8; /* no double line */
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} else {
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shift_control = 2;
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/* set chain 4 mode */
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s->sr[VGA_SEQ_MEMORY_MODE] |= VGA_SR04_CHN_4M;
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s->sr_vbe[VGA_SEQ_MEMORY_MODE] |= VGA_SR04_CHN_4M;
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/* activate all planes */
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s->sr[VGA_SEQ_PLANE_WRITE] |= VGA_SR02_ALL_PLANES;
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s->sr_vbe[VGA_SEQ_PLANE_WRITE] |= VGA_SR02_ALL_PLANES;
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}
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s->gr[VGA_GFX_MODE] = (s->gr[VGA_GFX_MODE] & ~0x60) |
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(shift_control << 5);
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@ -836,7 +840,7 @@ uint32_t vga_mem_readb(VGACommonState *s, hwaddr addr)
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break;
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}
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if (s->sr[VGA_SEQ_MEMORY_MODE] & VGA_SR04_CHN_4M) {
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if (sr(s, VGA_SEQ_MEMORY_MODE) & VGA_SR04_CHN_4M) {
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/* chain 4 mode : simplest access */
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assert(addr < s->vram_size);
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ret = s->vram_ptr[addr];
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@ -904,11 +908,11 @@ void vga_mem_writeb(VGACommonState *s, hwaddr addr, uint32_t val)
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break;
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}
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if (s->sr[VGA_SEQ_MEMORY_MODE] & VGA_SR04_CHN_4M) {
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if (sr(s, VGA_SEQ_MEMORY_MODE) & VGA_SR04_CHN_4M) {
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/* chain 4 mode : simplest access */
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plane = addr & 3;
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mask = (1 << plane);
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if (s->sr[VGA_SEQ_PLANE_WRITE] & mask) {
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if (sr(s, VGA_SEQ_PLANE_WRITE) & mask) {
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assert(addr < s->vram_size);
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s->vram_ptr[addr] = val;
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#ifdef DEBUG_VGA_MEM
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@ -921,7 +925,7 @@ void vga_mem_writeb(VGACommonState *s, hwaddr addr, uint32_t val)
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/* odd/even mode (aka text mode mapping) */
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plane = (s->gr[VGA_GFX_PLANE_READ] & 2) | (addr & 1);
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mask = (1 << plane);
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if (s->sr[VGA_SEQ_PLANE_WRITE] & mask) {
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if (sr(s, VGA_SEQ_PLANE_WRITE) & mask) {
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addr = ((addr & ~1) << 1) | plane;
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if (addr >= s->vram_size) {
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return;
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@ -996,7 +1000,7 @@ void vga_mem_writeb(VGACommonState *s, hwaddr addr, uint32_t val)
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do_write:
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/* mask data according to sr[2] */
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mask = s->sr[VGA_SEQ_PLANE_WRITE];
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mask = sr(s, VGA_SEQ_PLANE_WRITE);
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s->plane_updated |= mask; /* only used to detect font change */
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write_mask = mask16[mask];
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if (addr * sizeof(uint32_t) >= s->vram_size) {
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@ -1152,10 +1156,10 @@ static void vga_get_text_resolution(VGACommonState *s, int *pwidth, int *pheight
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/* total width & height */
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cheight = (s->cr[VGA_CRTC_MAX_SCAN] & 0x1f) + 1;
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cwidth = 8;
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if (!(s->sr[VGA_SEQ_CLOCK_MODE] & VGA_SR01_CHAR_CLK_8DOTS)) {
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if (!(sr(s, VGA_SEQ_CLOCK_MODE) & VGA_SR01_CHAR_CLK_8DOTS)) {
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cwidth = 9;
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}
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if (s->sr[VGA_SEQ_CLOCK_MODE] & 0x08) {
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if (sr(s, VGA_SEQ_CLOCK_MODE) & 0x08) {
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cwidth = 16; /* NOTE: no 18 pixel wide */
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}
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width = (s->cr[VGA_CRTC_H_DISP] + 1);
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@ -1197,7 +1201,7 @@ static void vga_draw_text(VGACommonState *s, int full_update)
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int64_t now = qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL);
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/* compute font data address (in plane 2) */
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v = s->sr[VGA_SEQ_CHARACTER_MAP];
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v = sr(s, VGA_SEQ_CHARACTER_MAP);
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offset = (((v >> 4) & 1) | ((v << 1) & 6)) * 8192 * 4 + 2;
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if (offset != s->font_offsets[0]) {
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s->font_offsets[0] = offset;
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@ -1506,11 +1510,11 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
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}
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if (shift_control == 0) {
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if (s->sr[VGA_SEQ_CLOCK_MODE] & 8) {
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if (sr(s, VGA_SEQ_CLOCK_MODE) & 8) {
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disp_width <<= 1;
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}
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} else if (shift_control == 1) {
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if (s->sr[VGA_SEQ_CLOCK_MODE] & 8) {
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if (sr(s, VGA_SEQ_CLOCK_MODE) & 8) {
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disp_width <<= 1;
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}
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}
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@ -1574,7 +1578,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
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if (shift_control == 0) {
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full_update |= update_palette16(s);
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if (s->sr[VGA_SEQ_CLOCK_MODE] & 8) {
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if (sr(s, VGA_SEQ_CLOCK_MODE) & 8) {
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v = VGA_DRAW_LINE4D2;
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} else {
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v = VGA_DRAW_LINE4;
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@ -1582,7 +1586,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
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bits = 4;
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} else if (shift_control == 1) {
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full_update |= update_palette16(s);
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if (s->sr[VGA_SEQ_CLOCK_MODE] & 8) {
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if (sr(s, VGA_SEQ_CLOCK_MODE) & 8) {
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v = VGA_DRAW_LINE2D2;
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} else {
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v = VGA_DRAW_LINE2;
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@ -1629,7 +1633,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
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#if 0
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printf("w=%d h=%d v=%d line_offset=%d cr[0x09]=0x%02x cr[0x17]=0x%02x linecmp=%d sr[0x01]=0x%02x\n",
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width, height, v, line_offset, s->cr[9], s->cr[VGA_CRTC_MODE],
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s->line_compare, s->sr[VGA_SEQ_CLOCK_MODE]);
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s->line_compare, sr(s, VGA_SEQ_CLOCK_MODE));
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#endif
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addr1 = (s->start_addr * 4);
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bwidth = (width * bits + 7) / 8;
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@ -1781,6 +1785,7 @@ void vga_common_reset(VGACommonState *s)
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{
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s->sr_index = 0;
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memset(s->sr, '\0', sizeof(s->sr));
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memset(s->sr_vbe, '\0', sizeof(s->sr_vbe));
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s->gr_index = 0;
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memset(s->gr, '\0', sizeof(s->gr));
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s->ar_index = 0;
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@ -1883,10 +1888,10 @@ static void vga_update_text(void *opaque, console_ch_t *chardata)
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/* total width & height */
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cheight = (s->cr[VGA_CRTC_MAX_SCAN] & 0x1f) + 1;
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cw = 8;
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if (!(s->sr[VGA_SEQ_CLOCK_MODE] & VGA_SR01_CHAR_CLK_8DOTS)) {
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if (!(sr(s, VGA_SEQ_CLOCK_MODE) & VGA_SR01_CHAR_CLK_8DOTS)) {
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cw = 9;
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}
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if (s->sr[VGA_SEQ_CLOCK_MODE] & 0x08) {
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if (sr(s, VGA_SEQ_CLOCK_MODE) & 0x08) {
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cw = 16; /* NOTE: no 18 pixel wide */
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}
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width = (s->cr[VGA_CRTC_H_DISP] + 1);
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@ -2053,6 +2058,7 @@ static int vga_common_post_load(void *opaque, int version_id)
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/* force refresh */
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s->graphic_mode = -1;
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vbe_update_vgaregs(s);
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return 0;
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}
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@ -98,6 +98,7 @@ typedef struct VGACommonState {
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MemoryRegion chain4_alias;
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uint8_t sr_index;
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uint8_t sr[256];
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uint8_t sr_vbe[256];
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uint8_t gr_index;
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uint8_t gr[256];
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uint8_t ar_index;
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@ -17,6 +17,7 @@
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#include "trace.h"
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#include "hw/virtio/virtio.h"
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#include "hw/virtio/virtio-gpu.h"
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#include "qapi/error.h"
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#ifdef CONFIG_VIRGL
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@ -127,7 +128,7 @@ static void virgl_cmd_resource_flush(VirtIOGPU *g,
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trace_virtio_gpu_cmd_res_flush(rf.resource_id,
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rf.r.width, rf.r.height, rf.r.x, rf.r.y);
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for (i = 0; i < VIRTIO_GPU_MAX_SCANOUT; i++) {
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for (i = 0; i < g->conf.max_outputs; i++) {
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if (g->scanout[i].resource_id != rf.resource_id) {
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continue;
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}
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@ -146,7 +147,7 @@ static void virgl_cmd_set_scanout(VirtIOGPU *g,
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trace_virtio_gpu_cmd_set_scanout(ss.scanout_id, ss.resource_id,
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ss.r.width, ss.r.height, ss.r.x, ss.r.y);
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if (ss.scanout_id >= VIRTIO_GPU_MAX_SCANOUT) {
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if (ss.scanout_id >= g->conf.max_outputs) {
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qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal scanout id specified %d",
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__func__, ss.scanout_id);
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cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID;
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@ -20,6 +20,7 @@
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#include "hw/virtio/virtio-gpu.h"
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#include "hw/virtio/virtio-bus.h"
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#include "qemu/log.h"
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#include "qapi/error.h"
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static struct virtio_gpu_simple_resource*
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virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id);
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@ -465,7 +466,7 @@ static void virtio_gpu_resource_flush(VirtIOGPU *g,
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pixman_region_init_rect(&flush_region,
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rf.r.x, rf.r.y, rf.r.width, rf.r.height);
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for (i = 0; i < VIRTIO_GPU_MAX_SCANOUT; i++) {
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for (i = 0; i < g->conf.max_outputs; i++) {
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struct virtio_gpu_scanout *scanout;
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pixman_region16_t region, finalregion;
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pixman_box16_t *extents;
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@ -508,6 +509,13 @@ static void virtio_gpu_set_scanout(VirtIOGPU *g,
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trace_virtio_gpu_cmd_set_scanout(ss.scanout_id, ss.resource_id,
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ss.r.width, ss.r.height, ss.r.x, ss.r.y);
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if (ss.scanout_id >= g->conf.max_outputs) {
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qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal scanout id specified %d",
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__func__, ss.scanout_id);
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cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID;
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return;
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}
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g->enable = 1;
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if (ss.resource_id == 0) {
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scanout = &g->scanout[ss.scanout_id];
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@ -517,8 +525,7 @@ static void virtio_gpu_set_scanout(VirtIOGPU *g,
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res->scanout_bitmask &= ~(1 << ss.scanout_id);
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}
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}
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if (ss.scanout_id == 0 ||
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ss.scanout_id >= g->conf.max_outputs) {
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if (ss.scanout_id == 0) {
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qemu_log_mask(LOG_GUEST_ERROR,
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"%s: illegal scanout id specified %d",
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__func__, ss.scanout_id);
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@ -533,14 +540,6 @@ static void virtio_gpu_set_scanout(VirtIOGPU *g,
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}
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/* create a surface for this scanout */
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if (ss.scanout_id >= VIRTIO_GPU_MAX_SCANOUT ||
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ss.scanout_id >= g->conf.max_outputs) {
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qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal scanout id specified %d",
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__func__, ss.scanout_id);
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cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID;
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return;
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}
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res = virtio_gpu_find_resource(g, ss.resource_id);
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if (!res) {
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qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n",
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@ -880,7 +879,7 @@ static int virtio_gpu_ui_info(void *opaque, uint32_t idx, QemuUIInfo *info)
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{
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VirtIOGPU *g = opaque;
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if (idx > g->conf.max_outputs) {
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if (idx >= g->conf.max_outputs) {
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return -1;
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}
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@ -930,6 +929,11 @@ static void virtio_gpu_device_realize(DeviceState *qdev, Error **errp)
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bool have_virgl;
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int i;
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if (g->conf.max_outputs > VIRTIO_GPU_MAX_SCANOUTS) {
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error_setg(errp, "invalid max_outputs > %d", VIRTIO_GPU_MAX_SCANOUTS);
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return;
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}
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g->config_size = sizeof(struct virtio_gpu_config);
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g->virtio_config.num_scanouts = g->conf.max_outputs;
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virtio_init(VIRTIO_DEVICE(g), "virtio-gpu", VIRTIO_ID_GPU,
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@ -4,6 +4,7 @@
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#include "ui/console.h"
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#include "vga_int.h"
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#include "hw/virtio/virtio-pci.h"
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#include "qapi/error.h"
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/*
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* virtio-vga: This extends VirtioPCIProxy.
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@ -89,6 +90,7 @@ static void virtio_vga_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
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VirtIOVGA *vvga = VIRTIO_VGA(vpci_dev);
|
||||
VirtIOGPU *g = &vvga->vdev;
|
||||
VGACommonState *vga = &vvga->vga;
|
||||
Error *err = NULL;
|
||||
uint32_t offset;
|
||||
int i;
|
||||
|
||||
|
@ -124,7 +126,11 @@ static void virtio_vga_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
|
|||
/* force virtio-1.0 */
|
||||
vpci_dev->flags &= ~VIRTIO_PCI_FLAG_DISABLE_MODERN;
|
||||
vpci_dev->flags |= VIRTIO_PCI_FLAG_DISABLE_LEGACY;
|
||||
object_property_set_bool(OBJECT(g), true, "realized", errp);
|
||||
object_property_set_bool(OBJECT(g), true, "realized", &err);
|
||||
if (err) {
|
||||
error_propagate(errp, err);
|
||||
return;
|
||||
}
|
||||
|
||||
/* add stdvga mmio regions */
|
||||
pci_std_vga_mmio_region_init(vga, &vpci_dev->modern_bar,
|
||||
|
|
|
@ -27,8 +27,6 @@
|
|||
|
||||
#define VIRTIO_ID_GPU 16
|
||||
|
||||
#define VIRTIO_GPU_MAX_SCANOUT 4
|
||||
|
||||
struct virtio_gpu_simple_resource {
|
||||
uint32_t resource_id;
|
||||
uint32_t width;
|
||||
|
@ -98,8 +96,8 @@ typedef struct VirtIOGPU {
|
|||
QTAILQ_HEAD(, virtio_gpu_ctrl_command) cmdq;
|
||||
QTAILQ_HEAD(, virtio_gpu_ctrl_command) fenceq;
|
||||
|
||||
struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUT];
|
||||
struct virtio_gpu_requested_state req_state[VIRTIO_GPU_MAX_SCANOUT];
|
||||
struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS];
|
||||
struct virtio_gpu_requested_state req_state[VIRTIO_GPU_MAX_SCANOUTS];
|
||||
|
||||
struct virtio_gpu_conf conf;
|
||||
int enabled_output_bitmask;
|
||||
|
|
Loading…
Reference in New Issue