mirror of https://github.com/proxmox/mirror_qemu
target/arm: Implement FEAT_PACQARMA3
Implement the QARMA3 cryptographic algorithm for PAC calculation. Implement a cpu feature to select the algorithm and document it. Signed-off-by: Aaron Lindsay <aaron@os.amperecomputing.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230829232335.965414-6-richard.henderson@linaro.org Message-Id: <20230609172324.982888-4-aaron@os.amperecomputing.com> [rth: Merge cpu feature addition from another patch.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>master
Richard Henderson
Peter Maydell
parent
6c3427eec5
commit
399e5e7125
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@ -210,15 +210,20 @@ TCG VCPU Features
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TCG VCPU features are CPU features that are specific to TCG.
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Below is the list of TCG VCPU features and their descriptions.
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``pauth-impdef``
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When ``FEAT_Pauth`` is enabled, either the *impdef* (Implementation
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Defined) algorithm is enabled or the *architected* QARMA algorithm
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is enabled. By default the impdef algorithm is disabled, and QARMA
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is enabled.
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``pauth``
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Enable or disable ``FEAT_Pauth`` entirely.
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The architected QARMA algorithm has good cryptographic properties,
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but can be quite slow to emulate. The impdef algorithm used by QEMU
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is non-cryptographic but significantly faster.
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``pauth-impdef``
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When ``pauth`` is enabled, select the QEMU implementation defined algorithm.
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``pauth-qarma3``
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When ``pauth`` is enabled, select the architected QARMA3 algorithm.
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Without either ``pauth-impdef`` or ``pauth-qarma3`` enabled,
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the architected QARMA5 algorithm is used. The architected QARMA5
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and QARMA3 algorithms have good cryptographic properties, but can
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be quite slow to emulate. The impdef algorithm used by QEMU is
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non-cryptographic but significantly faster.
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SVE CPU Properties
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==================
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@ -57,6 +57,9 @@ the following architecture extensions:
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- FEAT_MTE (Memory Tagging Extension)
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- FEAT_MTE2 (Memory Tagging Extension)
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- FEAT_MTE3 (MTE Asymmetric Fault Handling)
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- FEAT_PACIMP (Pointer authentication - IMPLEMENTATION DEFINED algorithm)
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- FEAT_PACQARMA3 (Pointer authentication - QARMA3 algorithm)
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- FEAT_PACQARMA5 (Pointer authentication - QARMA5 algorithm)
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- FEAT_PAN (Privileged access never)
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- FEAT_PAN2 (AT S1E1R and AT S1E1W instruction variants affected by PSTATE.PAN)
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- FEAT_PAN3 (Support for SCTLR_ELx.EPAN)
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@ -95,7 +95,7 @@ static const char *cpu_model_advertised_features[] = {
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"sve640", "sve768", "sve896", "sve1024", "sve1152", "sve1280",
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"sve1408", "sve1536", "sve1664", "sve1792", "sve1920", "sve2048",
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"kvm-no-adjvtime", "kvm-steal-time",
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"pauth", "pauth-impdef",
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"pauth", "pauth-impdef", "pauth-qarma3",
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NULL
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};
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@ -1072,6 +1072,7 @@ struct ArchCPU {
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*/
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bool prop_pauth;
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bool prop_pauth_impdef;
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bool prop_pauth_qarma3;
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bool prop_lpa2;
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/* DCZ blocksize, in log_2(words), ie low 4 bits of DCZID_EL0 */
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@ -474,7 +474,7 @@ void aarch64_add_sme_properties(Object *obj)
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void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp)
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{
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ARMPauthFeature features = cpu_isar_feature(pauth_feature, cpu);
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uint64_t isar1;
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uint64_t isar1, isar2;
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/*
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* These properties enable or disable Pauth as a whole, or change
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@ -490,6 +490,10 @@ void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp)
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isar1 = FIELD_DP64(isar1, ID_AA64ISAR1, API, 0);
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isar1 = FIELD_DP64(isar1, ID_AA64ISAR1, GPI, 0);
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isar2 = cpu->isar.id_aa64isar2;
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isar2 = FIELD_DP64(isar2, ID_AA64ISAR2, APA3, 0);
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isar2 = FIELD_DP64(isar2, ID_AA64ISAR2, GPA3, 0);
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if (kvm_enabled() || hvf_enabled()) {
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/*
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* Exit early if PAuth is enabled and fall through to disable it.
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@ -510,26 +514,39 @@ void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp)
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}
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if (cpu->prop_pauth) {
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if (cpu->prop_pauth_impdef && cpu->prop_pauth_qarma3) {
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error_setg(errp,
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"cannot enable both pauth-impdef and pauth-qarma3");
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return;
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}
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if (cpu->prop_pauth_impdef) {
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isar1 = FIELD_DP64(isar1, ID_AA64ISAR1, API, features);
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isar1 = FIELD_DP64(isar1, ID_AA64ISAR1, GPI, 1);
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} else if (cpu->prop_pauth_qarma3) {
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isar2 = FIELD_DP64(isar2, ID_AA64ISAR2, APA3, features);
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isar2 = FIELD_DP64(isar2, ID_AA64ISAR2, GPA3, 1);
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} else {
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isar1 = FIELD_DP64(isar1, ID_AA64ISAR1, APA, features);
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isar1 = FIELD_DP64(isar1, ID_AA64ISAR1, GPA, 1);
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}
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} else if (cpu->prop_pauth_impdef) {
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error_setg(errp, "cannot enable pauth-impdef without pauth");
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} else if (cpu->prop_pauth_impdef || cpu->prop_pauth_qarma3) {
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error_setg(errp, "cannot enable pauth-impdef or "
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"pauth-qarma3 without pauth");
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error_append_hint(errp, "Add pauth=on to the CPU property list.\n");
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}
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}
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cpu->isar.id_aa64isar1 = isar1;
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cpu->isar.id_aa64isar2 = isar2;
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}
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static Property arm_cpu_pauth_property =
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DEFINE_PROP_BOOL("pauth", ARMCPU, prop_pauth, true);
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static Property arm_cpu_pauth_impdef_property =
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DEFINE_PROP_BOOL("pauth-impdef", ARMCPU, prop_pauth_impdef, false);
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static Property arm_cpu_pauth_qarma3_property =
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DEFINE_PROP_BOOL("pauth-qarma3", ARMCPU, prop_pauth_qarma3, false);
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void aarch64_add_pauth_properties(Object *obj)
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{
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@ -549,6 +566,7 @@ void aarch64_add_pauth_properties(Object *obj)
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cpu->prop_pauth = cpu_isar_feature(aa64_pauth, cpu);
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} else {
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qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_impdef_property);
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qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_qarma3_property);
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}
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}
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@ -96,6 +96,21 @@ static uint64_t pac_sub(uint64_t i)
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return o;
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}
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static uint64_t pac_sub1(uint64_t i)
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{
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static const uint8_t sub1[16] = {
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0xa, 0xd, 0xe, 0x6, 0xf, 0x7, 0x3, 0x5,
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0x9, 0x8, 0x0, 0xc, 0xb, 0x1, 0x2, 0x4,
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};
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uint64_t o = 0;
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int b;
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for (b = 0; b < 64; b += 4) {
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o |= (uint64_t)sub1[(i >> b) & 0xf] << b;
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}
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return o;
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}
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static uint64_t pac_inv_sub(uint64_t i)
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{
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static const uint8_t inv_sub[16] = {
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@ -209,7 +224,7 @@ static uint64_t tweak_inv_shuffle(uint64_t i)
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}
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static uint64_t pauth_computepac_architected(uint64_t data, uint64_t modifier,
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ARMPACKey key)
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ARMPACKey key, bool isqarma3)
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{
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static const uint64_t RC[5] = {
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0x0000000000000000ull,
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@ -219,6 +234,7 @@ static uint64_t pauth_computepac_architected(uint64_t data, uint64_t modifier,
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0x452821E638D01377ull,
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};
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const uint64_t alpha = 0xC0AC29B7C97C50DDull;
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int iterations = isqarma3 ? 2 : 4;
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/*
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* Note that in the ARM pseudocode, key0 contains bits <127:64>
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* and key1 contains bits <63:0> of the 128-bit key.
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@ -231,7 +247,7 @@ static uint64_t pauth_computepac_architected(uint64_t data, uint64_t modifier,
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runningmod = modifier;
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workingval = data ^ key0;
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for (i = 0; i <= 4; ++i) {
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for (i = 0; i <= iterations; ++i) {
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roundkey = key1 ^ runningmod;
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workingval ^= roundkey;
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workingval ^= RC[i];
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@ -239,32 +255,48 @@ static uint64_t pauth_computepac_architected(uint64_t data, uint64_t modifier,
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workingval = pac_cell_shuffle(workingval);
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workingval = pac_mult(workingval);
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}
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workingval = pac_sub(workingval);
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if (isqarma3) {
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workingval = pac_sub1(workingval);
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} else {
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workingval = pac_sub(workingval);
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}
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runningmod = tweak_shuffle(runningmod);
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}
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roundkey = modk0 ^ runningmod;
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workingval ^= roundkey;
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workingval = pac_cell_shuffle(workingval);
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workingval = pac_mult(workingval);
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workingval = pac_sub(workingval);
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if (isqarma3) {
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workingval = pac_sub1(workingval);
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} else {
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workingval = pac_sub(workingval);
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}
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workingval = pac_cell_shuffle(workingval);
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workingval = pac_mult(workingval);
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workingval ^= key1;
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workingval = pac_cell_inv_shuffle(workingval);
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workingval = pac_inv_sub(workingval);
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if (isqarma3) {
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workingval = pac_sub1(workingval);
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} else {
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workingval = pac_inv_sub(workingval);
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}
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workingval = pac_mult(workingval);
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workingval = pac_cell_inv_shuffle(workingval);
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workingval ^= key0;
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workingval ^= runningmod;
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for (i = 0; i <= 4; ++i) {
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workingval = pac_inv_sub(workingval);
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if (i < 4) {
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for (i = 0; i <= iterations; ++i) {
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if (isqarma3) {
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workingval = pac_sub1(workingval);
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} else {
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workingval = pac_inv_sub(workingval);
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}
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if (i < iterations) {
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workingval = pac_mult(workingval);
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workingval = pac_cell_inv_shuffle(workingval);
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}
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runningmod = tweak_inv_shuffle(runningmod);
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roundkey = key1 ^ runningmod;
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workingval ^= RC[4 - i];
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workingval ^= RC[iterations - i];
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workingval ^= roundkey;
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workingval ^= alpha;
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}
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@ -283,7 +315,9 @@ static uint64_t pauth_computepac(CPUARMState *env, uint64_t data,
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uint64_t modifier, ARMPACKey key)
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{
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if (cpu_isar_feature(aa64_pauth_qarma5, env_archcpu(env))) {
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return pauth_computepac_architected(data, modifier, key);
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return pauth_computepac_architected(data, modifier, key, false);
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} else if (cpu_isar_feature(aa64_pauth_qarma3, env_archcpu(env))) {
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return pauth_computepac_architected(data, modifier, key, true);
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} else {
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return pauth_computepac_impdef(data, modifier, key);
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}
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@ -417,12 +417,22 @@ static void pauth_tests_default(QTestState *qts, const char *cpu_type)
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{
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assert_has_feature_enabled(qts, cpu_type, "pauth");
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assert_has_feature_disabled(qts, cpu_type, "pauth-impdef");
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assert_has_feature_disabled(qts, cpu_type, "pauth-qarma3");
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assert_set_feature(qts, cpu_type, "pauth", false);
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assert_set_feature(qts, cpu_type, "pauth", true);
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assert_set_feature(qts, cpu_type, "pauth-impdef", true);
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assert_set_feature(qts, cpu_type, "pauth-impdef", false);
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assert_error(qts, cpu_type, "cannot enable pauth-impdef without pauth",
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assert_set_feature(qts, cpu_type, "pauth-qarma3", true);
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assert_set_feature(qts, cpu_type, "pauth-qarma3", false);
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assert_error(qts, cpu_type,
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"cannot enable pauth-impdef or pauth-qarma3 without pauth",
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"{ 'pauth': false, 'pauth-impdef': true }");
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assert_error(qts, cpu_type,
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"cannot enable pauth-impdef or pauth-qarma3 without pauth",
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"{ 'pauth': false, 'pauth-qarma3': true }");
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assert_error(qts, cpu_type,
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"cannot enable both pauth-impdef and pauth-qarma3",
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"{ 'pauth': true, 'pauth-impdef': true, 'pauth-qarma3': true }");
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}
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static void test_query_cpu_model_expansion(const void *data)
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