mirror of https://github.com/proxmox/mirror_qemu
target-alpha: Tidy alpha_translate_init
Signed-off-by: Richard Henderson <rth@twiddle.net>master
parent
e566be049a
commit
39acc64741
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@ -95,59 +95,67 @@ static TCGv cpu_sysval;
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static TCGv cpu_usp;
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static TCGv cpu_usp;
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#endif
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#endif
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/* register names */
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static char cpu_reg_names[10*4+21*5 + 10*5+21*6];
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#include "exec/gen-icount.h"
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#include "exec/gen-icount.h"
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void alpha_translate_init(void)
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void alpha_translate_init(void)
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{
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{
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#define DEF_VAR(V) { &cpu_##V, #V, offsetof(CPUAlphaState, V) }
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typedef struct { TCGv *var; const char *name; int ofs; } GlobalVar;
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static const GlobalVar vars[] = {
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DEF_VAR(pc),
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DEF_VAR(lock_addr),
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DEF_VAR(lock_st_addr),
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DEF_VAR(lock_value),
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DEF_VAR(unique),
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#ifndef CONFIG_USER_ONLY
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DEF_VAR(sysval),
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DEF_VAR(usp),
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#endif
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};
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#undef DEF_VAR
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/* Use the symbolic register names that match the disassembler. */
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static const char greg_names[31][4] = {
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"v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
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"t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
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"a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
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"t10", "t11", "ra", "t12", "at", "gp", "sp"
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};
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static const char freg_names[31][4] = {
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"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
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"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
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"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
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"f24", "f25", "f26", "f27", "f28", "f29", "f30"
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};
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static bool done_init = 0;
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int i;
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int i;
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char *p;
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static int done_init = 0;
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if (done_init) {
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if (done_init) {
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return;
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return;
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}
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}
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done_init = 1;
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cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
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cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
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p = cpu_reg_names;
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for (i = 0; i < 31; i++) {
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for (i = 0; i < 31; i++) {
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sprintf(p, "ir%d", i);
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cpu_ir[i] = tcg_global_mem_new_i64(TCG_AREG0,
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cpu_ir[i] = tcg_global_mem_new_i64(TCG_AREG0,
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offsetof(CPUAlphaState, ir[i]), p);
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offsetof(CPUAlphaState, ir[i]),
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p += (i < 10) ? 4 : 5;
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greg_names[i]);
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sprintf(p, "fir%d", i);
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cpu_fir[i] = tcg_global_mem_new_i64(TCG_AREG0,
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offsetof(CPUAlphaState, fir[i]), p);
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p += (i < 10) ? 5 : 6;
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}
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}
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cpu_pc = tcg_global_mem_new_i64(TCG_AREG0,
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for (i = 0; i < 31; i++) {
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offsetof(CPUAlphaState, pc), "pc");
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cpu_fir[i] = tcg_global_mem_new_i64(TCG_AREG0,
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offsetof(CPUAlphaState, fir[i]),
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freg_names[i]);
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}
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cpu_lock_addr = tcg_global_mem_new_i64(TCG_AREG0,
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for (i = 0; i < ARRAY_SIZE(vars); ++i) {
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offsetof(CPUAlphaState, lock_addr),
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const GlobalVar *v = &vars[i];
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"lock_addr");
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*v->var = tcg_global_mem_new_i64(TCG_AREG0, v->ofs, v->name);
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cpu_lock_st_addr = tcg_global_mem_new_i64(TCG_AREG0,
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}
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offsetof(CPUAlphaState, lock_st_addr),
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"lock_st_addr");
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cpu_lock_value = tcg_global_mem_new_i64(TCG_AREG0,
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offsetof(CPUAlphaState, lock_value),
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"lock_value");
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cpu_unique = tcg_global_mem_new_i64(TCG_AREG0,
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offsetof(CPUAlphaState, unique), "unique");
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#ifndef CONFIG_USER_ONLY
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cpu_sysval = tcg_global_mem_new_i64(TCG_AREG0,
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offsetof(CPUAlphaState, sysval), "sysval");
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cpu_usp = tcg_global_mem_new_i64(TCG_AREG0,
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offsetof(CPUAlphaState, usp), "usp");
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#endif
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done_init = 1;
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}
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}
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static TCGv load_zero(DisasContext *ctx)
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static TCGv load_zero(DisasContext *ctx)
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