mirror of https://github.com/proxmox/mirror_qemu
target-xtensa: update EXCVADDR in case of page table lookup
According to ISA, 4.4.2.6, EXCVADDR may be changed by any TLB miss, even if the miss is handled entirely by processor hardware. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>master
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@ -511,6 +511,7 @@ static int autorefill_mmu(CPUXtensaState *env, uint32_t vaddr, bool dtlb,
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*wi = (++env->autorefill_idx) & 0x3;
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split_tlb_entry_spec_way(env, vaddr, dtlb, &vpn, *wi, ei);
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xtensa_tlb_set_entry(env, dtlb, *wi, *ei, vpn, pte);
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env->sregs[EXCVADDR] = vaddr;
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qemu_log("%s: autorefill(%08x): %08x -> %08x\n",
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__func__, vaddr, vpn, pte);
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}
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