mirror of https://github.com/proxmox/mirror_qemu
target/riscv: Add User CSRs read-only check
For U-mode CSRs, read-only check is also needed. Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-id: 20210810014552.4884-1-zhiwei_liu@c-sky.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>master
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42109837b5
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@ -1422,11 +1422,11 @@ RISCVException riscv_csrrw(CPURISCVState *env, int csrno,
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RISCVException ret;
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RISCVException ret;
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target_ulong old_value;
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target_ulong old_value;
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RISCVCPU *cpu = env_archcpu(env);
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RISCVCPU *cpu = env_archcpu(env);
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int read_only = get_field(csrno, 0xC00) == 3;
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/* check privileges and return RISCV_EXCP_ILLEGAL_INST if check fails */
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/* check privileges and return RISCV_EXCP_ILLEGAL_INST if check fails */
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#if !defined(CONFIG_USER_ONLY)
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#if !defined(CONFIG_USER_ONLY)
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int effective_priv = env->priv;
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int effective_priv = env->priv;
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int read_only = get_field(csrno, 0xC00) == 3;
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if (riscv_has_ext(env, RVH) &&
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if (riscv_has_ext(env, RVH) &&
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env->priv == PRV_S &&
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env->priv == PRV_S &&
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@ -1439,11 +1439,13 @@ RISCVException riscv_csrrw(CPURISCVState *env, int csrno,
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effective_priv++;
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effective_priv++;
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}
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}
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if ((write_mask && read_only) ||
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if (!env->debugger && (effective_priv < get_field(csrno, 0x300))) {
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(!env->debugger && (effective_priv < get_field(csrno, 0x300)))) {
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return RISCV_EXCP_ILLEGAL_INST;
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return RISCV_EXCP_ILLEGAL_INST;
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}
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}
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#endif
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#endif
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if (write_mask && read_only) {
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return RISCV_EXCP_ILLEGAL_INST;
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}
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/* ensure the CSR extension is enabled. */
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/* ensure the CSR extension is enabled. */
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if (!cpu->cfg.ext_icsr) {
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if (!cpu->cfg.ext_icsr) {
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