mirror of https://github.com/proxmox/mirror_qemu
tcg/mips: Mask TCGMemOp appropriately for indexing
Commit 2b7ec66f
fixed TCGMemOp masking following the MO_AMASK addition,
but two cases were forgotten in the TCG MIPS backend.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
master
parent
e72c4fb81d
commit
4214a8cb7c
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@ -1105,7 +1105,7 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
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static void tcg_out_qemu_ld_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
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static void tcg_out_qemu_ld_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
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TCGReg base, TCGMemOp opc)
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TCGReg base, TCGMemOp opc)
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{
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{
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switch (opc) {
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switch (opc & (MO_SSIZE | MO_BSWAP)) {
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case MO_UB:
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case MO_UB:
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tcg_out_opc_imm(s, OPC_LBU, datalo, base, 0);
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tcg_out_opc_imm(s, OPC_LBU, datalo, base, 0);
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break;
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break;
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@ -1195,7 +1195,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is_64)
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static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
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static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
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TCGReg base, TCGMemOp opc)
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TCGReg base, TCGMemOp opc)
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{
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{
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switch (opc) {
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switch (opc & (MO_SIZE | MO_BSWAP)) {
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case MO_8:
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case MO_8:
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tcg_out_opc_imm(s, OPC_SB, datalo, base, 0);
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tcg_out_opc_imm(s, OPC_SB, datalo, base, 0);
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break;
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break;
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