mirror of https://github.com/proxmox/mirror_qemu
Rewrite Arm host support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2071 c046a42c-6fe2-441c-8c8c-71466251a162master
parent
f3a9676a60
commit
4615218210
25
arm.ld
25
arm.ld
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@ -53,6 +53,10 @@ SECTIONS
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.fini : { *(.fini) } =0x47ff041f
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.fini : { *(.fini) } =0x47ff041f
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.rodata : { *(.rodata) *(.gnu.linkonce.r*) }
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.rodata : { *(.rodata) *(.gnu.linkonce.r*) }
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.rodata1 : { *(.rodata1) }
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.rodata1 : { *(.rodata1) }
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.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) }
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__exidx_start = .;
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.ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) }
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__exidx_end = .;
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.reginfo : { *(.reginfo) }
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.reginfo : { *(.reginfo) }
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/* Adjust the address for the data segment. We want to adjust up to
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/* Adjust the address for the data segment. We want to adjust up to
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the same address within the page on the next page up. */
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the same address within the page on the next page up. */
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@ -63,7 +67,28 @@ SECTIONS
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*(.gnu.linkonce.d*)
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*(.gnu.linkonce.d*)
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CONSTRUCTORS
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CONSTRUCTORS
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}
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}
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.tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) }
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.data1 : { *(.data1) }
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.data1 : { *(.data1) }
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.preinit_array :
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{
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP (*(.preinit_array))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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}
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.init_array :
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{
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array))
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PROVIDE_HIDDEN (__init_array_end = .);
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}
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.fini_array :
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{
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP (*(.fini_array))
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KEEP (*(SORT(.fini_array.*)))
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PROVIDE_HIDDEN (__fini_array_end = .);
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}
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.ctors :
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.ctors :
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{
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{
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*(.ctors)
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*(.ctors)
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@ -992,6 +992,15 @@ static inline int64_t cpu_get_real_ticks (void)
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return rval.i64;
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return rval.i64;
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#endif
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#endif
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}
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}
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#else
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/* The host CPU doesn't have an easily accessible cycle counter.
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Just return a monotonically increasing vlue. This will be totally wrong,
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but hopefully better than nothing. */
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static inline int64_t cpu_get_real_ticks (void)
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{
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static int64_t ticks = 0;
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return ticks++;
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}
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#endif
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#endif
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/* profiling */
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/* profiling */
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6
disas.c
6
disas.c
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@ -271,11 +271,9 @@ void disas(FILE *out, void *code, unsigned long size)
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for (pc = (unsigned long)code; pc < (unsigned long)code + size; pc += count) {
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for (pc = (unsigned long)code; pc < (unsigned long)code + size; pc += count) {
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fprintf(out, "0x%08lx: ", pc);
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fprintf(out, "0x%08lx: ", pc);
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#ifdef __arm__
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#ifdef __arm__
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/* since data are included in the code, it is better to
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/* since data is included in the code, it is better to
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display code data too */
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display code data too */
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if (is_host) {
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fprintf(out, "%08x ", (int)bfd_getl32((const bfd_byte *)pc));
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fprintf(out, "%08x ", (int)bfd_getl32((const bfd_byte *)pc));
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}
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#endif
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#endif
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count = print_insn(pc, &disasm_info);
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count = print_insn(pc, &disasm_info);
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fprintf(out, "\n");
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fprintf(out, "\n");
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269
dyngen.c
269
dyngen.c
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@ -1255,90 +1255,149 @@ int arm_emit_ldr_info(const char *name, unsigned long start_offset,
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{
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{
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uint8_t *p;
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uint8_t *p;
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uint32_t insn;
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uint32_t insn;
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int offset, min_offset, pc_offset, data_size;
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int offset, min_offset, pc_offset, data_size, spare, max_pool;
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uint8_t data_allocated[1024];
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uint8_t data_allocated[1024];
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unsigned int data_index;
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unsigned int data_index;
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int type;
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memset(data_allocated, 0, sizeof(data_allocated));
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memset(data_allocated, 0, sizeof(data_allocated));
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p = p_start;
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p = p_start;
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min_offset = p_end - p_start;
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min_offset = p_end - p_start;
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spare = 0x7fffffff;
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while (p < p_start + min_offset) {
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while (p < p_start + min_offset) {
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insn = get32((uint32_t *)p);
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insn = get32((uint32_t *)p);
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/* TODO: Armv5e ldrd. */
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/* TODO: VFP load. */
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if ((insn & 0x0d5f0000) == 0x051f0000) {
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if ((insn & 0x0d5f0000) == 0x051f0000) {
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/* ldr reg, [pc, #im] */
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/* ldr reg, [pc, #im] */
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offset = insn & 0xfff;
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offset = insn & 0xfff;
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if (!(insn & 0x00800000))
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if (!(insn & 0x00800000))
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offset = -offset;
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offset = -offset;
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max_pool = 4096;
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type = 0;
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} else if ((insn & 0x0e5f0f00) == 0x0c1f0100) {
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/* FPA ldf. */
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offset = (insn & 0xff) << 2;
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if (!(insn & 0x00800000))
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offset = -offset;
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max_pool = 1024;
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type = 1;
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} else if ((insn & 0x0fff0000) == 0x028f0000) {
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/* Some gcc load a doubleword immediate with
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add regN, pc, #imm
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ldmia regN, {regN, regM}
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Hope and pray the compiler never generates somethin like
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add reg, pc, #imm1; ldr reg, [reg, #-imm2]; */
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int r;
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r = (insn & 0xf00) >> 7;
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offset = ((insn & 0xff) >> r) | ((insn & 0xff) << (32 - r));
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max_pool = 1024;
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type = 2;
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} else {
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max_pool = 0;
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type = -1;
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}
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if (type >= 0) {
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/* PC-relative load needs fixing up. */
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if (spare > max_pool - offset)
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spare = max_pool - offset;
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if ((offset & 3) !=0)
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if ((offset & 3) !=0)
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error("%s:%04x: ldr pc offset must be 32 bit aligned",
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error("%s:%04x: pc offset must be 32 bit aligned",
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name, start_offset + p - p_start);
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if (offset < 0)
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error("%s:%04x: Embedded literal value",
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name, start_offset + p - p_start);
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name, start_offset + p - p_start);
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pc_offset = p - p_start + offset + 8;
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pc_offset = p - p_start + offset + 8;
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if (pc_offset <= (p - p_start) ||
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if (pc_offset <= (p - p_start) ||
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pc_offset >= (p_end - p_start))
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pc_offset >= (p_end - p_start))
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error("%s:%04x: ldr pc offset must point inside the function code",
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error("%s:%04x: pc offset must point inside the function code",
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name, start_offset + p - p_start);
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name, start_offset + p - p_start);
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if (pc_offset < min_offset)
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if (pc_offset < min_offset)
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min_offset = pc_offset;
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min_offset = pc_offset;
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if (outfile) {
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if (outfile) {
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/* ldr position */
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/* The intruction position */
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fprintf(outfile, " arm_ldr_ptr->ptr = gen_code_ptr + %d;\n",
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fprintf(outfile, " arm_ldr_ptr->ptr = gen_code_ptr + %d;\n",
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p - p_start);
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p - p_start);
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/* ldr data index */
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/* The position of the constant pool data. */
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data_index = ((p_end - p_start) - pc_offset - 4) >> 2;
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data_index = ((p_end - p_start) - pc_offset) >> 2;
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fprintf(outfile, " arm_ldr_ptr->data_ptr = arm_data_ptr + %d;\n",
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fprintf(outfile, " arm_ldr_ptr->data_ptr = arm_data_ptr - %d;\n",
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data_index);
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data_index);
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fprintf(outfile, " arm_ldr_ptr->type = %d;\n", type);
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fprintf(outfile, " arm_ldr_ptr++;\n");
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fprintf(outfile, " arm_ldr_ptr++;\n");
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if (data_index >= sizeof(data_allocated))
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error("%s: too many data", name);
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if (!data_allocated[data_index]) {
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ELF_RELOC *rel;
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int i, addend, type;
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const char *sym_name, *p;
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char relname[1024];
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data_allocated[data_index] = 1;
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/* data value */
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addend = get32((uint32_t *)(p_start + pc_offset));
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relname[0] = '\0';
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for(i = 0, rel = relocs;i < nb_relocs; i++, rel++) {
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if (rel->r_offset == (pc_offset + start_offset)) {
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sym_name = get_rel_sym_name(rel);
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/* the compiler leave some unnecessary references to the code */
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get_reloc_expr(relname, sizeof(relname), sym_name);
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type = ELF32_R_TYPE(rel->r_info);
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if (type != R_ARM_ABS32)
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error("%s: unsupported data relocation", name);
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break;
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}
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}
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fprintf(outfile, " arm_data_ptr[%d] = 0x%x",
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data_index, addend);
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if (relname[0] != '\0')
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fprintf(outfile, " + %s", relname);
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fprintf(outfile, ";\n");
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}
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}
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}
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}
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}
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p += 4;
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p += 4;
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}
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}
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/* Copy and relocate the constant pool data. */
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data_size = (p_end - p_start) - min_offset;
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data_size = (p_end - p_start) - min_offset;
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if (data_size > 0 && outfile) {
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if (data_size > 0 && outfile) {
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fprintf(outfile, " arm_data_ptr += %d;\n", data_size >> 2);
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spare += min_offset;
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fprintf(outfile, " arm_data_ptr -= %d;\n", data_size >> 2);
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fprintf(outfile, " arm_pool_ptr -= %d;\n", data_size);
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fprintf(outfile, " if (arm_pool_ptr > gen_code_ptr + %d)\n"
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" arm_pool_ptr = gen_code_ptr + %d;\n",
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spare, spare);
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data_index = 0;
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for (pc_offset = min_offset;
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pc_offset < p_end - p_start;
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pc_offset += 4) {
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ELF_RELOC *rel;
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int i, addend, type;
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const char *sym_name;
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char relname[1024];
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/* data value */
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addend = get32((uint32_t *)(p_start + pc_offset));
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relname[0] = '\0';
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for(i = 0, rel = relocs;i < nb_relocs; i++, rel++) {
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if (rel->r_offset == (pc_offset + start_offset)) {
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sym_name = get_rel_sym_name(rel);
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/* the compiler leave some unnecessary references to the code */
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get_reloc_expr(relname, sizeof(relname), sym_name);
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type = ELF32_R_TYPE(rel->r_info);
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if (type != R_ARM_ABS32)
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error("%s: unsupported data relocation", name);
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break;
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}
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}
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fprintf(outfile, " arm_data_ptr[%d] = 0x%x",
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data_index, addend);
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if (relname[0] != '\0')
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fprintf(outfile, " + %s", relname);
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fprintf(outfile, ";\n");
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data_index++;
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}
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}
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}
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/* the last instruction must be a mov pc, lr */
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if (p == p_start)
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if (p == p_start)
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goto arm_ret_error;
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goto arm_ret_error;
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p -= 4;
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p -= 4;
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insn = get32((uint32_t *)p);
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insn = get32((uint32_t *)p);
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if ((insn & 0xffff0000) != 0xe91b0000) {
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/* The last instruction must be an ldm instruction. There are several
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forms generated by gcc:
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ldmib sp, {..., pc} (implies a sp adjustment of +4)
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ldmia sp, {..., pc}
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ldmea fp, {..., pc} */
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if ((insn & 0xffff8000) == 0xe99d8000) {
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if (outfile) {
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fprintf(outfile,
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" *(uint32_t *)(gen_code_ptr + %d) = 0xe28dd004;\n",
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p - p_start);
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}
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p += 4;
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} else if ((insn & 0xffff8000) != 0xe89d8000
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&& (insn & 0xffff8000) != 0xe91b8000) {
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arm_ret_error:
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arm_ret_error:
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if (!outfile)
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if (!outfile)
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printf("%s: invalid epilog\n", name);
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printf("%s: invalid epilog\n", name);
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}
|
}
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return p - p_start;
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return p - p_start;
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}
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}
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#endif
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#endif
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@ -1537,6 +1596,8 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
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}
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}
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#elif defined(HOST_ARM)
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#elif defined(HOST_ARM)
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{
|
{
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|
uint32_t insn;
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|
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if ((p_end - p_start) <= 16)
|
if ((p_end - p_start) <= 16)
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error("%s: function too small", name);
|
error("%s: function too small", name);
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if (get32((uint32_t *)p_start) != 0xe1a0c00d ||
|
if (get32((uint32_t *)p_start) != 0xe1a0c00d ||
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@ -1545,6 +1606,12 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
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error("%s: invalid prolog", name);
|
error("%s: invalid prolog", name);
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p_start += 12;
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p_start += 12;
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start_offset += 12;
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start_offset += 12;
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insn = get32((uint32_t *)p_start);
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if ((insn & 0xffffff00) == 0xe24dd000) {
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/* Stack adjustment. Assume op uses the frame pointer. */
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p_start -= 4;
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start_offset -= 4;
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}
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copy_size = arm_emit_ldr_info(name, start_offset, NULL, p_start, p_end,
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copy_size = arm_emit_ldr_info(name, start_offset, NULL, p_start, p_end,
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relocs, nb_relocs);
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relocs, nb_relocs);
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}
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}
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@ -2282,7 +2349,37 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
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int type;
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int type;
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int addend;
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int addend;
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int reloc_offset;
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int reloc_offset;
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uint32_t insn;
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|
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insn = get32((uint32_t *)(p_start + 4));
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/* If prologue ends in sub sp, sp, #const then assume
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|
op has a stack frame and needs the frame pointer. */
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if ((insn & 0xffffff00) == 0xe24dd000) {
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int i;
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uint32_t opcode;
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opcode = 0xe28db000; /* add fp, sp, #0. */
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|
#if 0
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/* ??? Need to undo the extra stack adjustment at the end of the op.
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|
For now just leave the stack misaligned and hope it doesn't break anything
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too important. */
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if ((insn & 4) != 0) {
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/* Preserve doubleword stack alignment. */
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fprintf(outfile,
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" *(uint32_t *)(gen_code_ptr + 4)= 0x%x;\n",
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insn + 4);
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opcode -= 4;
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|
}
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|
#endif
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insn = get32((uint32_t *)(p_start - 4));
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/* Calculate the size of the saved registers,
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|
excluding pc. */
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||||||
|
for (i = 0; i < 15; i++) {
|
||||||
|
if (insn & (1 << i))
|
||||||
|
opcode += 4;
|
||||||
|
}
|
||||||
|
fprintf(outfile,
|
||||||
|
" *(uint32_t *)gen_code_ptr = 0x%x;\n", opcode);
|
||||||
|
}
|
||||||
arm_emit_ldr_info(name, start_offset, outfile, p_start, p_end,
|
arm_emit_ldr_info(name, start_offset, outfile, p_start, p_end,
|
||||||
relocs, nb_relocs);
|
relocs, nb_relocs);
|
||||||
|
|
||||||
|
@ -2303,6 +2400,8 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
|
||||||
reloc_offset, name, addend);
|
reloc_offset, name, addend);
|
||||||
break;
|
break;
|
||||||
case R_ARM_PC24:
|
case R_ARM_PC24:
|
||||||
|
case R_ARM_JUMP24:
|
||||||
|
case R_ARM_CALL:
|
||||||
fprintf(outfile, " arm_reloc_pc24((uint32_t *)(gen_code_ptr + %d), 0x%x, %s);\n",
|
fprintf(outfile, " arm_reloc_pc24((uint32_t *)(gen_code_ptr + %d), 0x%x, %s);\n",
|
||||||
reloc_offset, addend, name);
|
reloc_offset, addend, name);
|
||||||
break;
|
break;
|
||||||
|
@ -2407,6 +2506,28 @@ int gen_file(FILE *outfile, int out_type)
|
||||||
|
|
||||||
} else {
|
} else {
|
||||||
/* generate big code generation switch */
|
/* generate big code generation switch */
|
||||||
|
|
||||||
|
#ifdef HOST_ARM
|
||||||
|
/* We need to know the size of all the ops so we can figure out when
|
||||||
|
to emit constant pools. This must be consistent with opc.h. */
|
||||||
|
fprintf(outfile,
|
||||||
|
"static const uint32_t arm_opc_size[] = {\n"
|
||||||
|
" 0,\n" /* end */
|
||||||
|
" 0,\n" /* nop */
|
||||||
|
" 0,\n" /* nop1 */
|
||||||
|
" 0,\n" /* nop2 */
|
||||||
|
" 0,\n"); /* nop3 */
|
||||||
|
for(i = 0, sym = symtab; i < nb_syms; i++, sym++) {
|
||||||
|
const char *name;
|
||||||
|
name = get_sym_name(sym);
|
||||||
|
if (strstart(name, OP_PREFIX, NULL)) {
|
||||||
|
fprintf(outfile, " %d,\n", sym->st_size);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
fprintf(outfile,
|
||||||
|
"};\n");
|
||||||
|
#endif
|
||||||
|
|
||||||
fprintf(outfile,
|
fprintf(outfile,
|
||||||
"int dyngen_code(uint8_t *gen_code_buf,\n"
|
"int dyngen_code(uint8_t *gen_code_buf,\n"
|
||||||
" uint16_t *label_offsets, uint16_t *jmp_offsets,\n"
|
" uint16_t *label_offsets, uint16_t *jmp_offsets,\n"
|
||||||
|
@ -2417,10 +2538,36 @@ fprintf(outfile,
|
||||||
" const uint32_t *opparam_ptr;\n");
|
" const uint32_t *opparam_ptr;\n");
|
||||||
|
|
||||||
#ifdef HOST_ARM
|
#ifdef HOST_ARM
|
||||||
|
/* Arm is tricky because it uses constant pools for loading immediate values.
|
||||||
|
We assume (and require) each function is code followed by a constant pool.
|
||||||
|
All the ops are small so this should be ok. For each op we figure
|
||||||
|
out how much "spare" range we have in the load instructions. This allows
|
||||||
|
us to insert subsequent ops in between the op and the constant pool,
|
||||||
|
eliminating the neeed to jump around the pool.
|
||||||
|
|
||||||
|
We currently generate:
|
||||||
|
|
||||||
|
[ For this example we assume merging would move op1_pool out of range.
|
||||||
|
In practice we should be able to combine many ops before the offset
|
||||||
|
limits are reached. ]
|
||||||
|
op1_code;
|
||||||
|
op2_code;
|
||||||
|
goto op3;
|
||||||
|
op2_pool;
|
||||||
|
op1_pool;
|
||||||
|
op3:
|
||||||
|
op3_code;
|
||||||
|
ret;
|
||||||
|
op3_pool;
|
||||||
|
|
||||||
|
Ideally we'd put op1_pool before op2_pool, but that requires two passes.
|
||||||
|
*/
|
||||||
fprintf(outfile,
|
fprintf(outfile,
|
||||||
" uint8_t *last_gen_code_ptr = gen_code_buf;\n"
|
" uint8_t *last_gen_code_ptr = gen_code_buf;\n"
|
||||||
" LDREntry *arm_ldr_ptr = arm_ldr_table;\n"
|
" LDREntry *arm_ldr_ptr = arm_ldr_table;\n"
|
||||||
" uint32_t *arm_data_ptr = arm_data_table;\n");
|
" uint32_t *arm_data_ptr = arm_data_table + ARM_LDR_TABLE_SIZE;\n"
|
||||||
|
/* Initialise the parmissible pool offset to an arbitary large value. */
|
||||||
|
" uint8_t *arm_pool_ptr = gen_code_buf + 0x1000000;\n");
|
||||||
#endif
|
#endif
|
||||||
#ifdef HOST_IA64
|
#ifdef HOST_IA64
|
||||||
{
|
{
|
||||||
|
@ -2489,9 +2636,23 @@ fprintf(outfile,
|
||||||
/* Generate prologue, if needed. */
|
/* Generate prologue, if needed. */
|
||||||
|
|
||||||
fprintf(outfile,
|
fprintf(outfile,
|
||||||
" for(;;) {\n"
|
" for(;;) {\n");
|
||||||
" switch(*opc_ptr++) {\n"
|
|
||||||
);
|
#ifdef HOST_ARM
|
||||||
|
/* Generate constant pool if needed */
|
||||||
|
fprintf(outfile,
|
||||||
|
" if (gen_code_ptr + arm_opc_size[*opc_ptr] >= arm_pool_ptr) {\n"
|
||||||
|
" gen_code_ptr = arm_flush_ldr(gen_code_ptr, arm_ldr_table, "
|
||||||
|
"arm_ldr_ptr, arm_data_ptr, arm_data_table + ARM_LDR_TABLE_SIZE, 1);\n"
|
||||||
|
" last_gen_code_ptr = gen_code_ptr;\n"
|
||||||
|
" arm_ldr_ptr = arm_ldr_table;\n"
|
||||||
|
" arm_data_ptr = arm_data_table + ARM_LDR_TABLE_SIZE;\n"
|
||||||
|
" arm_pool_ptr = gen_code_ptr + 0x1000000;\n"
|
||||||
|
" }\n");
|
||||||
|
#endif
|
||||||
|
|
||||||
|
fprintf(outfile,
|
||||||
|
" switch(*opc_ptr++) {\n");
|
||||||
|
|
||||||
for(i = 0, sym = symtab; i < nb_syms; i++, sym++) {
|
for(i = 0, sym = symtab; i < nb_syms; i++, sym++) {
|
||||||
const char *name;
|
const char *name;
|
||||||
|
@ -2525,17 +2686,6 @@ fprintf(outfile,
|
||||||
" goto the_end;\n"
|
" goto the_end;\n"
|
||||||
" }\n");
|
" }\n");
|
||||||
|
|
||||||
#ifdef HOST_ARM
|
|
||||||
/* generate constant table if needed */
|
|
||||||
fprintf(outfile,
|
|
||||||
" if ((gen_code_ptr - last_gen_code_ptr) >= (MAX_FRAG_SIZE - MAX_OP_SIZE)) {\n"
|
|
||||||
" gen_code_ptr = arm_flush_ldr(gen_code_ptr, arm_ldr_table, arm_ldr_ptr, arm_data_table, arm_data_ptr, 1);\n"
|
|
||||||
" last_gen_code_ptr = gen_code_ptr;\n"
|
|
||||||
" arm_ldr_ptr = arm_ldr_table;\n"
|
|
||||||
" arm_data_ptr = arm_data_table;\n"
|
|
||||||
" }\n");
|
|
||||||
#endif
|
|
||||||
|
|
||||||
|
|
||||||
fprintf(outfile,
|
fprintf(outfile,
|
||||||
" }\n"
|
" }\n"
|
||||||
|
@ -2553,7 +2703,10 @@ fprintf(outfile,
|
||||||
|
|
||||||
/* generate some code patching */
|
/* generate some code patching */
|
||||||
#ifdef HOST_ARM
|
#ifdef HOST_ARM
|
||||||
fprintf(outfile, "gen_code_ptr = arm_flush_ldr(gen_code_ptr, arm_ldr_table, arm_ldr_ptr, arm_data_table, arm_data_ptr, 0);\n");
|
fprintf(outfile,
|
||||||
|
"if (arm_data_ptr != arm_data_table + ARM_LDR_TABLE_SIZE)\n"
|
||||||
|
" gen_code_ptr = arm_flush_ldr(gen_code_ptr, arm_ldr_table, "
|
||||||
|
"arm_ldr_ptr, arm_data_ptr, arm_data_table + ARM_LDR_TABLE_SIZE, 0);\n");
|
||||||
#endif
|
#endif
|
||||||
/* flush instruction cache */
|
/* flush instruction cache */
|
||||||
fprintf(outfile, "flush_icache_range((unsigned long)gen_code_buf, (unsigned long)gen_code_ptr);\n");
|
fprintf(outfile, "flush_icache_range((unsigned long)gen_code_buf, (unsigned long)gen_code_ptr);\n");
|
||||||
|
|
60
dyngen.h
60
dyngen.h
|
@ -19,7 +19,7 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
int __op_param1, __op_param2, __op_param3;
|
int __op_param1, __op_param2, __op_param3;
|
||||||
#ifdef __sparc__
|
#if defined(__sparc__) || defined(__arm__)
|
||||||
void __op_gen_label1(){}
|
void __op_gen_label1(){}
|
||||||
void __op_gen_label2(){}
|
void __op_gen_label2(){}
|
||||||
void __op_gen_label3(){}
|
void __op_gen_label3(){}
|
||||||
|
@ -145,18 +145,16 @@ void fix_bsr(void *p, int offset) {
|
||||||
|
|
||||||
#ifdef __arm__
|
#ifdef __arm__
|
||||||
|
|
||||||
#define MAX_OP_SIZE (128 * 4) /* in bytes */
|
#define ARM_LDR_TABLE_SIZE 1024
|
||||||
/* max size of the code that can be generated without calling arm_flush_ldr */
|
|
||||||
#define MAX_FRAG_SIZE (1024 * 4)
|
|
||||||
//#define MAX_FRAG_SIZE (135 * 4) /* for testing */
|
|
||||||
|
|
||||||
typedef struct LDREntry {
|
typedef struct LDREntry {
|
||||||
uint8_t *ptr;
|
uint8_t *ptr;
|
||||||
uint32_t *data_ptr;
|
uint32_t *data_ptr;
|
||||||
|
unsigned type:2;
|
||||||
} LDREntry;
|
} LDREntry;
|
||||||
|
|
||||||
static LDREntry arm_ldr_table[1024];
|
static LDREntry arm_ldr_table[1024];
|
||||||
static uint32_t arm_data_table[1024];
|
static uint32_t arm_data_table[ARM_LDR_TABLE_SIZE];
|
||||||
|
|
||||||
extern char exec_loop;
|
extern char exec_loop;
|
||||||
|
|
||||||
|
@ -175,8 +173,9 @@ static uint8_t *arm_flush_ldr(uint8_t *gen_code_ptr,
|
||||||
int offset, data_size, target;
|
int offset, data_size, target;
|
||||||
uint8_t *data_ptr;
|
uint8_t *data_ptr;
|
||||||
uint32_t insn;
|
uint32_t insn;
|
||||||
|
uint32_t mask;
|
||||||
|
|
||||||
data_size = (uint8_t *)data_end - (uint8_t *)data_start;
|
data_size = (data_end - data_start) << 2;
|
||||||
|
|
||||||
if (gen_jmp) {
|
if (gen_jmp) {
|
||||||
/* generate branch to skip the data */
|
/* generate branch to skip the data */
|
||||||
|
@ -198,17 +197,48 @@ static uint8_t *arm_flush_ldr(uint8_t *gen_code_ptr,
|
||||||
offset = ((unsigned long)(le->data_ptr) - (unsigned long)data_start) +
|
offset = ((unsigned long)(le->data_ptr) - (unsigned long)data_start) +
|
||||||
(unsigned long)data_ptr -
|
(unsigned long)data_ptr -
|
||||||
(unsigned long)ptr - 8;
|
(unsigned long)ptr - 8;
|
||||||
insn = *ptr & ~(0xfff | 0x00800000);
|
|
||||||
if (offset < 0) {
|
if (offset < 0) {
|
||||||
offset = - offset;
|
fprintf(stderr, "Negative constant pool offset\n");
|
||||||
} else {
|
|
||||||
insn |= 0x00800000;
|
|
||||||
}
|
|
||||||
if (offset > 0xfff) {
|
|
||||||
fprintf(stderr, "Error ldr offset\n");
|
|
||||||
abort();
|
abort();
|
||||||
}
|
}
|
||||||
insn |= offset;
|
switch (le->type) {
|
||||||
|
case 0: /* ldr */
|
||||||
|
mask = ~0x00800fff;
|
||||||
|
if (offset >= 4096) {
|
||||||
|
fprintf(stderr, "Bad ldr offset\n");
|
||||||
|
abort();
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
case 1: /* ldc */
|
||||||
|
mask = ~0x008000ff;
|
||||||
|
if (offset >= 1024 ) {
|
||||||
|
fprintf(stderr, "Bad ldc offset\n");
|
||||||
|
abort();
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
case 2: /* add */
|
||||||
|
mask = ~0xfff;
|
||||||
|
if (offset >= 1024 ) {
|
||||||
|
fprintf(stderr, "Bad add offset\n");
|
||||||
|
abort();
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
fprintf(stderr, "Bad pc relative fixup\n");
|
||||||
|
abort();
|
||||||
|
}
|
||||||
|
insn = *ptr & mask;
|
||||||
|
switch (le->type) {
|
||||||
|
case 0: /* ldr */
|
||||||
|
insn |= offset | 0x00800000;
|
||||||
|
break;
|
||||||
|
case 1: /* ldc */
|
||||||
|
insn |= (offset >> 2) | 0x00800000;
|
||||||
|
break;
|
||||||
|
case 2: /* add */
|
||||||
|
insn |= (offset >> 2) | 0xf00;
|
||||||
|
break;
|
||||||
|
}
|
||||||
*ptr = insn;
|
*ptr = insn;
|
||||||
}
|
}
|
||||||
return gen_code_ptr;
|
return gen_code_ptr;
|
||||||
|
|
2
elf.h
2
elf.h
|
@ -502,6 +502,8 @@ typedef struct {
|
||||||
#define R_ARM_GOTPC 25 /* 32 bit PC relative offset to GOT */
|
#define R_ARM_GOTPC 25 /* 32 bit PC relative offset to GOT */
|
||||||
#define R_ARM_GOT32 26 /* 32 bit GOT entry */
|
#define R_ARM_GOT32 26 /* 32 bit GOT entry */
|
||||||
#define R_ARM_PLT32 27 /* 32 bit PLT address */
|
#define R_ARM_PLT32 27 /* 32 bit PLT address */
|
||||||
|
#define R_ARM_CALL 28
|
||||||
|
#define R_ARM_JUMP24 29
|
||||||
#define R_ARM_GNU_VTENTRY 100
|
#define R_ARM_GNU_VTENTRY 100
|
||||||
#define R_ARM_GNU_VTINHERIT 101
|
#define R_ARM_GNU_VTINHERIT 101
|
||||||
#define R_ARM_THM_PC11 102 /* thumb unconditional branch */
|
#define R_ARM_THM_PC11 102 /* thumb unconditional branch */
|
||||||
|
|
Loading…
Reference in New Issue