mirror of https://github.com/proxmox/mirror_qemu
target/tricore: Fix RRPW_DEXTR
if we used const16 == 0 we would crash qemu with the error: ../tcg/tcg-op.c:196: tcg_gen_shri_i32: Assertion `arg2 >= 0 && arg2 < 32' failed This whole instruction can be handled by 'tcg_gen_extract2_tl' which takes care of this special case as well. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <20230202120432.1268-6-kbastian@mail.uni-paderborn.de> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>master
parent
fa581531ff
commit
48bffe7f6b
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@ -8706,15 +8706,9 @@ static void decode_32Bit_opc(DisasContext *ctx)
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r2 = MASK_OP_RRPW_S2(ctx->opcode);
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r2 = MASK_OP_RRPW_S2(ctx->opcode);
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r3 = MASK_OP_RRPW_D(ctx->opcode);
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r3 = MASK_OP_RRPW_D(ctx->opcode);
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const16 = MASK_OP_RRPW_POS(ctx->opcode);
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const16 = MASK_OP_RRPW_POS(ctx->opcode);
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if (r1 == r2) {
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tcg_gen_rotli_tl(cpu_gpr_d[r3], cpu_gpr_d[r1], const16);
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tcg_gen_extract2_tl(cpu_gpr_d[r3], cpu_gpr_d[r2], cpu_gpr_d[r1],
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} else {
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32 - const16);
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temp = tcg_temp_new();
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tcg_gen_shli_tl(temp, cpu_gpr_d[r1], const16);
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tcg_gen_shri_tl(cpu_gpr_d[r3], cpu_gpr_d[r2], 32 - const16);
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tcg_gen_or_tl(cpu_gpr_d[r3], cpu_gpr_d[r3], temp);
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tcg_temp_free(temp);
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}
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break;
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break;
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/* RRR Format */
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/* RRR Format */
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case OPCM_32_RRR_COND_SELECT:
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case OPCM_32_RRR_COND_SELECT:
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