hw/arm/smmuv3: Let AIDR advertise SMMUv3.0 support

Add the support for AIDR register. It currently advertises
SMMU V3.0 spec.

Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200728150815.11446-10-eric.auger@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
master
Eric Auger 2020-07-28 17:08:13 +02:00 committed by Peter Maydell
parent f0ec277cd4
commit 5888f0ad12
3 changed files with 5 additions and 0 deletions

View File

@ -64,6 +64,7 @@ REG32(IDR5, 0x14)
#define SMMU_IDR5_OAS 4
REG32(IIDR, 0x18)
REG32(AIDR, 0x1c)
REG32(CR0, 0x20)
FIELD(CR0, SMMU_ENABLE, 0, 1)
FIELD(CR0, EVENTQEN, 2, 1)

View File

@ -1251,6 +1251,9 @@ static MemTxResult smmu_readl(SMMUv3State *s, hwaddr offset,
case A_IIDR:
*data = s->iidr;
return MEMTX_OK;
case A_AIDR:
*data = s->aidr;
return MEMTX_OK;
case A_CR0:
*data = s->cr[0];
return MEMTX_OK;

View File

@ -41,6 +41,7 @@ typedef struct SMMUv3State {
uint32_t idr[6];
uint32_t iidr;
uint32_t aidr;
uint32_t cr[3];
uint32_t cr0ack;
uint32_t statusr;