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tcg-arm: Don't implement rem 

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
master
Richard Henderson 2013-03-11 23:13:30 -07:00
parent ca675f46e6
commit 5e1108b370
2 changed files with 1 additions and 16 deletions
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14
tcg/arm/tcg-target.c
View File

@ -1926,18 +1926,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_divu_i32:
tcg_out_udiv(s, COND_AL, args[0], args[1], args[2]);
break;
case INDEX_op_rem_i32:
tcg_out_sdiv(s, COND_AL, TCG_REG_TMP, args[1], args[2]);
tcg_out_mul32(s, COND_AL, TCG_REG_TMP, TCG_REG_TMP, args[2]);
tcg_out_dat_reg(s, COND_AL, ARITH_SUB, args[0], args[1], TCG_REG_TMP,
SHIFT_IMM_LSL(0));
break;
case INDEX_op_remu_i32:
tcg_out_udiv(s, COND_AL, TCG_REG_TMP, args[1], args[2]);
tcg_out_mul32(s, COND_AL, TCG_REG_TMP, TCG_REG_TMP, args[2]);
tcg_out_dat_reg(s, COND_AL, ARITH_SUB, args[0], args[1], TCG_REG_TMP,
SHIFT_IMM_LSL(0));
break;
default:
tcg_abort();
@ -2043,9 +2031,7 @@ static const TCGTargetOpDef arm_op_defs[] = {
#if TCG_TARGET_HAS_div_i32
{ INDEX_op_div_i32, { "r", "r", "r" } },
{ INDEX_op_rem_i32, { "r", "r", "r" } },
{ INDEX_op_divu_i32, { "r", "r", "r" } },
{ INDEX_op_remu_i32, { "r", "r", "r" } },
#endif
{ -1 },

3
tcg/arm/tcg-target.h
View File

@ -76,11 +76,10 @@ typedef enum {
#ifdef __ARM_ARCH_EXT_IDIV__
#define TCG_TARGET_HAS_div_i32 1
#define TCG_TARGET_HAS_rem_i32 1
#else
#define TCG_TARGET_HAS_div_i32 0
#define TCG_TARGET_HAS_rem_i32 0
#endif
#define TCG_TARGET_HAS_rem_i32 0
extern bool tcg_target_deposit_valid(int ofs, int len);
#define TCG_TARGET_deposit_i32_valid tcg_target_deposit_valid