mirror of https://github.com/proxmox/mirror_qemu
hw/arm/bcm2836: Rename cpus[] as cpu[].core
As we are going to add more core-specific fields, add a 'cpu' structure and move the ARMCPU field there as 'core'. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20191019234715.25750-7-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>master
parent
d0567e9409
commit
5e5e9ed672
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@ -51,8 +51,9 @@ static void bcm2836_init(Object *obj)
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int n;
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int n;
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for (n = 0; n < BCM283X_NCPUS; n++) {
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for (n = 0; n < BCM283X_NCPUS; n++) {
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object_initialize_child(obj, "cpu[*]", &s->cpus[n], sizeof(s->cpus[n]),
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object_initialize_child(obj, "cpu[*]", &s->cpu[n].core,
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info->cpu_type, &error_abort, NULL);
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sizeof(s->cpu[n].core), info->cpu_type,
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&error_abort, NULL);
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}
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}
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sysbus_init_child_obj(obj, "control", &s->control, sizeof(s->control),
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sysbus_init_child_obj(obj, "control", &s->control, sizeof(s->control),
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@ -122,10 +123,10 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
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for (n = 0; n < BCM283X_NCPUS; n++) {
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for (n = 0; n < BCM283X_NCPUS; n++) {
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/* TODO: this should be converted to a property of ARM_CPU */
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/* TODO: this should be converted to a property of ARM_CPU */
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s->cpus[n].mp_affinity = (info->clusterid << 8) | n;
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s->cpu[n].core.mp_affinity = (info->clusterid << 8) | n;
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/* set periphbase/CBAR value for CPU-local registers */
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/* set periphbase/CBAR value for CPU-local registers */
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object_property_set_int(OBJECT(&s->cpus[n]),
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object_property_set_int(OBJECT(&s->cpu[n].core),
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info->peri_base,
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info->peri_base,
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"reset-cbar", &err);
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"reset-cbar", &err);
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if (err) {
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if (err) {
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@ -134,14 +135,15 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
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}
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}
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/* start powered off if not enabled */
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/* start powered off if not enabled */
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object_property_set_bool(OBJECT(&s->cpus[n]), n >= s->enabled_cpus,
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object_property_set_bool(OBJECT(&s->cpu[n].core), n >= s->enabled_cpus,
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"start-powered-off", &err);
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"start-powered-off", &err);
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if (err) {
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if (err) {
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error_propagate(errp, err);
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error_propagate(errp, err);
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return;
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return;
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}
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}
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object_property_set_bool(OBJECT(&s->cpus[n]), true, "realized", &err);
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object_property_set_bool(OBJECT(&s->cpu[n].core), true,
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"realized", &err);
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if (err) {
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if (err) {
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error_propagate(errp, err);
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error_propagate(errp, err);
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return;
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return;
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@ -149,18 +151,18 @@ static void bcm2836_realize(DeviceState *dev, Error **errp)
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/* Connect irq/fiq outputs from the interrupt controller. */
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/* Connect irq/fiq outputs from the interrupt controller. */
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qdev_connect_gpio_out_named(DEVICE(&s->control), "irq", n,
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qdev_connect_gpio_out_named(DEVICE(&s->control), "irq", n,
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qdev_get_gpio_in(DEVICE(&s->cpus[n]), ARM_CPU_IRQ));
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qdev_get_gpio_in(DEVICE(&s->cpu[n].core), ARM_CPU_IRQ));
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qdev_connect_gpio_out_named(DEVICE(&s->control), "fiq", n,
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qdev_connect_gpio_out_named(DEVICE(&s->control), "fiq", n,
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qdev_get_gpio_in(DEVICE(&s->cpus[n]), ARM_CPU_FIQ));
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qdev_get_gpio_in(DEVICE(&s->cpu[n].core), ARM_CPU_FIQ));
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/* Connect timers from the CPU to the interrupt controller */
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/* Connect timers from the CPU to the interrupt controller */
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qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_PHYS,
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qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_PHYS,
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qdev_get_gpio_in_named(DEVICE(&s->control), "cntpnsirq", n));
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qdev_get_gpio_in_named(DEVICE(&s->control), "cntpnsirq", n));
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qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_VIRT,
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qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_VIRT,
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qdev_get_gpio_in_named(DEVICE(&s->control), "cntvirq", n));
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qdev_get_gpio_in_named(DEVICE(&s->control), "cntvirq", n));
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qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_HYP,
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qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_HYP,
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qdev_get_gpio_in_named(DEVICE(&s->control), "cnthpirq", n));
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qdev_get_gpio_in_named(DEVICE(&s->control), "cnthpirq", n));
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qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_SEC,
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qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_SEC,
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qdev_get_gpio_in_named(DEVICE(&s->control), "cntpsirq", n));
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qdev_get_gpio_in_named(DEVICE(&s->control), "cntpsirq", n));
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}
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}
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}
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}
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@ -35,7 +35,9 @@ typedef struct BCM283XState {
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char *cpu_type;
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char *cpu_type;
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uint32_t enabled_cpus;
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uint32_t enabled_cpus;
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ARMCPU cpus[BCM283X_NCPUS];
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struct {
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ARMCPU core;
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} cpu[BCM283X_NCPUS];
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BCM2836ControlState control;
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BCM2836ControlState control;
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BCM2835PeripheralState peripherals;
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BCM2835PeripheralState peripherals;
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} BCM283XState;
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} BCM283XState;
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