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arm_gicv3: Fix ICC_BPR1 reset value when EL3 not implemented 

If EL3 is not implemented (ie only one security state) then the
one and only ICC_BPR1 register behaves like the Non-secure
ICC_BPR1 in an EL3-present configuration. In particular, its
reset value is GIC_MIN_BPR_NS, not GIC_MIN_BPR.

Correct the erroneous reset value; this fixes a problem where
we might hit the assert added in commit a89ff39ee9.

Reported-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 1496849369-30282-1-git-send-email-peter.maydell@linaro.org
master
Peter Maydell 2017-06-07 16:29:29 +01:00
parent b55a69fe5f
commit 64175afc69
1 changed files with 1 additions and 5 deletions
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6
hw/intc/arm_gicv3_cpuif.c
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@ -2039,11 +2039,7 @@ static void icc_reset(CPUARMState *env, const ARMCPRegInfo *ri)
cs->icc_pmr_el1 = 0;
cs->icc_bpr[GICV3_G0] = GIC_MIN_BPR;
cs->icc_bpr[GICV3_G1] = GIC_MIN_BPR;
if (arm_feature(env, ARM_FEATURE_EL3)) {
cs->icc_bpr[GICV3_G1NS] = GIC_MIN_BPR_NS;
} else {
cs->icc_bpr[GICV3_G1NS] = GIC_MIN_BPR;
}
cs->icc_bpr[GICV3_G1NS] = GIC_MIN_BPR_NS;
memset(cs->icc_apr, 0, sizeof(cs->icc_apr));
memset(cs->icc_igrpen, 0, sizeof(cs->icc_igrpen));
cs->icc_ctlr_el3 = ICC_CTLR_EL3_NDS | ICC_CTLR_EL3_A3V |