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allwinner-emac: update irq status after writes to interrupt registers 

The irq line status must be updated after writes to the INT_CTL and
INT_STA registers.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 1395771730-16882-8-git-send-email-b.galvani@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
master
Beniamino Galvani 2014-03-25 19:22:10 +01:00 committed by Peter Maydell
parent 103db49a10
commit 6619bc5c55
1 changed files with 2 additions and 0 deletions
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2
hw/net/allwinner_emac.c
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@ -391,9 +391,11 @@ static void aw_emac_write(void *opaque, hwaddr offset, uint64_t value,
break;
case EMAC_INT_CTL_REG:
s->int_ctl = value;
aw_emac_update_irq(s);
break;
case EMAC_INT_STA_REG:
s->int_sta &= ~value;
aw_emac_update_irq(s);
break;
case EMAC_MAC_MADR_REG:
s->phy_target = value;