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omap_sdrc: convert to memory API 

Signed-off-by: Avi Kivity <avi@redhat.com>
master
Avi Kivity 2011-11-24 14:32:34 +02:00
parent 9832b74c14
commit 6a0148e7b5
3 changed files with 24 additions and 20 deletions
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3
hw/omap.h
View File

@ -104,7 +104,8 @@ target_phys_addr_t omap_l4_region_size(struct omap_target_agent_s *ta,
/* OMAP2 SDRAM controller */ /* OMAP2 SDRAM controller */
struct omap_sdrc_s; struct omap_sdrc_s;
struct omap_sdrc_s *omap_sdrc_init(target_phys_addr_t base); struct omap_sdrc_s *omap_sdrc_init(MemoryRegion *sysmem,
target_phys_addr_t base);
void omap_sdrc_reset(struct omap_sdrc_s *s); void omap_sdrc_reset(struct omap_sdrc_s *s);
/* OMAP2 general purpose memory controller */ /* OMAP2 general purpose memory controller */

2
hw/omap2.c
View File

@ -2422,7 +2422,7 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sysmem,
sysbus_mmio_map(busdev, 3, omap_l4_region_base(ta, 4)); sysbus_mmio_map(busdev, 3, omap_l4_region_base(ta, 4));
sysbus_mmio_map(busdev, 4, omap_l4_region_base(ta, 5)); sysbus_mmio_map(busdev, 4, omap_l4_region_base(ta, 5));
s->sdrc = omap_sdrc_init(0x68009000); s->sdrc = omap_sdrc_init(sysmem, 0x68009000);
s->gpmc = omap_gpmc_init(s, 0x6800a000, s->gpmc = omap_gpmc_init(s, 0x6800a000,
qdev_get_gpio_in(s->ih[0], OMAP_INT_24XX_GPMC_IRQ), qdev_get_gpio_in(s->ih[0], OMAP_INT_24XX_GPMC_IRQ),
s->drq[OMAP24XX_DMA_GPMC]); s->drq[OMAP24XX_DMA_GPMC]);

39
hw/omap_sdrc.c
View File

@ -22,6 +22,7 @@
/* SDRAM Controller Subsystem */ /* SDRAM Controller Subsystem */
struct omap_sdrc_s { struct omap_sdrc_s {
MemoryRegion iomem;
uint8_t config; uint8_t config;
}; };
@ -30,10 +31,15 @@ void omap_sdrc_reset(struct omap_sdrc_s *s)
s->config = 0x10; s->config = 0x10;
} }
static uint32_t omap_sdrc_read(void *opaque, target_phys_addr_t addr) static uint64_t omap_sdrc_read(void *opaque, target_phys_addr_t addr,
unsigned size)
{ {
struct omap_sdrc_s *s = (struct omap_sdrc_s *) opaque; struct omap_sdrc_s *s = (struct omap_sdrc_s *) opaque;
if (size != 4) {
return omap_badwidth_read32(opaque, addr);
}
switch (addr) { switch (addr) {
case 0x00: /* SDRC_REVISION */ case 0x00: /* SDRC_REVISION */
return 0x20; return 0x20;
@ -81,10 +87,14 @@ static uint32_t omap_sdrc_read(void *opaque, target_phys_addr_t addr)
} }
static void omap_sdrc_write(void *opaque, target_phys_addr_t addr, static void omap_sdrc_write(void *opaque, target_phys_addr_t addr,
uint32_t value) uint64_t value, unsigned size)
{ {
struct omap_sdrc_s *s = (struct omap_sdrc_s *) opaque; struct omap_sdrc_s *s = (struct omap_sdrc_s *) opaque;
if (size != 4) {
return omap_badwidth_write32(opaque, addr, value);
}
switch (addr) { switch (addr) {
case 0x00: /* SDRC_REVISION */ case 0x00: /* SDRC_REVISION */
case 0x14: /* SDRC_SYSSTATUS */ case 0x14: /* SDRC_SYSSTATUS */
@ -97,7 +107,7 @@ static void omap_sdrc_write(void *opaque, target_phys_addr_t addr,
case 0x10: /* SDRC_SYSCONFIG */ case 0x10: /* SDRC_SYSCONFIG */
if ((value >> 3) != 0x2) if ((value >> 3) != 0x2)
fprintf(stderr, "%s: bad SDRAM idle mode %i\n", fprintf(stderr, "%s: bad SDRAM idle mode %i\n",
__FUNCTION__, value >> 3); __FUNCTION__, (unsigned)value >> 3);
if (value & 2) if (value & 2)
omap_sdrc_reset(s); omap_sdrc_reset(s);
s->config = value & 0x18; s->config = value & 0x18;
@ -137,29 +147,22 @@ static void omap_sdrc_write(void *opaque, target_phys_addr_t addr,
} }
} }
static CPUReadMemoryFunc * const omap_sdrc_readfn[] = { static const MemoryRegionOps omap_sdrc_ops = {
omap_badwidth_read32, .read = omap_sdrc_read,
omap_badwidth_read32, .write = omap_sdrc_write,
omap_sdrc_read, .endianness = DEVICE_NATIVE_ENDIAN,
}; };
static CPUWriteMemoryFunc * const omap_sdrc_writefn[] = { struct omap_sdrc_s *omap_sdrc_init(MemoryRegion *sysmem,
omap_badwidth_write32, target_phys_addr_t base)
omap_badwidth_write32,
omap_sdrc_write,
};
struct omap_sdrc_s *omap_sdrc_init(target_phys_addr_t base)
{ {
int iomemtype;
struct omap_sdrc_s *s = (struct omap_sdrc_s *) struct omap_sdrc_s *s = (struct omap_sdrc_s *)
g_malloc0(sizeof(struct omap_sdrc_s)); g_malloc0(sizeof(struct omap_sdrc_s));
omap_sdrc_reset(s); omap_sdrc_reset(s);
iomemtype = cpu_register_io_memory(omap_sdrc_readfn, memory_region_init_io(&s->iomem, &omap_sdrc_ops, s, "omap.sdrc", 0x1000);
omap_sdrc_writefn, s, DEVICE_NATIVE_ENDIAN); memory_region_add_subregion(sysmem, base, &s->iomem);
cpu_register_physical_memory(base, 0x1000, iomemtype);
return s; return s;
} }