target/ppc: Allow privileged access to SPR_PCR

The powerpc Linux kernel[1] and skiboot firmware[2] recently gained changes
that cause the Processor Compatibility Register (PCR) SPR to be cleared.

These changes cause Linux to fail to boot on the Qemu powernv machine
with an error:

 Trying to write privileged spr 338 (0x152) at 0000000030017f0c

With this patch Qemu makes this register available as a hypervisor
privileged register.

Note that bits set in this register disable features of the processor.
Currently the only register state that is supported is when the register
is zeroed (enable all features). This is sufficient for guests to
once again boot.

[1] https://lkml.kernel.org/r/20180518013742.24095-1-mikey@neuling.org
[2] https://patchwork.ozlabs.org/patch/915932/

Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
master
Joel Stanley 2018-06-04 18:15:13 +09:30 committed by David Gibson
parent 8fea70440e
commit 6b37554458
3 changed files with 17 additions and 2 deletions

View File

@ -17,6 +17,7 @@ DEF_HELPER_2(pminsn, void, env, i32)
DEF_HELPER_1(rfid, void, env)
DEF_HELPER_1(hrfid, void, env)
DEF_HELPER_2(store_lpcr, void, env, tl)
DEF_HELPER_2(store_pcr, void, env, tl)
#endif
DEF_HELPER_1(check_tlb_flush_local, void, env)
DEF_HELPER_1(check_tlb_flush_global, void, env)

View File

@ -20,6 +20,7 @@
#include "cpu.h"
#include "exec/exec-all.h"
#include "exec/helper-proto.h"
#include "qemu/error-report.h"
#include "helper_regs.h"
@ -98,6 +99,14 @@ void helper_store_ptcr(CPUPPCState *env, target_ulong val)
tlb_flush(CPU(cpu));
}
}
void helper_store_pcr(CPUPPCState *env, target_ulong value)
{
PowerPCCPU *cpu = ppc_env_get_cpu(env);
PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
env->spr[SPR_PCR] = value & pcc->pcr_mask;
}
#endif /* defined(TARGET_PPC64) */
void helper_store_pidr(CPUPPCState *env, target_ulong val)

View File

@ -424,6 +424,10 @@ static void spr_write_ptcr(DisasContext *ctx, int sprn, int gprn)
gen_helper_store_ptcr(cpu_env, cpu_gpr[gprn]);
}
static void spr_write_pcr(DisasContext *ctx, int sprn, int gprn)
{
gen_helper_store_pcr(cpu_env, cpu_gpr[gprn]);
}
#endif
#endif
@ -7957,11 +7961,12 @@ static void gen_spr_power6_common(CPUPPCState *env)
#endif
/*
* Register PCR to report POWERPC_EXCP_PRIV_REG instead of
* POWERPC_EXCP_INVAL_SPR.
* POWERPC_EXCP_INVAL_SPR in userspace. Permit hypervisor access.
*/
spr_register(env, SPR_PCR, "PCR",
spr_register_hv(env, SPR_PCR, "PCR",
SPR_NOACCESS, SPR_NOACCESS,
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, &spr_write_pcr,
0x00000000);
}