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target-mips: proper sign extension for 'SUBU rd, zero, rt' 

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
master
Aurelien Jarno 2009-05-04 09:54:57 +02:00
parent 88cbb9804b
commit 6bb72b184d
1 changed files with 1 additions and 0 deletions
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target-mips/translate.c
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@ -1604,6 +1604,7 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
tcg_gen_ext32s_tl(cpu_gpr[rd], cpu_gpr[rd]);
} else if (rs == 0 && rt != 0) {
tcg_gen_neg_tl(cpu_gpr[rd], cpu_gpr[rt]);
tcg_gen_ext32s_tl(cpu_gpr[rd], cpu_gpr[rd]);
} else if (rs != 0 && rt == 0) {
tcg_gen_mov_tl(cpu_gpr[rd], cpu_gpr[rs]);
} else {