From 729028a6e2816d64cb01cf4c1920686be90600da Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 18 Jul 2017 01:55:39 -0300 Subject: [PATCH] target/alpha: optimize gen_cvtlq() using deposit op MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Suggested-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20170718045540.16322-10-f4bug@amsat.org> Signed-off-by: Richard Henderson --- target/alpha/translate.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/target/alpha/translate.c b/target/alpha/translate.c index 90e6d5285f..744d8bbf12 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -783,11 +783,9 @@ static void gen_cvtlq(TCGv vc, TCGv vb) /* The arithmetic right shift here, plus the sign-extended mask below yields a sign-extended result without an explicit ext32s_i64. */ - tcg_gen_sari_i64(tmp, vb, 32); - tcg_gen_shri_i64(vc, vb, 29); - tcg_gen_andi_i64(tmp, tmp, (int32_t)0xc0000000); - tcg_gen_andi_i64(vc, vc, 0x3fffffff); - tcg_gen_or_i64(vc, vc, tmp); + tcg_gen_shri_i64(tmp, vb, 29); + tcg_gen_sari_i64(vc, vb, 32); + tcg_gen_deposit_i64(vc, vc, tmp, 0, 30); tcg_temp_free(tmp); }