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target-mips: 4Kc, 4KEc cores do not support MIPS16 

4Kc, 4KEc cores do not support MIPS16, so not only the
CP0_Config1 had to be fixed (see previous patch),
but also MIPS16 instructions must not be executed.

(Hint from Nathan Froyd, thanks).

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
master
Stefan Weil 2009-12-15 14:43:40 +01:00 committed by Aurelien Jarno
parent 4c24aa0a69
commit 73642f5bdb
1 changed files with 3 additions and 3 deletions
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6
target-mips/translate_init.c
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@ -115,7 +115,7 @@ static const mips_def_t mips_defs[] =
.CP0_Status_rw_bitmask = 0x1278FF17,
.SEGBITS = 32,
.PABITS = 32,
.insn_flags = CPU_MIPS32 | ASE_MIPS16,
.insn_flags = CPU_MIPS32,
.mmu_type = MMU_TYPE_R4000,
},
{
@ -157,7 +157,7 @@ static const mips_def_t mips_defs[] =
.CP0_Status_rw_bitmask = 0x1278FF17,
.SEGBITS = 32,
.PABITS = 32,
.insn_flags = CPU_MIPS32 | ASE_MIPS16,
.insn_flags = CPU_MIPS32,
.mmu_type = MMU_TYPE_R4000,
},
{
@ -198,7 +198,7 @@ static const mips_def_t mips_defs[] =
.CP0_Status_rw_bitmask = 0x1278FF17,
.SEGBITS = 32,
.PABITS = 32,
.insn_flags = CPU_MIPS32R2 | ASE_MIPS16,
.insn_flags = CPU_MIPS32R2,
.mmu_type = MMU_TYPE_R4000,
},
{