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mc146818rtc: remove rtc_mm_init() 

It was used for Acer Pica 61 emulation, removed in 2008
Signed-off-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
master
Juan Quintela 2009-10-14 13:12:42 +02:00 committed by Anthony Liguori
parent e0ca7b94da
commit 73c595e1d5
2 changed files with 0 additions and 107 deletions
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105
hw/mc146818rtc.c
View File

@ -620,108 +620,3 @@ static void mc146818rtc_register(void)
isa_qdev_register(&mc146818rtc_info);
}
device_init(mc146818rtc_register)
/* Memory mapped interface */
static uint32_t cmos_mm_readb (void *opaque, target_phys_addr_t addr)
{
RTCState *s = opaque;
return cmos_ioport_read(s, addr >> s->it_shift) & 0xFF;
}
static void cmos_mm_writeb (void *opaque,
target_phys_addr_t addr, uint32_t value)
{
RTCState *s = opaque;
cmos_ioport_write(s, addr >> s->it_shift, value & 0xFF);
}
static uint32_t cmos_mm_readw (void *opaque, target_phys_addr_t addr)
{
RTCState *s = opaque;
uint32_t val;
val = cmos_ioport_read(s, addr >> s->it_shift) & 0xFFFF;
#ifdef TARGET_WORDS_BIGENDIAN
val = bswap16(val);
#endif
return val;
}
static void cmos_mm_writew (void *opaque,
target_phys_addr_t addr, uint32_t value)
{
RTCState *s = opaque;
#ifdef TARGET_WORDS_BIGENDIAN
value = bswap16(value);
#endif
cmos_ioport_write(s, addr >> s->it_shift, value & 0xFFFF);
}
static uint32_t cmos_mm_readl (void *opaque, target_phys_addr_t addr)
{
RTCState *s = opaque;
uint32_t val;
val = cmos_ioport_read(s, addr >> s->it_shift);
#ifdef TARGET_WORDS_BIGENDIAN
val = bswap32(val);
#endif
return val;
}
static void cmos_mm_writel (void *opaque,
target_phys_addr_t addr, uint32_t value)
{
RTCState *s = opaque;
#ifdef TARGET_WORDS_BIGENDIAN
value = bswap32(value);
#endif
cmos_ioport_write(s, addr >> s->it_shift, value);
}
static CPUReadMemoryFunc * const rtc_mm_read[] = {
&cmos_mm_readb,
&cmos_mm_readw,
&cmos_mm_readl,
};
static CPUWriteMemoryFunc * const rtc_mm_write[] = {
&cmos_mm_writeb,
&cmos_mm_writew,
&cmos_mm_writel,
};
RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
int base_year)
{
RTCState *s;
int io_memory;
s = qemu_mallocz(sizeof(RTCState));
s->irq = irq;
s->cmos_data[RTC_REG_A] = 0x26;
s->cmos_data[RTC_REG_B] = 0x02;
s->cmos_data[RTC_REG_C] = 0x00;
s->cmos_data[RTC_REG_D] = 0x80;
s->base_year = base_year;
rtc_set_date_from_host(s);
s->periodic_timer = qemu_new_timer(rtc_clock, rtc_periodic_timer, s);
s->second_timer = qemu_new_timer(rtc_clock, rtc_update_second, s);
s->second_timer2 = qemu_new_timer(rtc_clock, rtc_update_second2, s);
s->next_second_time =
qemu_get_clock(rtc_clock) + (get_ticks_per_sec() * 99) / 100;
qemu_mod_timer(s->second_timer2, s->next_second_time);
io_memory = cpu_register_io_memory(rtc_mm_read, rtc_mm_write, s);
cpu_register_physical_memory(base, 2 << it_shift, io_memory);
vmstate_register(base, &vmstate_rtc, s);
qemu_register_reset(rtc_reset, s);
return s;
}

2
hw/pc.h
View File

@ -83,8 +83,6 @@ void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
typedef struct RTCState RTCState;
RTCState *rtc_init(int base_year);
RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
int base_year);
void rtc_set_memory(RTCState *s, int addr, int val);
void rtc_set_date(RTCState *s, const struct tm *tm);
void cmos_set_s3_resume(void);