From 77d58b1e47c8d1c661f98f12b47ab519d3561488 Mon Sep 17 00:00:00 2001 From: Gerd Hoffmann Date: Thu, 22 Nov 2012 12:12:30 +0100 Subject: [PATCH] apci: switch timer to memory api Signed-off-by: Gerd Hoffmann --- hw/acpi.c | 19 +++++++++++++++++-- hw/acpi.h | 5 +++-- hw/acpi_ich9.c | 5 +---- hw/acpi_piix4.c | 5 +---- hw/vt82c686.c | 6 +----- 5 files changed, 23 insertions(+), 17 deletions(-) diff --git a/hw/acpi.c b/hw/acpi.c index f4aca493fc..ba25c23bed 100644 --- a/hw/acpi.c +++ b/hw/acpi.c @@ -331,7 +331,7 @@ void acpi_pm_tmr_calc_overflow_time(ACPIREGS *ar) ar->tmr.overflow_time = (d + 0x800000LL) & ~0x7fffffLL; } -uint32_t acpi_pm_tmr_get(ACPIREGS *ar) +static uint32_t acpi_pm_tmr_get(ACPIREGS *ar) { uint32_t d = acpi_pm_tmr_get_clock(); return d & 0xffffff; @@ -344,10 +344,25 @@ static void acpi_pm_tmr_timer(void *opaque) ar->tmr.update_sci(ar); } -void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci) +static uint64_t acpi_pm_tmr_read(void *opaque, hwaddr addr, unsigned width) +{ + return acpi_pm_tmr_get(opaque); +} + +static const MemoryRegionOps acpi_pm_tmr_ops = { + .read = acpi_pm_tmr_read, + .valid.min_access_size = 4, + .valid.max_access_size = 4, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + +void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci, + MemoryRegion *parent) { ar->tmr.update_sci = update_sci; ar->tmr.timer = qemu_new_timer_ns(vm_clock, acpi_pm_tmr_timer, ar); + memory_region_init_io(&ar->tmr.io, &acpi_pm_tmr_ops, ar, "acpi-tmr", 4); + memory_region_add_subregion(parent, 8, &ar->tmr.io); } void acpi_pm_tmr_reset(ACPIREGS *ar) diff --git a/hw/acpi.h b/hw/acpi.h index 7337f41857..91f42c3db1 100644 --- a/hw/acpi.h +++ b/hw/acpi.h @@ -84,6 +84,7 @@ typedef void (*acpi_update_sci_fn)(ACPIREGS *ar); struct ACPIPMTimer { QEMUTimer *timer; + MemoryRegion io; int64_t overflow_time; acpi_update_sci_fn update_sci; @@ -119,8 +120,8 @@ struct ACPIREGS { /* PM_TMR */ void acpi_pm_tmr_update(ACPIREGS *ar, bool enable); void acpi_pm_tmr_calc_overflow_time(ACPIREGS *ar); -uint32_t acpi_pm_tmr_get(ACPIREGS *ar); -void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci); +void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci, + MemoryRegion *parent); void acpi_pm_tmr_reset(ACPIREGS *ar); #include "qemu-timer.h" diff --git a/hw/acpi_ich9.c b/hw/acpi_ich9.c index bf361ece5d..ec6d5f2b5a 100644 --- a/hw/acpi_ich9.c +++ b/hw/acpi_ich9.c @@ -170,9 +170,6 @@ static uint32_t pm_ioport_readl(void *opaque, uint32_t addr) uint32_t val; switch (addr & ICH9_PMIO_MASK) { - case ICH9_PMIO_PM1_TMR: - val = acpi_pm_tmr_get(&pm->acpi_regs); - break; case ICH9_PMIO_SMI_EN: val = pm->smi_en; break; @@ -320,7 +317,7 @@ void ich9_pm_init(ICH9LPCPMRegs *pm, qemu_irq sci_irq, qemu_irq cmos_s3) memory_region_set_enabled(&pm->io, false); memory_region_add_subregion(get_system_io(), 0, &pm->io); - acpi_pm_tmr_init(&pm->acpi_regs, ich9_pm_update_sci_fn); + acpi_pm_tmr_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io); acpi_pm1_cnt_init(&pm->acpi_regs); acpi_gpe_init(&pm->acpi_regs, ICH9_PMIO_GPE0_LEN); acpi_gpe_blk(&pm->acpi_regs, ICH9_PMIO_GPE0_STS); diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index 320e045938..75761a08a7 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -154,9 +154,6 @@ static uint64_t pm_ioport_read(void *opaque, hwaddr addr, unsigned width) case 0x04: val = s->ar.pm1.cnt.cnt; break; - case 0x08: - val = acpi_pm_tmr_get(&s->ar); - break; default: val = 0; break; @@ -463,7 +460,7 @@ static int piix4_pm_initfn(PCIDevice *dev) memory_region_set_enabled(&s->io, false); memory_region_add_subregion(get_system_io(), 0, &s->io); - acpi_pm_tmr_init(&s->ar, pm_tmr_timer); + acpi_pm_tmr_init(&s->ar, pm_tmr_timer, &s->io); acpi_gpe_init(&s->ar, GPE_LEN); s->powerdown_notifier.notify = piix4_pm_powerdown_req; diff --git a/hw/vt82c686.c b/hw/vt82c686.c index 3fc6063d7d..219cfaec72 100644 --- a/hw/vt82c686.c +++ b/hw/vt82c686.c @@ -252,14 +252,10 @@ static void pm_ioport_writel(void *opaque, uint32_t addr, uint32_t val) static uint32_t pm_ioport_readl(void *opaque, uint32_t addr) { - VT686PMState *s = opaque; uint32_t val; addr &= 0x0f; switch (addr) { - case 0x08: - val = acpi_pm_tmr_get(&s->ar); - break; default: val = 0; break; @@ -446,7 +442,7 @@ static int vt82c686b_pm_initfn(PCIDevice *dev) memory_region_set_enabled(&s->io, false); memory_region_add_subregion(get_system_io(), 0, &s->io); - acpi_pm_tmr_init(&s->ar, pm_tmr_timer); + acpi_pm_tmr_init(&s->ar, pm_tmr_timer, &s->io); acpi_pm1_cnt_init(&s->ar); pm_smbus_init(&s->dev.qdev, &s->smb);