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target-microblaze: Correct bit shift for the PVR0 version field 

Correct bit shift for the PVR0 version field.

Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
master
Edgar E. Iglesias 2017-01-10 17:14:34 +01:00
parent 9a32e6f3a1
commit 79549c9960
2 changed files with 3 additions and 1 deletions
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2
target/microblaze/cpu.c
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@ -182,7 +182,7 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
(cpu->cfg.use_fpu ? PVR0_USE_FPU_MASK : 0) |
(cpu->cfg.use_mmu ? PVR0_USE_MMU_MASK : 0) |
(cpu->cfg.endi ? PVR0_ENDI_MASK : 0) |
(version_code << 16) |
(version_code << PVR0_VERSION_SHIFT) |
(cpu->cfg.pvr == C_PVR_FULL ? PVR0_PVR_FULL_MASK : 0);
env->pvr.regs[2] |= (cpu->cfg.use_fpu ? PVR2_USE_FPU_MASK : 0) |

2
target/microblaze/cpu.h
View File

@ -129,6 +129,8 @@ typedef struct CPUMBState CPUMBState;
#define PVR0_USER1_MASK 0x000000FF
#define PVR0_SPROT_MASK 0x00000001
#define PVR0_VERSION_SHIFT 8
/* User 2 PVR mask */
#define PVR1_USER2_MASK 0xFFFFFFFF