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target/sh4: Prefer fast cpu_env() over slower CPU QOM cast macro 

Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20240129164514.73104-26-philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
master
Philippe Mathieu-Daudé 2024-01-29 17:45:07 +01:00 committed by Thomas Huth
parent f2a4459db9
commit 795bec9652
4 changed files with 14 additions and 30 deletions
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18
target/sh4/cpu.c
View File

@ -71,8 +71,7 @@ static void superh_restore_state_to_opc(CPUState *cs,
static bool superh_io_recompile_replay_branch(CPUState *cs,
const TranslationBlock *tb)
{
SuperHCPU *cpu = SUPERH_CPU(cs);
CPUSH4State *env = &cpu->env;
CPUSH4State *env = cpu_env(cs);
if ((env->flags & (TB_FLAG_DELAY_SLOT | TB_FLAG_DELAY_SLOT_COND))
&& !(cs->tcg_cflags & CF_PCREL) && env->pc != tb->pc) {
@ -107,9 +106,8 @@ static int sh4_cpu_mmu_index(CPUState *cs, bool ifetch)
static void superh_cpu_reset_hold(Object *obj)
{
CPUState *cs = CPU(obj);
SuperHCPU *cpu = SUPERH_CPU(cs);
SuperHCPUClass *scc = SUPERH_CPU_GET_CLASS(obj);
CPUSH4State *env = &cpu->env;
CPUSH4State *env = cpu_env(cs);
if (scc->parent_phases.hold) {
scc->parent_phases.hold(obj);
@ -159,8 +157,7 @@ out:
static void sh7750r_cpu_initfn(Object *obj)
{
SuperHCPU *cpu = SUPERH_CPU(obj);
CPUSH4State *env = &cpu->env;
CPUSH4State *env = cpu_env(CPU(obj));
env->id = SH_CPU_SH7750R;
env->features = SH_FEATURE_BCR3_AND_BCR4;
@ -177,8 +174,7 @@ static void sh7750r_class_init(ObjectClass *oc, void *data)
static void sh7751r_cpu_initfn(Object *obj)
{
SuperHCPU *cpu = SUPERH_CPU(obj);
CPUSH4State *env = &cpu->env;
CPUSH4State *env = cpu_env(CPU(obj));
env->id = SH_CPU_SH7751R;
env->features = SH_FEATURE_BCR3_AND_BCR4;
@ -195,8 +191,7 @@ static void sh7751r_class_init(ObjectClass *oc, void *data)
static void sh7785_cpu_initfn(Object *obj)
{
SuperHCPU *cpu = SUPERH_CPU(obj);
CPUSH4State *env = &cpu->env;
CPUSH4State *env = cpu_env(CPU(obj));
env->id = SH_CPU_SH7785;
env->features = SH_FEATURE_SH4A;
@ -231,8 +226,7 @@ static void superh_cpu_realizefn(DeviceState *dev, Error **errp)
static void superh_cpu_initfn(Object *obj)
{
SuperHCPU *cpu = SUPERH_CPU(obj);
CPUSH4State *env = &cpu->env;
CPUSH4State *env = cpu_env(CPU(obj));
env->movcal_backup_tail = &(env->movcal_backup);
}

6
target/sh4/gdbstub.c
View File

@ -26,8 +26,7 @@
int superh_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
{
SuperHCPU *cpu = SUPERH_CPU(cs);
CPUSH4State *env = &cpu->env;
CPUSH4State *env = cpu_env(cs);
switch (n) {
case 0 ... 7:
@ -76,8 +75,7 @@ int superh_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
int superh_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
{
SuperHCPU *cpu = SUPERH_CPU(cs);
CPUSH4State *env = &cpu->env;
CPUSH4State *env = cpu_env(cs);
switch (n) {
case 0 ... 7:

14
target/sh4/helper.c
View File

@ -55,8 +55,7 @@ int cpu_sh4_is_cached(CPUSH4State *env, target_ulong addr)
void superh_cpu_do_interrupt(CPUState *cs)
{
SuperHCPU *cpu = SUPERH_CPU(cs);
CPUSH4State *env = &cpu->env;
CPUSH4State *env = cpu_env(cs);
int do_irq = cs->interrupt_request & CPU_INTERRUPT_HARD;
int do_exp, irq_vector = cs->exception_index;
@ -432,11 +431,10 @@ static int get_physical_address(CPUSH4State * env, target_ulong * physical,
hwaddr superh_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
{
SuperHCPU *cpu = SUPERH_CPU(cs);
target_ulong physical;
int prot;
if (get_physical_address(&cpu->env, &physical, &prot, addr, MMU_DATA_LOAD)
if (get_physical_address(cpu_env(cs), &physical, &prot, addr, MMU_DATA_LOAD)
== MMU_OK) {
return physical;
}
@ -782,11 +780,8 @@ int cpu_sh4_is_cached(CPUSH4State * env, target_ulong addr)
bool superh_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{
if (interrupt_request & CPU_INTERRUPT_HARD) {
SuperHCPU *cpu = SUPERH_CPU(cs);
CPUSH4State *env = &cpu->env;
/* Delay slots are indivisible, ignore interrupts */
if (env->flags & TB_FLAG_DELAY_SLOT_MASK) {
if (cpu_env(cs)->flags & TB_FLAG_DELAY_SLOT_MASK) {
return false;
} else {
superh_cpu_do_interrupt(cs);
@ -800,8 +795,7 @@ bool superh_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr)
{
SuperHCPU *cpu = SUPERH_CPU(cs);
CPUSH4State *env = &cpu->env;
CPUSH4State *env = cpu_env(cs);
int ret;
target_ulong physical;

6
target/sh4/translate.c
View File

@ -159,8 +159,7 @@ void sh4_translate_init(void)
void superh_cpu_dump_state(CPUState *cs, FILE *f, int flags)
{
SuperHCPU *cpu = SUPERH_CPU(cs);
CPUSH4State *env = &cpu->env;
CPUSH4State *env = cpu_env(cs);
int i;
qemu_fprintf(f, "pc=0x%08x sr=0x%08x pr=0x%08x fpscr=0x%08x\n",
@ -2186,7 +2185,6 @@ static void decode_gusa(DisasContext *ctx, CPUSH4State *env)
static void sh4_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)
{
DisasContext *ctx = container_of(dcbase, DisasContext, base);
CPUSH4State *env = cpu_env(cs);
uint32_t tbflags;
int bound;
@ -2196,7 +2194,7 @@ static void sh4_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)
/* We don't know if the delayed pc came from a dynamic or static branch,
so assume it is a dynamic branch. */
ctx->delayed_pc = -1; /* use delayed pc from env pointer */
ctx->features = env->features;
ctx->features = cpu_env(cs)->features;
ctx->has_movcal = (tbflags & TB_FLAG_PENDING_MOVCA);
ctx->gbank = ((tbflags & (1 << SR_MD)) &&
(tbflags & (1 << SR_RB))) * 0x10;