mirror of https://github.com/proxmox/mirror_qemu
net: cadence_gem: Add support for jumbo frames
Add a property "jumbo-max-len", which sets default value of jumbo frames up to 16,383 bytes. Add Frame length checks for standard and jumbo frames. Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Jason Wang <jasowang@redhat.com>master
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88dba7ed84
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7ca151c381
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@ -61,6 +61,7 @@
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#define GEM_TXPAUSE (0x0000003C / 4) /* TX Pause Time reg */
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#define GEM_TXPAUSE (0x0000003C / 4) /* TX Pause Time reg */
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#define GEM_TXPARTIALSF (0x00000040 / 4) /* TX Partial Store and Forward */
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#define GEM_TXPARTIALSF (0x00000040 / 4) /* TX Partial Store and Forward */
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#define GEM_RXPARTIALSF (0x00000044 / 4) /* RX Partial Store and Forward */
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#define GEM_RXPARTIALSF (0x00000044 / 4) /* RX Partial Store and Forward */
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#define GEM_JUMBO_MAX_LEN (0x00000048 / 4) /* Max Jumbo Frame Size */
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#define GEM_HASHLO (0x00000080 / 4) /* Hash Low address reg */
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#define GEM_HASHLO (0x00000080 / 4) /* Hash Low address reg */
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#define GEM_HASHHI (0x00000084 / 4) /* Hash High address reg */
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#define GEM_HASHHI (0x00000084 / 4) /* Hash High address reg */
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#define GEM_SPADDR1LO (0x00000088 / 4) /* Specific addr 1 low reg */
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#define GEM_SPADDR1LO (0x00000088 / 4) /* Specific addr 1 low reg */
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@ -212,10 +213,12 @@
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#define GEM_NWCFG_LERR_DISC 0x00010000 /* Discard RX frames with len err */
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#define GEM_NWCFG_LERR_DISC 0x00010000 /* Discard RX frames with len err */
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#define GEM_NWCFG_BUFF_OFST_M 0x0000C000 /* Receive buffer offset mask */
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#define GEM_NWCFG_BUFF_OFST_M 0x0000C000 /* Receive buffer offset mask */
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#define GEM_NWCFG_BUFF_OFST_S 14 /* Receive buffer offset shift */
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#define GEM_NWCFG_BUFF_OFST_S 14 /* Receive buffer offset shift */
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#define GEM_NWCFG_RCV_1538 0x00000100 /* Receive 1538 bytes frame */
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#define GEM_NWCFG_UCAST_HASH 0x00000080 /* accept unicast if hash match */
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#define GEM_NWCFG_UCAST_HASH 0x00000080 /* accept unicast if hash match */
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#define GEM_NWCFG_MCAST_HASH 0x00000040 /* accept multicast if hash match */
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#define GEM_NWCFG_MCAST_HASH 0x00000040 /* accept multicast if hash match */
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#define GEM_NWCFG_BCAST_REJ 0x00000020 /* Reject broadcast packets */
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#define GEM_NWCFG_BCAST_REJ 0x00000020 /* Reject broadcast packets */
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#define GEM_NWCFG_PROMISC 0x00000010 /* Accept all packets */
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#define GEM_NWCFG_PROMISC 0x00000010 /* Accept all packets */
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#define GEM_NWCFG_JUMBO_FRAME 0x00000008 /* Jumbo Frames enable */
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#define GEM_DMACFG_ADDR_64B (1U << 30)
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#define GEM_DMACFG_ADDR_64B (1U << 30)
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#define GEM_DMACFG_TX_BD_EXT (1U << 29)
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#define GEM_DMACFG_TX_BD_EXT (1U << 29)
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@ -233,6 +236,7 @@
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/* GEM_ISR GEM_IER GEM_IDR GEM_IMR */
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/* GEM_ISR GEM_IER GEM_IDR GEM_IMR */
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#define GEM_INT_TXCMPL 0x00000080 /* Transmit Complete */
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#define GEM_INT_TXCMPL 0x00000080 /* Transmit Complete */
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#define GEM_INT_AMBA_ERR 0x00000040
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#define GEM_INT_TXUSED 0x00000008
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#define GEM_INT_TXUSED 0x00000008
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#define GEM_INT_RXUSED 0x00000004
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#define GEM_INT_RXUSED 0x00000004
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#define GEM_INT_RXCMPL 0x00000002
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#define GEM_INT_RXCMPL 0x00000002
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@ -453,6 +457,24 @@ static inline void rx_desc_set_sar(uint32_t *desc, int sar_idx)
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/* The broadcast MAC address: 0xFFFFFFFFFFFF */
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/* The broadcast MAC address: 0xFFFFFFFFFFFF */
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static const uint8_t broadcast_addr[] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
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static const uint8_t broadcast_addr[] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
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static uint32_t gem_get_max_buf_len(CadenceGEMState *s, bool tx)
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{
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uint32_t size;
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if (s->regs[GEM_NWCFG] & GEM_NWCFG_JUMBO_FRAME) {
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size = s->regs[GEM_JUMBO_MAX_LEN];
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if (size > s->jumbo_max_len) {
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size = s->jumbo_max_len;
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qemu_log_mask(LOG_GUEST_ERROR, "GEM_JUMBO_MAX_LEN reg cannot be"
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" greater than 0x%" PRIx32 "\n", s->jumbo_max_len);
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}
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} else if (tx) {
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size = 1518;
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} else {
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size = s->regs[GEM_NWCFG] & GEM_NWCFG_RCV_1538 ? 1538 : 1518;
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}
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return size;
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}
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static void gem_set_isr(CadenceGEMState *s, int q, uint32_t flag)
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static void gem_set_isr(CadenceGEMState *s, int q, uint32_t flag)
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{
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{
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if (q == 0) {
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if (q == 0) {
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@ -1016,6 +1038,12 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size)
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/* Find which queue we are targeting */
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/* Find which queue we are targeting */
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q = get_queue_from_screen(s, rxbuf_ptr, rxbufsize);
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q = get_queue_from_screen(s, rxbuf_ptr, rxbufsize);
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if (size > gem_get_max_buf_len(s, false)) {
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qemu_log_mask(LOG_GUEST_ERROR, "rx frame too long\n");
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gem_set_isr(s, q, GEM_INT_AMBA_ERR);
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return -1;
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}
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while (bytes_to_copy) {
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while (bytes_to_copy) {
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hwaddr desc_addr;
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hwaddr desc_addr;
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@ -1196,12 +1224,13 @@ static void gem_transmit(CadenceGEMState *s)
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break;
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break;
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}
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}
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if (tx_desc_get_length(desc) > MAX_FRAME_SIZE -
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if (tx_desc_get_length(desc) > gem_get_max_buf_len(s, true) -
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(p - s->tx_packet)) {
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(p - s->tx_packet)) {
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DB_PRINT("TX descriptor @ 0x%" HWADDR_PRIx \
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qemu_log_mask(LOG_GUEST_ERROR, "TX descriptor @ 0x%" \
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" too large: size 0x%x space 0x%zx\n",
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HWADDR_PRIx " too large: size 0x%x space 0x%zx\n",
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packet_desc_addr, tx_desc_get_length(desc),
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packet_desc_addr, tx_desc_get_length(desc),
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MAX_FRAME_SIZE - (p - s->tx_packet));
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gem_get_max_buf_len(s, true) - (p - s->tx_packet));
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gem_set_isr(s, q, GEM_INT_AMBA_ERR);
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break;
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break;
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}
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}
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@ -1343,9 +1372,10 @@ static void gem_reset(DeviceState *d)
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s->regs[GEM_RXPARTIALSF] = 0x000003ff;
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s->regs[GEM_RXPARTIALSF] = 0x000003ff;
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s->regs[GEM_MODID] = s->revision;
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s->regs[GEM_MODID] = s->revision;
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s->regs[GEM_DESCONF] = 0x02500111;
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s->regs[GEM_DESCONF] = 0x02500111;
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s->regs[GEM_DESCONF2] = 0x2ab13fff;
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s->regs[GEM_DESCONF2] = 0x2ab10000 | s->jumbo_max_len;
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s->regs[GEM_DESCONF5] = 0x002f2045;
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s->regs[GEM_DESCONF5] = 0x002f2045;
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s->regs[GEM_DESCONF6] = GEM_DESCONF6_64B_MASK;
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s->regs[GEM_DESCONF6] = GEM_DESCONF6_64B_MASK;
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s->regs[GEM_JUMBO_MAX_LEN] = s->jumbo_max_len;
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if (s->num_priority_queues > 1) {
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if (s->num_priority_queues > 1) {
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queues_mask = MAKE_64BIT_MASK(1, s->num_priority_queues - 1);
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queues_mask = MAKE_64BIT_MASK(1, s->num_priority_queues - 1);
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@ -1516,6 +1546,9 @@ static void gem_write(void *opaque, hwaddr offset, uint64_t val,
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s->regs[GEM_IMR] &= ~val;
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s->regs[GEM_IMR] &= ~val;
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gem_update_int_status(s);
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gem_update_int_status(s);
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break;
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break;
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case GEM_JUMBO_MAX_LEN:
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s->regs[GEM_JUMBO_MAX_LEN] = val & MAX_JUMBO_FRAME_SIZE_MASK;
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break;
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case GEM_INT_Q1_ENABLE ... GEM_INT_Q7_ENABLE:
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case GEM_INT_Q1_ENABLE ... GEM_INT_Q7_ENABLE:
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s->regs[GEM_INT_Q1_MASK + offset - GEM_INT_Q1_ENABLE] &= ~val;
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s->regs[GEM_INT_Q1_MASK + offset - GEM_INT_Q1_ENABLE] &= ~val;
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gem_update_int_status(s);
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gem_update_int_status(s);
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@ -1610,6 +1643,12 @@ static void gem_realize(DeviceState *dev, Error **errp)
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s->nic = qemu_new_nic(&net_gem_info, &s->conf,
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s->nic = qemu_new_nic(&net_gem_info, &s->conf,
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object_get_typename(OBJECT(dev)), dev->id, s);
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object_get_typename(OBJECT(dev)), dev->id, s);
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if (s->jumbo_max_len > MAX_FRAME_SIZE) {
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error_setg(errp, "jumbo-max-len is greater than %d",
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MAX_FRAME_SIZE);
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return;
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}
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}
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}
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static void gem_init(Object *obj)
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static void gem_init(Object *obj)
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@ -1658,6 +1697,8 @@ static Property gem_properties[] = {
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num_type1_screeners, 4),
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num_type1_screeners, 4),
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DEFINE_PROP_UINT8("num-type2-screeners", CadenceGEMState,
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DEFINE_PROP_UINT8("num-type2-screeners", CadenceGEMState,
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num_type2_screeners, 4),
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num_type2_screeners, 4),
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DEFINE_PROP_UINT16("jumbo-max-len", CadenceGEMState,
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jumbo_max_len, 10240),
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DEFINE_PROP_END_OF_LIST(),
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DEFINE_PROP_END_OF_LIST(),
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};
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};
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@ -40,7 +40,8 @@
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#define MAX_TYPE1_SCREENERS 16
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#define MAX_TYPE1_SCREENERS 16
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#define MAX_TYPE2_SCREENERS 16
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#define MAX_TYPE2_SCREENERS 16
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#define MAX_FRAME_SIZE 2048
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#define MAX_JUMBO_FRAME_SIZE_MASK 0x3FFF
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#define MAX_FRAME_SIZE MAX_JUMBO_FRAME_SIZE_MASK
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typedef struct CadenceGEMState {
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typedef struct CadenceGEMState {
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/*< private >*/
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/*< private >*/
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@ -59,6 +60,7 @@ typedef struct CadenceGEMState {
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uint8_t num_type1_screeners;
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uint8_t num_type1_screeners;
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uint8_t num_type2_screeners;
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uint8_t num_type2_screeners;
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uint32_t revision;
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uint32_t revision;
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uint16_t jumbo_max_len;
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/* GEM registers backing store */
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/* GEM registers backing store */
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uint32_t regs[CADENCE_GEM_MAXREG];
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uint32_t regs[CADENCE_GEM_MAXREG];
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