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spitz: convert to memory API 

Signed-off-by: Avi Kivity <avi@redhat.com>
master
Avi Kivity 2011-10-03 13:03:56 +02:00
parent 890c2b772d
commit 7cc09e6c4b
1 changed files with 18 additions and 30 deletions
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48
hw/spitz.c
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@ -49,6 +49,7 @@
typedef struct {
SysBusDevice busdev;
MemoryRegion iomem;
DeviceState *nand;
uint8_t ctl;
uint8_t manf_id;
@ -56,7 +57,7 @@ typedef struct {
ECCState ecc;
} SLNANDState;
static uint32_t sl_readb(void *opaque, target_phys_addr_t addr)
static uint64_t sl_read(void *opaque, target_phys_addr_t addr, unsigned size)
{
SLNANDState *s = (SLNANDState *) opaque;
int ryby;
@ -86,6 +87,10 @@ static uint32_t sl_readb(void *opaque, target_phys_addr_t addr)
return s->ctl;
case FLASH_FLASHIO:
if (size == 4) {
return ecc_digest(&s->ecc, nand_getio(s->nand)) |
(ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
}
return ecc_digest(&s->ecc, nand_getio(s->nand));
default:
@ -94,19 +99,8 @@ static uint32_t sl_readb(void *opaque, target_phys_addr_t addr)
return 0;
}
static uint32_t sl_readl(void *opaque, target_phys_addr_t addr)
{
SLNANDState *s = (SLNANDState *) opaque;
if (addr == FLASH_FLASHIO)
return ecc_digest(&s->ecc, nand_getio(s->nand)) |
(ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
return sl_readb(opaque, addr);
}
static void sl_writeb(void *opaque, target_phys_addr_t addr,
uint32_t value)
static void sl_write(void *opaque, target_phys_addr_t addr,
uint64_t value, unsigned size)
{
SLNANDState *s = (SLNANDState *) opaque;
@ -140,15 +134,10 @@ enum {
FLASH_1024M,
};
static CPUReadMemoryFunc * const sl_readfn[] = {
sl_readb,
sl_readb,
sl_readl,
};
static CPUWriteMemoryFunc * const sl_writefn[] = {
sl_writeb,
sl_writeb,
sl_writeb,
static const MemoryRegionOps sl_ops = {
.read = sl_read,
.write = sl_write,
.endianness = DEVICE_NATIVE_ENDIAN,
};
static void sl_flash_register(PXA2xxState *cpu, int size)
@ -168,7 +157,6 @@ static void sl_flash_register(PXA2xxState *cpu, int size)
}
static int sl_nand_init(SysBusDevice *dev) {
int iomemtype;
SLNANDState *s;
DriveInfo *nand;
@ -178,10 +166,8 @@ static int sl_nand_init(SysBusDevice *dev) {
nand = drive_get(IF_MTD, 0, 0);
s->nand = nand_init(nand ? nand->bdrv : NULL, s->manf_id, s->chip_id);
iomemtype = cpu_register_io_memory(sl_readfn,
sl_writefn, s, DEVICE_NATIVE_ENDIAN);
sysbus_init_mmio(dev, 0x40, iomemtype);
memory_region_init_io(&s->iomem, &sl_ops, s, "sl", 0x40);
sysbus_init_mmio_region(dev, &s->iomem);
return 0;
}
@ -898,6 +884,7 @@ static void spitz_common_init(ram_addr_t ram_size,
PXA2xxState *cpu;
DeviceState *scp0, *scp1 = NULL;
MemoryRegion *address_space_mem = get_system_memory();
MemoryRegion *rom = g_new(MemoryRegion, 1);
if (!cpu_model)
cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0";
@ -907,8 +894,9 @@ static void spitz_common_init(ram_addr_t ram_size,
sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
cpu_register_physical_memory(0, SPITZ_ROM,
qemu_ram_alloc(NULL, "spitz.rom", SPITZ_ROM) | IO_MEM_ROM);
memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM);
memory_region_set_readonly(rom, true);
memory_region_add_subregion(address_space_mem, 0, rom);
/* Setup peripherals */
spitz_keyboard_register(cpu);